by the way, one of the LTSpice Group users mentioned this PDF -- illustrates how to derive models from datasheets: www.intusoft.com/lit/wkwModels.pdf
To #2348:
http://consist.sitesled.com/MATTES/Mattes.htm
US pat 3502996
AES E-Library A 200-Watt Solid State Stereo Amplifier
http://consist.sitesled.com/MATTES/Mattes.htm
US pat 3502996
AES E-Library A 200-Watt Solid State Stereo Amplifier
Hi Bob
A hearty thank you for those models and all the work that went into creating them. There's something I'm not sure about though.
You appended "C" to the end of the part numbers, presumably to distinguish them from other models for the same part that may be in the same library. However that doesn't really help when the part number ends with a "C" anyway, e.g. BC560C. I stepped around that by editing the text file and prefixing the part numbers with "bob", which gets them nicely grouped together in the alphabetical lists as well.
The remaining confusion is whether your models for e.g. BD139C and BC560C are actually models of the C grade components, or just the generic (ungraded) ones. Perhaps you could clarify?
Thanks - Godfrey
Hi Godfrey, thanks for your kind words about the transistor models I built and posted on my web site. Yes, the C at the end of the models helped me distinguish between the models I created and those that came from manufacturers.
You are correct about the C possibly creating confusion with a C suffix on the real part numbers. At minimum, I should have adopted a convention where my C suffix was always an added suffix to a part number, so that a BD139 grade C would have been designated BD139CC.
The models I used for the BD139 were for the generic devices.
Cheers,
Bob
Fairchild ones at least.
There is no way these can have a <50 MHz fT though, as some people have claimed. They are worse at lower Ic because capacitances are about twice as high as for the old Philips parts (so you'll want to run these at 10 vs. 5 mA, for example), but ultimately they should be in the same ballpark. They do have higher saturation current and a lot more beta droop.
Maybe the common STMicro parts use yet another die?
Otherwise I could imagine worse parts to use in a class A headphone buffer at 50..100 mA. (As, in fact, found in at least one commercial amplifier.)
Assuming the models are accurate, maximum fT shouldn't be too far off from the Philips parts (I used the formula given here to calculate it). tf is in the same ballpark for both.
So I'm a little puzzled as to why fT wouldn't be spec'd, at least for the Fairchild parts. It should still easily exceed 100 MHz at 50 mA. That's nothing to be ashamed off in an inexpensive medium power transistor.
So I'm a little puzzled as to why fT wouldn't be spec'd, at least for the Fairchild parts. It should still easily exceed 100 MHz at 50 mA. That's nothing to be ashamed off in an inexpensive medium power transistor.
its unlikely any current production of a 30 yr old part is literally the same die, same process as original
http://www.onsemi.com/pub/docs/pcn/13135.pdf
presumably better die attach, metallurgy, molding, passivation allow the smaller die to handle the same power
but it seems likely junction C, ft have to change - hopefully for the better
http://www.onsemi.com/pub/docs/pcn/13135.pdf
presumably better die attach, metallurgy, molding, passivation allow the smaller die to handle the same power
but it seems likely junction C, ft have to change - hopefully for the better
Ions ago I got the information from philips that these bd parts are the same die as bc637,8.9 ect series but put into to126 case for higher dissapation. Looking at the datasheets this seems to be the case as youll notice they are virtually identical except for Max Ic and power ratings. Paracitic capacitances due to the package change will deteriorate performance a little. From what I can remember from my books there is a model parameter that can be used to sim this, I think it was Ccs but this was years ago since I was in the books so I could be wrong.
Hello Bob,
It's quite a while since I did anything on electronics... however I still need an OPS for my amp. I have proposition from Edmond but it seems difficult for me to understand so to make any progress I would like to use Edmond's OPS in a later design.
Now, I found an OPS that interests me a lot in your book on page 193 figure 10.7. It's the diamond buffer driver with flying baker clamps.
I use lateral mosfets for my OPS (SK1058/SJ162) is that OPS optimal for those type of output devices or is this circuit better for BJT's only?
On page 239 figure 11.16 is a mosfet output stage with folded drivers. Like the diamond driver is uses folded devices (drivers in this case - predrivers in the first case since it is based on a triple)
What would be the difference in both circuits if both used with my laterals?
Thanks a lot
Olivier
It's quite a while since I did anything on electronics... however I still need an OPS for my amp. I have proposition from Edmond but it seems difficult for me to understand so to make any progress I would like to use Edmond's OPS in a later design.
Now, I found an OPS that interests me a lot in your book on page 193 figure 10.7. It's the diamond buffer driver with flying baker clamps.
I use lateral mosfets for my OPS (SK1058/SJ162) is that OPS optimal for those type of output devices or is this circuit better for BJT's only?
On page 239 figure 11.16 is a mosfet output stage with folded drivers. Like the diamond driver is uses folded devices (drivers in this case - predrivers in the first case since it is based on a triple)
What would be the difference in both circuits if both used with my laterals?
Thanks a lot
Olivier
Hi Olivier,
I think the diamond driver circuit of Figure 10.7 should be fine for a lateral MOSFET output stage, although the amount of current gain provided by the diamond buffer driver is probably unnecessary for most MOSFET output stage designs.
The folded driver circuit in Figure 11.16 is one of my favorites that I have used in the fairly simple MOSFET power amplifiers in my Athena active loudspeaker, except I didn't even use Shottkies for the flying catch diodes - just silicon 1N4148.
However, there is one very important thing to note about the use of flying catch diodes. They will provide what I called "natural current limiting" which is a good thing, but the value where the current limiting occurs is a function of the forward gate voltage of the associated MOSFET at high current. If you look at the various voltages in the output stage and driver as a function of output current, and look at the point where the flying catch diodes turn on and begin to limit current by limiting gate drive, you will find to a very rough approximation that the maximum gate drive voltage available to the MOSFET at high current is roughly twice the idle bias voltage on the gate (for this simple implementation of the flying catch diode circuit).
For the IRFP240/9240, the forward voltage at an idle bias current of 150mA is on the order of 3.5V. Doubling this number to 7V and looking at the datasheet shows you that these vertical MOSFETs can conduct a lot of current with a forward bias of 7V on the gate. Unfortunately, the situation is very different for lateral MOSFETs. They will often have a forward bias on the order of 0.8V at their normal idle current. Doubling this gives only 1.6V, which is not enough to get them to conduct very much current. That laterals often need perhaps 7V to conduct the high currents you want. So this circuit, as-is, with flying catch diodes will not perform well with laterals.
There are ways to modify the way in which flying catch diodes establish the current-limiting threshold (and I may have touched on it partly in the book), but it is a bit too much to discuss here (plus I'm recovering from a bad bug, so I may not be thinking that straight).
Cheers,
Bob
Hello Bob,
I will go for the diamond buffer driver.
The circuit shown in the book (10.7) shows 2 current sources. Is there any preference in particular for the choice of the topology of these current sources?
My basic idea is to use the type as I used for the tailcurrent of the IPS.
It is the one using 2 bjt's (I don't have the book here to indicate which figure...). Or is using just a zener referenced bjt current source sufficient? Or could it be interesting to place a real current source device ?
Thnx
Olivier
I will go for the diamond buffer driver.
The circuit shown in the book (10.7) shows 2 current sources. Is there any preference in particular for the choice of the topology of these current sources?
My basic idea is to use the type as I used for the tailcurrent of the IPS.
It is the one using 2 bjt's (I don't have the book here to indicate which figure...). Or is using just a zener referenced bjt current source sufficient? Or could it be interesting to place a real current source device ?
Thnx
Olivier
Hi Olivier,
One of the nice things about folded driver schemes is that the current source used with it is relatively unimportant, since the node it is pulling current from is a low-Z node (the output of an emitter follower). Another nice thing about some of these schemes is that the folded driver does not have high voltage on it if the collector is bootstrapped with signal. This means that a faster, lower-voltage transistor can be used for the folded EF. Finally, most of the power dissipation is bourne by the current source rather than the folded EF. Early effect in the driver is also somewhat reduced in folded EF schemes where the driver (or pre-driver) collector is bootstrapped with signal.
Bottom line, do what you please with the current source.
Cheers,
Bob
ops
Hi Bob, here is a first lay-out for an OPS based on your schematic (diamond buffer triple). You can see the current sources, the reference potential for the clamping diodes and the mosfets with base stoppers and zobels. It's only the OPS (the IPS-VAS is type current-mirror/mirror-image/darlington-cascoded VAS). There is no protection yet, nor output circuit, ... there is also only one output pair whereas I intend to use 4 or 5 of them.
Do you see any problems till here? Comments?
Oops I noticed the emitter resistors are a bit oversized with 680 ohm. I changed them with 0.2 ohms but the pdf is not changed...
But apart from that?
Thnx
Olivier
Hi Bob, here is a first lay-out for an OPS based on your schematic (diamond buffer triple). You can see the current sources, the reference potential for the clamping diodes and the mosfets with base stoppers and zobels. It's only the OPS (the IPS-VAS is type current-mirror/mirror-image/darlington-cascoded VAS). There is no protection yet, nor output circuit, ... there is also only one output pair whereas I intend to use 4 or 5 of them.
Do you see any problems till here? Comments?
Oops I noticed the emitter resistors are a bit oversized with 680 ohm. I changed them with 0.2 ohms but the pdf is not changed...
But apart from that?
Thnx
Olivier
Hi Olivier,
Nice to hear from you. I'll take a look at it tomorrow and provide some comments.
Cheers,
Bob
Hello Bob, AndrewT,
Damn it seems like I made some errors while redrawing my schematic from the simulation program to the schematics/pcb program. First I got the Re's copied/pasted without modifying the values and now I see the diodes are also just copied instead of mirrored... Shame on me !
However to make it right I hereby post the schematic from the simulation program to be sure ...
You will also see the IPS/VAS amp is also drawn. But that part is already tested and working on PCB (quite happy with results / however i have no thd analyser ... so it might not be that good if it comes to real measurement but I leave myself in good hope for now
any thanks if you are looking on the ops part as this is the next step i need to do... later comes : protection(s) / outputcircuits / etc...
Cheers
Olivier
Damn it seems like I made some errors while redrawing my schematic from the simulation program to the schematics/pcb program. First I got the Re's copied/pasted without modifying the values and now I see the diodes are also just copied instead of mirrored... Shame on me !
However to make it right I hereby post the schematic from the simulation program to be sure ...
You will also see the IPS/VAS amp is also drawn. But that part is already tested and working on PCB (quite happy with results / however i have no thd analyser ... so it might not be that good if it comes to real measurement but I leave myself in good hope for now
any thanks if you are looking on the ops part as this is the next step i need to do... later comes : protection(s) / outputcircuits / etc...
Cheers
Olivier
Hello Bob, AndrewT,
Damn it seems like I made some errors while redrawing my schematic from the simulation program to the schematics/pcb program. First I got the Re's copied/pasted without modifying the values and now I see the diodes are also just copied instead of mirrored... Shame on me !
However to make it right I hereby post the schematic from the simulation program to be sure ...
You will also see the IPS/VAS amp is also drawn. But that part is already tested and working on PCB (quite happy with results / however i have no thd analyser ... so it might not be that good if it comes to real measurement but I leave myself in good hope for now
any thanks if you are looking on the ops part as this is the next step i need to do... later comes : protection(s) / outputcircuits / etc...
Cheers
Olivier
Hi Olivier,
Wow, you've got a lot going on there, and is a little hard to follow, especially with so many SPICE annotations. It's a big schematic, so when I printed it out it was not legible, so I had to scroll by portions on the screen.
As near as I can tell, the DBT output stage looks right. Looks like you've got TMC. I got a bit lost in the IPS-VAS. Might you have some CMCL in there? I see a 0.5pF capacitor in the feedback path. I usually wince when I see a capacitor that small in an audio application, as the real world is not often kind to such a small capacitance.
Cheers,
Bob
Hello Bob,
Sorry for the (very) large schematic. It looks that way because the schematic in my PCB program is badly copied from the simulation schematic (what you see in my previous post). Unfortunatly it contains the whole amp schematich and not only the OPS. The current annotations were meant for Andrew who asked what the currents were.
However, there is indeed CMCL (and it works just fine ... finally -took a while-) and TMC. The 0,5pF is rather there to simulate one thing or another and it is also routed on the PCB but not populated (as I saw the prices for those caps can become outrageous).
I have some questions about the OPS as such :
1) Is the value of the gate stoppers correct? I read in your book it kills the speed ... I countered it with gate-drain zobels and using the small filter in the powerrails (as you mentionned in your book).
2) Are the values of those Zobels OK?
3) Is the filtering of the rails OK? Decoupling caps and also what about the little filter. My smallest resistors are 4,7 ohm ... in you book it's just 1 ohm.
4) Even though I like the current sources used. The Re resistor that sets the current is only 47 ohm to get around 10 to 12 mA (what I want)... It might be too small for thermal regulation? Is there a workaround or is it just fine that way?
5) Sorry if this question might be stupid but ... what sets the bias current now anyway for my mosfets? The Q bias in the VAS or the 22 ohm resistor in the driver stage?
Thanks & Cheers
Olivier
Sorry for the (very) large schematic. It looks that way because the schematic in my PCB program is badly copied from the simulation schematic (what you see in my previous post). Unfortunatly it contains the whole amp schematich and not only the OPS. The current annotations were meant for Andrew who asked what the currents were.
However, there is indeed CMCL (and it works just fine ... finally -took a while-) and TMC. The 0,5pF is rather there to simulate one thing or another and it is also routed on the PCB but not populated (as I saw the prices for those caps can become outrageous).
I have some questions about the OPS as such :
1) Is the value of the gate stoppers correct? I read in your book it kills the speed ... I countered it with gate-drain zobels and using the small filter in the powerrails (as you mentionned in your book).
2) Are the values of those Zobels OK?
3) Is the filtering of the rails OK? Decoupling caps and also what about the little filter. My smallest resistors are 4,7 ohm ... in you book it's just 1 ohm.
4) Even though I like the current sources used. The Re resistor that sets the current is only 47 ohm to get around 10 to 12 mA (what I want)... It might be too small for thermal regulation? Is there a workaround or is it just fine that way?
5) Sorry if this question might be stupid but ... what sets the bias current now anyway for my mosfets? The Q bias in the VAS or the 22 ohm resistor in the driver stage?
Thanks & Cheers
Olivier
Hi Olivier,
I'm sorry for having taken so long to get back to you. I somehow lost track of this post.
The values of the gate stoppers should be fine. My experience has mainly been with Verticals insofar as gate stoppers and Zobels, but it looks like the combination of gate stopper and Zobel values you use should be good.
I looked for the filters in the rails, but somehow missed them. In any case, the value of the resistor used is quite uncritical. If anything, some have argued that the 1 ohm value I used was too small. The 4.7 ohm resistor you use should be fine and still not drop too much rail voltage.
The type of current source you are using is quite tolerant over temperature due to its negative feedback. It should be fine with the 47 ohm emitter resistor.
The 22 ohm resistor in the driver sets the driver quiescent current. The bias spreader transistor still sets the output stage bias current. I like to err on the high side for output stage bias current in MOSFET designs, especially with laterals that are so tolerant. Of course, this assumes there is decent heat sinking. I'd try 200 mA per output pair.
Cheers,
Bob