Hi Abraxalito,
I agree that the area where we enter "soft TIM" is more important, and that the way in which distortion increases as we approach slew rate limiting depends on the input stage circuit and devices employed.
Some insight can be had if you look at Figure 7.4 in my book. There I compare a BJT LTP with a JFET LTP wherein the BJT LTP is degenerated to have the same small-signal transconductance as the JFET LTP. The JFET LTP is operated at twice the tail current to achieve the amount of transconductance that the BJT LTP achieves with 10:1 degeneration.
First note that the larger tail current in the JFET stage allows double the slew rate, since amplifiers designed with each stage will require the same Miller capacitor to achieve the same gain crossover frequency (because the transconductances of the two input stages are the same).
Notice from Figure 7.4 that the JFET remains active (somewhat linear) over a significantly larger input voltage swing, with a fairly soft clipping characteristic. Clearly, these two stages will approach slew rate limiting with different sub-slewing distortion behavior.
Finally, note that one could argue that this is an unfair comparison of BJT and JFET input stages that favors the JFET. One could argue that the tail current of the BJT stage could be increased to the same 2 mA as that of the JFET stage, resulting in 20:1 degeneration, and the same higher slew rate.
Cheers,
Bob
Bob,
I'm reading your book and finding it very well expressed. Your clarification of several concepts, particularly gm doubling, is both well written and clear. I find to my satisfaction that you don't much like the CFP output stage for AB either!!
Thank you for this contribution to the art, a worthy book, a huge amount of hard, dedicated work, and to my mind at least, it could become a benchmark in the literature.
Hugh
I'm reading your book and finding it very well expressed. Your clarification of several concepts, particularly gm doubling, is both well written and clear. I find to my satisfaction that you don't much like the CFP output stage for AB either!!
Thank you for this contribution to the art, a worthy book, a huge amount of hard, dedicated work, and to my mind at least, it could become a benchmark in the literature.
Hugh
I don't believe that a simulation is even needed, the amp should follow the theory very closely and I would agree that the gain crossover frequency is probably just above 1 MHz, however I don't believe that this necessarily makes it unstable. I'd be happy to post an approximate Citation 12 sim here in case you'd like to see it.
Just to be sure that we are on the same page, what would you want to see in terms of gain and phase margin, or any other measure to be satisfied with the stability of the Citation 12 amp?
It does have a 3 uH output coil which should more than help with typical capacitive loads used for testing.
just big enough to ensure you don't run out while waiting for dinner!
Sounds like an excellent method developed over years of experience feeding the current hungry clients.
Hi Hugh,
Thank you for these very kind words. The book was a labor of love.
And yes, I am not a big fan of the CFP output stage in its usual incarnation
.It is hard to beat the Locanthi T circuit (Triple), especially if one builds it with ThermalTrak transistors and pays attention to thermal bias stability.
Cheers,
Bob
Hi Pete,
Here is what I would like to see from a simulation of the Citation 12:
For loads of no-load, 8 ohms and 4 ohms,
Gain crossover frequency
Amount of closed-loop gain peaking (< 1 dB)
Phase margin (never less than 45 degrees)
Gain margin (never less than 6 dB)
As a matter of philosophy, I'm tempted to say that the gain crossover frequency of a power amplifier should never be higher than an octave below the ft of the output transistors (and usually wants to be considerably lower than that). With output transistors whose ft is only about 800 kHz, as a matter of philosophy I would consider a gain crossover frequency greater than around 500 kHz to be playing with fire for the Citation 12, but that is just my non-objective opinion.
For the sim, here is the quick and dirty thing I would do for transistor models that might be more reflective of those in use at the time. Use my MJL21194 NPN models for the output stage, but with TF multiplied by a factor of 5. Use the MJE243/253 for the VAS and drivers, but with TF multiplied by a factor of 5. For the input pair, use the 2N5401 model with TF multiplied by a factor of 2. I know this is borderline thoughtless handwaiving, but it is probably better than using models of modern transistors as-is, which would result in optimistic numbers.
BTW, when you do the DC sim of the amplifier, you can view the SPICE error log to see what LTspice is reporting for the ft and see if it is reasonably reflective of the transistors that were used at the time. My multiplication factors on TF could then be altered appropriately.
Cheers,
Bob
Supplementary material
I've had a few folks ask about the supplementary book material that is still not yet posted on my website. I feel badly that I have not yet been able to complete formatting and cleaning up the material to post. RMAF and AES and the planning for them has taken quite a toll.
The BJT models and the LTspice examples in the SPICE tutorial will go up first, hopefully within a week or two after I get back. Those will be followed in stages with the other material, like the MOSFET models, numerous amplifier simulations, and some simulations of circuit segments and stages.
Cheers,
Bob
I've had a few folks ask about the supplementary book material that is still not yet posted on my website. I feel badly that I have not yet been able to complete formatting and cleaning up the material to post. RMAF and AES and the planning for them has taken quite a toll.
The BJT models and the LTspice examples in the SPICE tutorial will go up first, hopefully within a week or two after I get back. Those will be followed in stages with the other material, like the MOSFET models, numerous amplifier simulations, and some simulations of circuit segments and stages.
Cheers,
Bob
Thanks, Damon. Exhibiting at the AES Convention has been a very exciting experience, and after one more day of it today I'll be able to get back to some technical stuff. The crowd was good and working with Jan is a pleasure. I've also enjoyed meeting a number of DIYers face to face that I had not met before. Great bunch of people.
Cheers,
Bob
i have the newer versions for compatibility.
but I still use visio technical 95.
pre microsoft.
Slightly OT, but for the record, let me add that it was a privelege for me to share these few days with Bob (and his lovely wife Angela) at our booth.
Bob and Angela, you are wonderfull people! Thank you very much!
I just had to say this. Now back to regular programming ;-)
jan didden
Hi Jan,
Thanks for the very kind words. It was great working with you and Angela and I greatly enjoyed our time with you.
Cheers,
Bob
Wow, I didn't hear that one! I did, however, hear a few say that they liked the sound of the Super Gain Clone. Part of the secret sauce is probably the Klever Klipper soft clip circuit.
Cheers,
Bob