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Old 7th February 2013, 10:22 PM   #2581
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Quote:
Originally Posted by Miles Prower View Post
"Class-D is the future".

Not really, it's been around for quite a few dog's ages now.
So? that doesn't stop it being the future. For a long time Class-D was rubbish but now there exists the combination of suitable devices and suitable understanding to make very not-rubbish class-D amplifiers.

With more and more high performance BJTs becoming EOL (i.e. most of the Japanese ones) I feel it's time to embrace the inevitable: class-D with high-order control loops can deliver amplifiers with higher fidelity over a wider range of operating conditions than any realistic (i.e., not one that doubles as a room heater and/or costs thousands of $ in parts and labour) linear amplifier. Having said that, for a little while there may be room for hybrid (linear + switch-mode) amplifiers.
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Old 7th February 2013, 11:10 PM   #2582
Bonsai is offline Bonsai  Taiwan
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"Definitely more attention to laterals. These days, the SS manufacturers are putting much more emphasis on switching type applications. Hopefully, more attention will make more devices useful for linear amplification more available. It's not good that this has been so thoroughly short changed lately. There are already more than enough sub standard SS amps on the market, and SS doesn't have to sound as horrible as it does all too often. However, sonic excellence still needs devices that can perform well in that application."

Very few people are laterals for switching applications nowadays. Most this has shifted to Trench technology, which has very low Rdson/mm2. These a great for class D but other than for a very few cases, the linear operating SOA is weak compared to conventional lats and verticals. The advantage of trench is that you can get very high cell densities, and the perfect place to make them is in a DRAM fab - preferably one that fully depreciated.
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Old 8th February 2013, 04:20 AM   #2583
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Originally Posted by HarryDymond View Post
Class-D is the future. More on Class-D! More on advanced high-order loops and how to make them stable...
Certainly more on nested and multiple loops and their stability! I already asked here for references because it's very hard to find useful information on this topic. Still on the lookout.
And more on LTP to VAS interconnections! Not much contributed to my current thread. Not sure if this is lack of interest or of information.
Class D will indubitably increase, it's just that I think it would be better to have really comprehensive core material and leave the class D to a separate book. A really excellent book and a possible second beats one book somewhat compromised by space restrictions. Kind of an aesthetic issue too. The class D is so clearly a distinct unit that it sticks out for a separate and probably more detailed examination.

Best wishes
David

Last edited by Dave Zan; 8th February 2013 at 04:28 AM.
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Old 8th February 2013, 06:00 AM   #2584
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Originally Posted by Dave Zan View Post
Certainly more on nested and multiple loops and their stability! I already asked here for references because it's very hard to find useful information on this topic. Still on the lookout.
You should investigate high-order sigma-delta modulators.
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Old 8th February 2013, 07:52 AM   #2585
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Quote:
Originally Posted by Dave Zan View Post
Certainly more on nested and multiple loops and their stability! I already asked here for references because it's very hard to find useful information on this topic. Still on the lookout.
And more on LTP to VAS interconnections! Not much contributed to my current thread. Not sure if this is lack of interest or of information.
Class D will indubitably increase, it's just that I think it would be better to have really comprehensive core material and leave the class D to a separate book. A really excellent book and a possible second beats one book somewhat compromised by space restrictions. Kind of an aesthetic issue too. The class D is so clearly a distinct unit that it sticks out for a separate and probably more detailed examination.

Best wishes
David
The problem with in depth design references is that they address mainly IC design. The objective of power amplifier topologies is reduction of distortion and stability. Ic design is also concerned by low power design, rail to rail, enough gain in submicron geometries, faisability of components, different matching performances, use of low voltage power supply
Therefore it is ( at least to me ) not obvious if the different advanced topologies found in IC design would have an advantage in amp design. At the very low level of distortion components, it is difficult to measure, simulate accurately and then rank these topologies.
The books of Cordel and Self are very interesting in this aspect but a comprehensive approach of the usefulness of different topologies in power amplifier design is still to be completed.

JPV
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Old 9th February 2013, 03:04 AM   #2586
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Originally Posted by HarryDymond View Post
You should investigate high-order sigma-delta modulators.
Multi-loop modulators look even more difficult to analyse than multi-loop amplifiers so I don't see how they help my comprehension
But thanks for the advice, I'll have a try, so where do you recommend I start?
Do you have any references?

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Originally Posted by JPV View Post
...
The books of Cordel and Self are very interesting in this aspect but a comprehensive approach of the usefulness of different topologies in power amplifier design is still to be completed.
JPV
Yes, that is my point. I want Bob to include advanced topics like multiple loops that are relevant but hard to find elsewhere without a lot of IC specific clutter.
And thank you for your comments in post #2573 that relate to my question about differential current mirrors.

Best wishes
David
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Old 9th February 2013, 10:29 AM   #2587
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Originally Posted by Dave Zan View Post
Multi-loop modulators look even more difficult to analyse than multi-loop amplifiers so I don't see how they help my comprehension
But thanks for the advice, I'll have a try, so where do you recommend I start?
Do you have any references?



Yes, that is my point. I want Bob to include advanced topics like multiple loops that are relevant but hard to find elsewhere without a lot of IC specific clutter.
And thank you for your comments in post #2573 that relate to my question about differential current mirrors.

Best wishes
David
The topology we are discussing is a typical example of an IC design where active elements are used to create gain because high resistors are not available as in discrete design.
IIRC, when M. Leach was asked why he didn't use current mirror load in the first stage of his amplifier, he said that he could generate enough gain with simply resistors. Self (again IIRC) measured that the use of a current mirror forces balance in the current of both transistors reducing even order distortion components. But if we use enough degeneration in th differential amplifier and if we gain back the loss by using high resistors and why not Fet's inthe Vas to improve loading, we could have the same performance without use of current mirrors and their own non linearities. Spice is not simulating very well Early distortion so to answer these questions, it is necessary to build and measure at this low level of distortion.


As a side remark, I would call the topology in Cordell's book: high impedance self biasing active load. Samuel's input is certainly as valuable.

JPV
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Old 9th February 2013, 12:35 PM   #2588
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Originally Posted by JPV View Post
The topology we are discussing is a typical example of an IC design where active elements are used to create gain because high resistors are not available as in discrete design.
Elevated impedance levels have their own problems with stray capacitance, non-linear device capacitance becomes more of a problem, noise pickup and so on.

Quote:
IIRC, when M. Leach was asked why he didn't use current mirror load in the first stage of his amplifier, he said that he could generate enough gain with simply resistors.
I plan to use a compensation scheme that can usefully exploit more feedback. Hence my interest.

Quote:
Self (again IIRC) measured that the use of a current mirror forces balance in the current of both transistors reducing even order distortion components. But if we use enough degeneration in th differential amplifier and if we gain back the loss by using high resistors and why not Fet's in the Vas to improve loading, we could have the same performance without use of current mirrors and their own non linearities.
More noise from increased emitter resistors of course. FETs in the VAS was looked at by Samuel and he had some concerns that I need to re-read. FETs in the OPS driver looks to have promise I think.

Quote:
Spice is not simulating very well Early distortion so to answer these questions, it is necessary to build and measure at this low level of distortion
Yes, MANY trade-offs to be explored! I just want to understand them better.

Best wishes
David
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Old 10th February 2013, 10:38 AM   #2589
JPV is offline JPV  Belgium
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Originally Posted by Dave Zan View Post
Elevated impedance levels have their own problems with stray capacitance, non-linear device capacitance becomes more of a problem, noise pickup and so on.



More noise from increased emitter resistors of course. FETs in the VAS was looked at by Samuel and he had some concerns that I need to re-read. FETs in the OPS driver looks to have promise I think.



David
High gain stage requires high impedance node.
You could generate overall high gain by cascading but then you have stability problems.
It seems that there are many trade offs like noise and distortion

JPV
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Old 10th February 2013, 10:49 AM   #2590
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I think local error correction and positive feedback are key. Think Baxandall CCS and Tringlotron. Edmond Stuart's TIS implements the former, but does not eliminate the intrinsic logarithmic transfer curve distortion. Although in this case the output stage generates most of the distortion anyways. If we correct transfer curve distortion, then we don't need to make the compromise of degeneration, or bother with "swamping out" nonlinearities. I think the field of BJT analog computing may hold great revelations in this regard. After all they are useful for this purpose because of the reliability with which they conform to their logarithmic transfer curve.
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