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Old 11th September 2012, 04:35 PM   #2441
jcx is offline jcx  United States
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a possible answer - at least the sim may help understanding the issue: optoisolator VAS bias for Comp Diff?
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Old 11th September 2012, 06:44 PM   #2442
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I was reading your book last night, and I came upon Chapter 7, p137, where you say that the VAS operating conditions for a double-input push-pull VAS with current-mirrors are not determined and so the circuit is unusable.
With a resistive input stage load, the voltage drop across the load resistors presents a well-defined DC bias voltage Vb to the second stage, equal to Vb = Rl*I/2 (with Rl the collector load resistor and I the tail current of one input stage). This bias voltage can then be used, usually together with an emitter resistor Re for the transistors in the second stage, to establish a proper bias current equivalent to Ib = (Vb - Vbe)/Re.

With a current mirror, there is no well-defined bias voltage to the second stage as the current mirror output is "floating", i.e. a high resistance current node. Under such conditions, the bias current of the second stage will be ill-defined, as it now is substantially dependent on hFEs and Early voltages of various transistors.

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Old 11th September 2012, 07:42 PM   #2443
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Originally Posted by Samuel Groner View Post
With a current mirror, there is no well-defined bias voltage to the second stage as the current mirror output is "floating", i.e. a high resistance current node. Under such conditions, the bias current of the second stage will be ill-defined, as it now is substantially dependent on hFEs and Early voltages of various transistors.

Samuel
Absolutely, but not so ill-defined that simulators can't solve it. I have tried two versions, with very different circuit values, and in both cases the DC bias point was found with no problems at all. Undoubtedly the answers depend on device characteristics, but an answer can be found.

One version was Bob's Fig 7.9, of which he says "see if you can calculate the VAS current.. You can't." Well, I could, and the answer is 15.8 mA. I was hoping Bob might come along and shed a little more light on his thinking there; the implication seems to be that the sensitivity to device characteristics is so great that any sort of operation is impossible.

However, another worrying thing about the configuration is that... it works. Mostly.

I built a model version with a push-pull EF-VAS and it is working very nicely about a foot from my elbow at the moment. THD is 0.00064% for 11Vrms out, 1 kHz. (genmon= 0.00041%) There was no tweaking or adjustment or selecting of devices. The VAS standing current appears to have adjusted itself to a very low value (a few tens of uA) but despite this the linearity is extraordinarily good. The fox in the ointment is that there are some nasty HF stability problems when it is driven with higher frequencies, eg 20 kHz, and this may well be rooted in problems with current indeterminacy.

None of this should be taken as meaning I think that the current-mirrors are a good thing in a push-pull VAS, nor indeed even that I think a push-pull VAS is necessarily a good idea. There is clearly more research needed...
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Old 11th September 2012, 07:47 PM   #2444
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Originally Posted by AndrewT View Post
There are Threads discussing this.
Slone (or is it Sloan?) presented a double complementary input with mirror loading.
Some builders copied from his book and the circuit does not work.
Would that be Fig 4.10a in the 1st edition?
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Old 11th September 2012, 08:06 PM   #2445
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I think when he put in his book "...you can't..." he meant to say one can't calculate a bias current the usual way that only resister values and p/n junction drops are involved that one does not have to worry about the exact value of the Hfe, Early effect and such.....
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Old 12th September 2012, 12:44 AM   #2446
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Originally Posted by DouglasSelf View Post
Hi Bob,

Hope all is well with you.

I was reading your book last night, and I came upon Chapter 7, p137, where you say that the VAS operating conditions for a double-input push-pull VAS with current-mirrors are not determined and so the circuit is unusable. (See Fig 7.9.)

I don't follow your thinking here; could you explain a bit more?
Hi Doug,

I'm sorry I'm late to get onto this. It looks like you have already gotten some pretty good answers. The circuit in Randy Slone's book is where I first saw this problem circuit. Most of us like current mirror loads for a lot of good reasons you and I have explained. Many of us also believe strongly in a push-pull VAS. Many also like the symmetry of the double complementary input stage (it looks so nice and symmetrical when you draw it, at least). Put those ideas all together and you get this problem circuit.

The key to understanding the problem is that it is at minimum unwise to design a circuit that depends on the non-ideality of the devices. For this reason, we must be able to calculate the VAS standing current with infinite beta and no Early effect in the NPN and PNP VAS Darlinton pairs. We must also assume no Early effect in the other transistors as well. But now we must also factor in other real-world mismatches, like input transistor diff pair Vbe offset and differences in emitter degeneration resistor values due to tolerance. It is then easy to see that one can arrive at virtually any VAS standing current, given small mismatches and extremely high beta transistors.

I'm surprized that you were able to calculate a standing current value, and I'm gussing you had to make some assumptions about finite beta, etc.

I suspect a SPICE run will readily show the problem if you use high-beta transistors and make all of the degeneration resistors 470 ohms except one in my Figure 7.9. Take that one and vary it from 440 to 500 ohms, and you should see the VAS standing current go all over the place.

Note in Figure 7.10 I show how to greatly mitigate this problem in this circuit while still retaining most of the advantages of the current mirrors. I just add a helper transistor to the current mirror and add some "load" resistance.

Cheers,
Bob
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Old 12th September 2012, 07:44 AM   #2447
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Absolutely, but not so ill-defined that simulators can't solve it.
It's not un-defined, it's ill-defined.

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The VAS standing current appears to have adjusted itself to a very low value (a few tens of uA) but despite this the linearity is extraordinarily good. The fox in the ointment is that there are some nasty HF stability problems when it is driven with higher frequencies, e.g. 20 kHz, and this may well be rooted in problems with current indeterminacy.
That's exactly the problem. The quiescent current is just a random, uncontrollable value. It could also have been some dozen of mA, heating the transistors till they glow...

Samuel
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Old 12th September 2012, 06:35 PM   #2448
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Hi Guys

I have greatly enjoyed both Doug Self's books and Bod Cordell's book. Thanks for writing them!

I think if one surveys a lot of amp schematics - ones for production amplifiers that perform well and/or have stood the test of time - you see a general approach with respect to the use of current-mirror loads for input stages:

Single-diff stages use CMs if they generate a single-ended output to the VAS, which itself works against a current source.

Single-diff amps producing push-pull drive to the VAS generally use resistive loads as this makes defining the push-pull currents easier. Besides, the push-pull VAS has twice the gain of a single-ended one, so extra gain in the diff that a CM might provide is not required. Bob's current-mode loads work very well if one is willing to add the extra buffers to drive it. It also provides a circuit monitoring point where one can generate anti-clipping circuit control signals.

Complimentary-diffs almost universally use resistive loads. Again, easy definition of current in the push-pull VAS, and gain is doubled by virtue of the second diff and more added by the push-pull VAS.

I appreciate Doug's having to build to budget and trying to keep parasitic demons at bay by using the simplest audio path, but the double-diff with resistive loading and push-pull VAS takes about the same amount of total circuitry as the CM-loaded single-diff with CCS-loaded VAS. Even with unmatched devices, both give credible DC and AC performance. With matching, performance can be "taken up a notch". Since the CM can add noise just as the second diff can, it looks like it comes down to what Bob said earlier in this thread, that you pick which dragons to sley. In both overall arrangements, similar slew rates are attained.

Like Doug, I prefer CFP output stages. The potential for best use of the rails is one detail, and the option for having a local feedback loop in an enhanced-beta CFP is another, as one can have nested loops - one around the output stage and the global loop. I like the push-pull VAS because of its high available drive current and symmetry. Where in the past I would have stuck CMs into the comp-diff front end to eliminate critical resistor load values, I am more inclined these days to figure those out. I think the criticality may be moreso for single-ended output than for push-pull.

I've built lots of amps with both the CFP output and the EF-T without any oscillation issues. Guess I've been lucky.

Keep inspiring us!

Have fun
Kevin O'Connor

Last edited by Struth; 12th September 2012 at 06:39 PM.
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Old 12th September 2012, 06:49 PM   #2449
wahab is offline wahab  Algeria
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Originally Posted by Samuel Groner View Post
It's not un-defined, it's ill-defined.

That's exactly the problem. The quiescent current is just a random, uncontrollable value. It could also have been some dozen of mA, heating the transistors till they glow...

Samuel
It work , but not with Slone s version , while the improvement
that can be seen in Bob Cordell s book is not enough to make
the circuit working systematicaly.

As pointed by Bob , simulators allow right resolution of the intrinsical
equations , so much that a proper design with robust stability can
be designed using components that have relatively large caracteristics dispersion.
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Old 12th September 2012, 07:08 PM   #2450
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Originally Posted by Bob Cordell View Post
Hi Doug,
I'm surprized that you were able to calculate a standing current value, and I'm guessing you had to make some assumptions about finite beta, etc.
Bob
All I did was ask the simulator for a DC bias point! Obviously that uses all the parameters in the SPICE models. I was expecting some wild answers; it was getting reasonable values of VAS current twice that started me thinking.

Thank you all for your input. I thought this subject would benefit from a bit of ventilation. I must admit to being intrigued by the very low THD produced by a circuit that in theory cannot work at all. I will try to find how it does with such a tiny standing current when I get some spare time. (hollow laughter)

I note one of the recent posts has disappeared.

Now here's a thought... the root of the problem here is that we have two mirrors. There is nothing to stop us making a double-input push-pull stage that has only one current mirror. The non-mirror input stage will define the VAS standing current and the single mirror will accommodate itself to that. I have just built a model amplifier on those lines and it works very well, with pleasingly low distortion.

A configuration is born.
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Last edited by DouglasSelf; 12th September 2012 at 07:12 PM.
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