I wonder which "two more famous colleagues" he was referring to here.
I look forward to buying what I hope will be a much revised second edition of your book, Bob, given the amount feedback you've received on this forum, provided it contains no incorrect allusions to the non-existent "VAS" in the Thompson topology and its derivatives.
Hi Mike,
I'm honored if it is being implied that I am one of those two colleagues
.I hope I'm not showing my ignorance, but where does the term "Thompson topology" come from? Who was Thompson?
Let me be clear about one thing concerning the VAS/TIS naming controversy. I agree completely that the middle stage of the traditional 3-stage amplifier topology does indeed operate like a transimpedance stage over a wide range of relevant frequencies when the three-stage topology is Miller compensated.
This poor horse has been beaten to death and by now processed into glue
.Cheers,
Bob
The amplifier topology discussed in great detail by you and Douglas Self in your books was attributed to J. E. Thompson by Messrs Russell and Solomon:
Russell, R. W., and Solomon, J. E., ‘A High-Voltage Monolithic Operational Amplifier’ IEEE Journal of Solid-state Circuits, Vol. SC-6, NO. 6, December 1971, pg 352.
See attachement.
And here is one more reason. Most op are designed such that they can be operated on single supply with a resistor voltage divider for biasing. This is more desirable for battery operation. If a compensation relied on being grounded it would chop out some of market for these things.
What I miss is the compensation pins which made it possible to do what a ground pin could.
The op amps in the AP sys1 oscillator use a two pole compensation with the 5534's.
Cheers,
What I miss is the compensation pins which made it possible to do what a ground pin could.
The op amps in the AP sys1 oscillator use a two pole compensation with the 5534's.
Cheers,
if you did analog op amp design you should have read the "General Relationship..." paper long before retirement
but for current generation op amps I would guess the unavoidable parasitics involved in bringing any additional node to a output pad/pin could change the calculation of the potential utility
the fuly differential in/out op amps do beat the "General Relationship..." paper's 5-pin op amp limiting CMRR, PSRR with open loop gain relation
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This poor horse has been beaten to death and by now processed into glue
Will leave the poor horse/adhesive alone
.But it has been a topic because it's not just nomenclature but also reflects how we analyse or otherwise think about the circuit.
A proper network analysis matrix, à la Bode/Cherry models all the amplifier blocks as transimpedances and includes all the loads as nodal impedances that are quite clearly defined.
The typical 3 section block picture doesn't capture some of the essential aspects. Some of the disputes seem to arise because amplifier blocks are not treated consistently. This may reflect different ways to allocate the node impedances, either as a output impedance in one block or an input impedance in the next. Similarly to simply model the OPS as Av=1 without consideration of Ai seems incomplete because it doesn't show how load impedances will be reflected.
I have had a few ideas but would be interested to learn how industry veterans like Bob and Scott think about these issues.
Are there references for this, or is it a just quirk of my education in the Maths/Science faculty rather than EE?
Best wishes
David
Will leave the poor horse/adhesive alone
But it has been a topic because it's not just nomenclature but also reflects how we analyse or otherwise think about the circuit.
A proper network analysis matrix, à la Bode/Cherry models all the amplifier blocks as transimpedances and includes all the loads as nodal impedances that are quite clearly defined.
The typical 3 section block picture doesn't capture some of the essential aspects. Some of the disputes seem to arise because amplifier blocks are not treated consistently. This may reflect different ways to allocate the node impedances, either as a output impedance in one block or an input impedance in the next. Similarly to simply model the OPS as Av=1 without consideration of Ai seems incomplete because it doesn't show how load impedances will be reflected.
I have had a few ideas but would be interested to learn how industry veterans like Bob and Scott think about these issues.
Are there references for this, or is it a just quirk of my education in the Maths/Science faculty rather than EE?
Best wishes
David
These are good points, David.
Sometimes it also depends on whether we are modeling the device or the block with some of its surrounding circuitry. For example, in my book, I like to model both the IPS and VAS as transconductance blocks. The VAS then realizes its macroscopic function by the feedback and other components areound it. For example, the classic Miller capacitor changes the larger VAS block into a transimpedance over the frequency range the the shunt feedback from the Miller capacitor dominates.
In a lag-compensated amplifier, or one with no feedback, the VAS is more often acting like a voltage amplifier.
In MIC, where the Miller compensation is fed back to the input stage, it is more difficult to argue that the VAS is a transimpedance stage.
With TMC, where over most of the frequency range the compensating shunt feedback comes from the output of the amplifier, is the VAS a transimpedance stage? Not sure.
My personal view is that the term VAS describes the stage in the amplifier where the voltage becomes large. That better covers the general case than a description like TIS that is fairly narrow and more specific.
Your point about where the input and output load resisatance of a stage are assigned is also a very good one. For example, in an amplifier with a resistively-loaded IPS and a two-transistor VAS, the input stage can quite reasonably be considered as a voltage amplifier. In that case, the VAS is also a voltage amplifier whose gain is established by the product of its transconductance and its load impedance (which often varies a lot depending on the current gain of the output stage and the load on the amplifier. But the moment you reach the frequency where the Miller compensation kicks in (if there is Miller compensation), then the descriptions of these stages that are most appropriate may change.
Cheers,
Bob
With all forms of Miller compensation (including TPC and "TMC") the second stage is a TIS because it has shunt-shunt local negative feedback.
An amplifier stage is defined by its transfer function and not by the quantity at its output. Therefore, a voltage amplifier is one which takes a voltage at its input and delivers a voltage at its output, and a transimpedance amplifier is one that takes a current at its input and delivers a voltage at its output, etc.
A resistively loaded differential input stage is still a transadmittance amplifier, albeit a deeply compromised one.
It still delivers a current output for a differential voltage input, but is suboptimal because its output impedance no longer approaches that of an ideal current source. The latter is required for maximal current transfer between the input stage and the TIS.
To put it differently, a current mirror is required for the input stage to minimise loading between the input stage and the second stage, and to introduce symmetry in the current delivered by the input stage to the TIS.
Transadmittances really, that is consistent with classical network theory matrix approach and is my preference also.
Yes, that is an example of the arbitrariness. Do you count the Miller capacitor (say) as part of the VAS/TIS.
My point is to avoid any nomenclature debates and just have numeric values that are not a matter of opinion.
It's all transadmittances. Just that some of them have extreme values of input or output admittance.
It's transadmittances all the way down
Best wishes
David
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Another consideration, it is very difficult to get a good Ground Noise Rejection Ratio.
I suppose if one had a cascoded input stage and was routing the Miller compensation capacitor back to the emitter of one of the cascodes, then it might be helpful to be able to reference the cascode bases to a clean analog ground, but this would not be an example of bringing out an op amp ground reference.
Cheers,
Bob
I would think that bringing out the VAS node to one of the pins would in general be more useful than a ground pin. Some opamps do this, but a lot don't. This would allow more widespread use of TPC for example.
I did a sim using an LT1115 recently and was very surprised to find the loop gain at 20 kHz was only about 36 dB. TPC would probably have allowed me to add another 20 dB at 20k. Note, the opamp was driving an output buffer, so the complex to deal with some slow output devices.
In the case of CFA's, this would also allow the use of 'Alexander' compensation with benefits in speed and bandwidth.
I did a sim using an LT1115 recently and was very surprised to find the loop gain at 20 kHz was only about 36 dB. TPC would probably have allowed me to add another 20 dB at 20k. Note, the opamp was driving an output buffer, so the complex to deal with some slow output devices.
In the case of CFA's, this would also allow the use of 'Alexander' compensation with benefits in speed and bandwidth.
A VCCS - that would be quantified as a transadmittance.
You have probably read Kent Lundberg's "Control-Centric Tutorial" analysis on the "so called" pole split. Any comments?
I have started to work on MillerInputComp and like his approach.
Nice to see it posted. Unpublished papers are a waste. At least send them to me if you don't want to post them
Best wishes
David
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As I noted to Mike above, I have started to work on MIC.
Your book has an introduction to MIC compensation but you must delved deeper for your own MIC compensated amp.
Did you do any analysis or was it Spice and/or experiment?
Any references or comments?
Best wishes
David