Bob Cordell's Power amplifier book

The good news remains that this instability is visible in the closed loop response. This underlines the importance of observing the closed-loop frequency response of the amplifier out to 100MHz or so (without an input filter!).

Of interest, the peak in the closed loop frequency response occurs roughly at the frequency at which the unstable minor loop gain becomes unity.
 
I've done some sims with Michael's #3170 circuit. As this is not a complete amplifier ... no load, no Zobels, output inductor, some strange choices of currents, resistor values & operating points etc ... it is likely that it would be unstable with 'real life' loads and have poor THD. :eek:


What is "strange" about my "currents, resistor values & operating points etc"?:eek:
 
How about capacitors ? Charge up a cap & then discharge it FULLY, & then watch the voltage rise. Not much i agree, but it does ! Also for eg, sample/hold caps don't retain their voltage forever.

This is Dielectric Absorption. See Wikipedia for a first-order pass at how it works, and some general information on specific capacitor materials. Some of the cap manufacturers have app notes on it. Google is your friend.

This *might* be a consideration in audio amps, but with judicious choice of materials, the effect can be controlled, if not eliminated. As a former engineer in instrumentation, which deals with frequencies asymptotic to DC (and immunity to EMP effects and frequencies above, say, 1MHz) , I can tell you in no uncertain terms that dielectric absorption can drive you absolutely batty. Especially in 5-or 6-digit precision circuits and especially especially when they have to operate within spec from -55C to 85C. And where those performance levels are 100% measured. A given cap type from a given manufacturer might work fine in date code 0342 and not work in date code 0517, because the humidity at the film supplier was unusually high at that time in 2005. Etc. The list of batty-driving variables is pretty long.

Now, as to this audio business, these simulations are all pretty interesting, to be sure, but I have a feeling that they've being refined to a knife-edge, and NO ONE is looking at temperature effects. Oh, you say, no one operates audio amps at anything other than 25C? Really? Hmmm.

I think this "memory effect", aside from dielectric absorption, is pretty much baloney and just another term for "I failed to develop a design that works properly over a realistic ambient temperature or while it's warming up." And the DA part of it, for audio purposes, should be completely mitigated by judicious choice of capacitor type (was it kgrlee who was insisting on silver-micas in critical spots?) . Ideally, your amp shouldn't HAVE that many caps in the signal path in the first place, much less those for which DA is ever a consideration.
 
please read Pease - Capacitor Soakage article

shows linear model of DA - you can put the numbers to the resulting deviation of the filter transfer functions - not within orders of hearing frequency response jnd thresholds

and despite(? - or because of) the audiophile cred Silver Mica is worse on measured DA than any of the better films, NP0 ceramic or even the better performing Mylar cap he plots

http://web.archive.org/web/20050520075758/http://www.national.com/rap/Application/0,1570,28,00.html

Intusoft Newsletter, January 2002, Capacitor Soakage
 
Last edited:
Not true. If other distortons dominate, why is it possible to routinely design amplifiers with less than 7ppm THD at LF?

Because other distortions dominate. Which is the same as saying thermal distortion provides a negligible contribution. I never said thermal distortion was significant or measurable. I only said it exists. Period. It's just physics. So, it is not a main player. So what?

On the contrary, you need to avoid the sticky pseudo science trap of inventing solutions to non-problems.

Whether it is a non-problem is not your call. It is up to the person working with the actual circuit. If I measure thermal distortion, I will know the solution rather than needing to go and ask you if it "exists" or not. It's part of me being my own person. I can troubleshoot my own circuits, thank you.

Thermal distortion, which has nothing to do with this new fangled "memory distortion", only occurs in detectable quantities in monolithic op amps whose input stages are heated by the output stage. see below:

http://ece.wpi.edu/~mcneill/524/handouts/solomon.pdf

I was under the impression that memory distortion and thermal distortion were the same. What's the difference? Is memory distortion supposed to be an independent mechanism in the semiconductor?
 
Originally Posted by Lawnmower1

This is Dielectric Absorption.

Indeed you're right, Thanks i did know about it. I just thought the "possible" memory effects "might" be a candidate for consideration though.

I was interested to hear about your EMP effects work. I can guess who for ;)

@ jcx

Thanks for the link :)

I noted that Bob Pease mentioned my earlier comments

In this paper, Pease outlines the historical problem with capacitors remembering their previous charge by recovering some of the original charge after a brief discharge. This was originally recognized as a low frequency problem, plaguing circuits using certain capacitor dielectric materials for integrators. Later, the widespread need for sample and hold circuits for digital interfaces caused the problem to be revisited for higher frequencies.

Intusoft Newsletter, January 2002, Capacitor Soakage
 
"Thermal distortion"?? "Memory distortion"?? "Part of being [your] own person"? What kind of nonsense IS this? Have you actually designed and built something that went into production? Didn't think so. Good grief. Next up: $300 power cords.

This is getting sillier and sillier as this thread goes on. Unless all you're interested in is building one-off lab curiosities that operate at 25+-0C , all these simulations ultimately mean very little without doing worst-case and Monte-Carlo analysis with real parameters. Which, BTW, hasn't once raised its ugly head in this entire thread. Otherwise, I'll grant you, this is a useful academic exercise in the subtleties of discrete design, but if you're seriously interested in building something stable, durable, and reproducible, and that's still going to be performing somewhere around the initial requirements 10 years downstream, you're just wasting your time worrying about "memory distortion" et.al.
 
Oh, and BTW, quantifying dielectric absorption can be an exercise in futility. While the models for it hint around at what it does, the sample-to-sample variations can cause plenty of problems. And then when you add in thermal effects, you're pretty much on the verge of chucking it all and moving to Fiji. Fundamentally, the problem with this is that none of it is specified or guaranteed. You probably won't (well, not that I've ever seen, anyway) any cap manufacturer even mention DA on a data sheet, much less characterize or (heaven help you) guarantee the effects. So you're pretty much on your own. You try to choose wisely and play the probabilities.

Honestly, this is one reason why I don't have nearly as much hair as I'd like to have.
 
Hi Mike,

You're right, I was responding to an earlier post of yours before I saw this one. Thank you for posting this closed loop simulation with my component values.

I have been doing many, many simulations yesterday and today, and I think I have discovered a big piece of the answer.

First and foremost, I have some egg on my face.

My amplifier, as originally published and simulated, had virtually none of the problem we are talking about here.

BUT, that work was done before I came up with my set of Cordell Models. To make a long story short, the absence of the problem in my simulation was faulty INDUSTRY models! Yes, isn't that ironic. When I re-did the sims of that amp with my own published models the peaking showed up; not as bad as yours, but noticeably there.

When I changed the models, I was desperately looking for anything that could be hiding the problem and causing the differences between our results. I replaced transistor models one at a time, starting from the input, then simulating closed loop response, which was a good indicator of this local instability. The MJE243/244 were the bad guys. I do now recall that the OnSemi models for them were particularly bad when I was doing my own models.

It is interesting, however, that this instability would be influenced to such a degree by the model of the center EF in a Triple. Moreover, even with my good 243/244 models, the degree of instability is greatly reduced by the presence of the output R-C Zobel network (8 ohms in series with 0.05uF).

This instability phenomenon is quite sensitive to the impedance in the VAS collector circuit. In my circuit with my models, adding only 50pFto ground at that node reduces the peak from 6dB (at 36MHz) to a flat shoulder (no Zobel in place). This is happily less than the 200 or so pF you mentioned as necessary.

Even without the cascode, there is slight evidence of this instability, by the way. The lower output impedance of the non-cascoded VAS appears to be at least partly responsible for mitigating the instability.

Although I have not completed all of the simulations, it also appears that the Darlington cascode has little if any such instability when it is driving the heavier load of an output double, as compared to a Triple.

So to some extent, some of this instability may be attributable to a confluence of the cascode and the much lighter loading of the Triple (but, as mentioned above, even the Triple still allows mitigating influences in the output chain to have an effect).

Adding a 50pF load to the VAS is not the only cure. It turns out that adding a 100pF load to the output of the IPS current mirror also does the trick. My definition of doing the trick is to reduce the peak to less than 2dB.

Finally, and perhaps most interesting, is the following solution. Put a 100-ohm resistor in series from the emitter of the VAS EF to the base of the main VAS transistor AND connect a 10pF capacitor from the collector of the VAS cascode to the base of the main VAS transistor. This allows some bypass of high-frequency feedback directly to the base of the main VAS transistor. This scheme is nice because it introduces very little additional loading on the VAS output node.

A 100pF from base to emitter of the EF preceding the VAS transistor also mitigates the problem, but a bit less effectively.

There is probably more to this saga, but that is pretty much all for now.

The good news remains that this instability is visible in the closed loop response. This underlines the importance of observing the closed-loop frequency response of the amplifier out to 100MHz or so (without an input filter!).

A cautionary note is that some of this sort of thing might be possible even without the cascode, when an EF-VAS is used with a Triple output stage. Indeed, there is even a chance that some of what is going on here is partly playing a role in some instability that has been attributed to Triple output stages in some situations.

This may be linked to my preference for putting a series R-C (e.g., 100pF and 100 ohms) from the VAS node to ground even in designs where I am not using a cascoded VAS.

There still may be some interactions between the Triple and the Darlington cascode that go beyond simple loading of the VAS node.

Anyway, this has been an interesting journey, and I have learned from it.

Cheers,
Bob

Hi Bob and Mike

It is well known that in a Miller compensated second stage VAS, the pole splitting
increases by increasing the miller capacitor AND by increasing gm of the VAS. So, stability of the main loop can be improved by increasing the VAS current.

In discrete design there is no power requirement like in opamp; is it not good therefore to try increasing gm of Vas to improve stability before trying to use capacitors or feedback compensation?

JPV
 
I finally traced the problem to an extra Line Feed/Newline in one of the BJT_models.txt that you provided. Your models now work.
___________________

Bob, if I may suggest yet another 'cure' ...

This is to decouple the VAS emitter resistor with 1n or something smaller.

I have this from late 80's when trying to make 'pure Cherry' work. It is essential to that technique especially when applied to 'enhanced VAS + EF2' but is useful with other compensation methods too as it directly targets the 'inner loop' [*] while keeping the VAS output clean.

I've done some sims with Michael's #3170 circuit. As this is not a complete amplifier ... no load, no Zobels, output inductor, some strange choices of currents, resistor values & operating points etc ... it is likely that it would be unstable with 'real life' loads and have poor THD. :eek:

However, it IS an 'enhanced VAS + triple' so might be worth looking at. I'll post tomorrow.

If you have a working .ASC of your latest sim, I would much appreciate a copy.

I have to declare my prejudice against evil triples, and any compensation that besmirches the Holy HiZ of the VAS output .. ie practically all methods except 'pure Cherry'. The problems you describe are responsible for some of my dislike of triples and evil fancy VAS, IPS etc. Hence my search for simple stuff that will do 1ppm THD @ 20kHz :D


[*]Even plain Miller around a single BJT VAS has an 'inner' loop.

Hi kgrlee,

Sorry I am late to respond to your request.

Please find attached 4 asc files of the amplifier sims dealing with the Darlington VAS instability issue.

The first (_2a) is the amplifier wiithout any fix and without an output zobel. It exhibits a relative closed loop peaking of 7dB at 35MHz.

The second (_2az) has the output Zobel network series R-C of 8 ohms and 0.05uF added. It exhibits no relative peaking above ULGF around 28MHz, but a flat region ("shoulder") in that region.

The second simulation shows the rather strong stabilizing influence of using a Zobel network. Output stages themselves can be prone to reduced stability in the absence of a Zobel network (that's why we use them).

The third simulation (_2b) is the amplifier with a stabilizing 50pF capacitor to ground from the VAS output node. No Zobel. It exhibits only 0.1dB peaking at about 28MHz.

The 4th simulation (_2bz) is as above, but with the Zobel network. It exhibits a continuous negative slope of the closed loop response.

Simulations with 100pF loading the output of the IPS mirror showed even slightly better mitigation/removal of the closed-loop peaking.

In the earlier post I stated that an R-C network from the output of the cascode of the VAS and connecting to the base of the main VAS transistor, the R being in series between the emitter of the EF and the base of the VAS, was found with additional simulations to be not reliable and sensitive to the nature of the output stage. I do not recommend that approach.

Cheers,
Bob
 

Attachments

  • F3_12 VAS Eval 2a.asc
    8.2 KB · Views: 59
  • F3_12 VAS Eval 2az.asc
    8.8 KB · Views: 51
  • F3_12 VAS Eval 2b.asc
    8.4 KB · Views: 76
  • F3_12 VAS Eval 2bz.asc
    8.6 KB · Views: 59
The second (_2az) has the output Zobel network series R-C of 8 ohms and 0.05uF added. It exhibits no relative peaking above ULGF around 28MHz, but a flat region ("shoulder") in that region.

The second simulation shows the rather strong stabilizing influence of using a Zobel network.

I would be hesitant to assert that an a RC shunt network at the output of the amplifier mitigates instability in the minor loop. After all, said RC network is outside the minor loop and shouldn't have any effect on it.

Have you established whether the peaking also disappears at the TIS output node?

Have you simulated minor loop transmission before and after introducing the RC network at the output of the amplifier?
 
I would be hesitant to assert that an a RC shunt network at the output of the amplifier mitigates instability in the minor loop. After all, said RC network is outside the minor loop and shouldn't have any effect on it.

Have you established whether the peaking also disappears at the TIS output node?

Have you simulated minor loop transmission before and after introducing the RC network at the output of the amplifier?

Hi Mike,

One should not be surprized that the output Zobel affects circuit stability, based on the things we have seen so far. Without having seen those things, it might be non-intuitive that the Zobel would affect the minor loop stability, since the Triple would seem to be a quite effective buffer.

Unfortuantely, this is not the case. The minor loop is quite sensitive to the impedance at the output of the VAS - this should not be a surprize. At the same time, my blunder of at first using off-shelf OnSemi models for the middle EFs of the Triple demonstrates that sensitivity.

Your assertion that the Zobel is "outside" the minor loop is only true in the case of a perfect output buffer.

I have verified that the same peaking behavior exists at the VAS output as at the output of the amplifier, in both cases. So, yes, the peaking also disappears at the VAS output node.

I have not simulated minor loop transmission for the two cases.

Cheers,
Bob
 
I have not simulated minor loop transmission for the two cases.

Try running a minor loop gain simulation with an ideal output stage (i.e. unity gain VCVS) and compare the results with those obtained with a non-ideal output stage with and without the output shunt RC network.

I suspect the instability of the the three transistor TIS is entirely due to the singularities introduced by the third transistor in the TIS loop and little or nothing to do with the output stage or its singularities.
 
Last edited:
I was under the impression that memory distortion and thermal distortion were the same. What's the difference?

No, definitely not the same thing. I think "memory distortion" is somewhat of a misnomer and that's where the confusion starts.

Thermal distortion is used to refer to phenomena that arise from parts of the amplifier (usually the input stage) changing temperature at a rate equal to that of the rate of change of the music signal - i.e. the temperature rises and falls with the instantaneous value of the signal. Thermal time constants tend to be long, so if this is going to happen at all, it will only happen with low-frequency audio signals. It is a cause of low-frequency THD in chip/IC amplifiers (entire amplifier on a monolithic integrated chip) but pretty much never happens in discrete amplifiers unless you do something really silly like mount the differential input pair on to the back of the output transistors.

Memory distortion is to do with modulation of the amplifier's transfer characteristic over much longer time periods. e.g. at one point in time the amplifier has 0.0012% 2nd harmonic, 0.0009% 3rd harmonic distortion, but seconds later has 0.0018% 2nd harmonic and 0.0011% 3rd harmonic.