Bob Cordell's Power amplifier book

You can also provide effective VAS/TIS current limiting by cascoding the amplifer transistor(s) and then inserting a resistor between the amplifier transistor collector and the cascode emitter.

Actually, this doesn't work very well. This is because the current limiting transistor would have to work against the voltage reference setting up the bias for the common base element of the cascode. The current in the bias voltage reference would have to be reduced to zero before current limiting can take effect.
 
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Actually, this doesn't work very well. This is because the current limiting transistor would have to work against the voltage reference setting up the bias for the common base element of the cascode. The current in the bias voltage reference would have to be reduced to zero before current limiting can take effect.

Clearly i am not explaining myself clearly enough. Sim it. It works. :)
 
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I am referring to the Miller compensation loop.

Yes, I have actually been looking more deeply into this lately.

This may be exacerbated by amplifiers using a Triple EF in the output stage when the VAS is very lightly loaded. I have in some designs used a Zobel shunt on the VAS output node to tame this (~100pF, 200 ohms). The phenomenon shows itself as a shoulder or small peak in the closed loop frequency response of the amplifier at 10MHz or above, well beyond the main loop gain crossover. This, of course, does not make it not a concern. It is often not seen in simulations that go only to 10MHz. Simulations need to be done to 100MHz.

At high frequencies, where the Miller capacitor impedance is very low, it is useful to view the signal circulating in this loop as a current. Nearly all of the current from the VAS collector is returned to the base of the Darlington EF transistor. Well above fbeta of the two transistors in the VAS, the current transmission will see two poles from the transistors, creating a 180 degree phase lag, and causing a positive feedback situation (although the loop current gain is still well above unity at 10MHz). At minimum, this may be a conditional stability situation, but is is easy to see that there will be some gain enhancement even if there is no oscillation.

Stay tuned.

Cheers,
Bob
 
Yes, I have actually been looking more deeply into this lately.

This may be exacerbated by amplifiers using a Triple EF in the output stage when the VAS is very lightly loaded. I have in some designs used a Zobel shunt on the VAS output node to tame this (~100pF, 200 ohms). The phenomenon shows itself as a shoulder or small peak in the closed loop frequency response of the amplifier at 10MHz or above, well beyond the main loop gain crossover. This, of course, does not make it not a concern. It is often not seen in simulations that go only to 10MHz. Simulations need to be done to 100MHz.

At high frequencies, where the Miller capacitor impedance is very low, it is useful to view the signal circulating in this loop as a current. Nearly all of the current from the VAS collector is returned to the base of the Darlington EF transistor. Well above fbeta of the two transistors in the VAS, the current transmission will see two poles from the transistors, creating a 180 degree phase lag, and causing a positive feedback situation (although the loop current gain is still well above unity at 10MHz). At minimum, this may be a conditional stability situation, but is is easy to see that there will be some gain enhancement even if there is no oscillation.

Stay tuned.

Cheers,
Bob

Putting 2 transistor inside miller loop is relatively safe, because the phase lag only reach 180 degrees when frequency goes up to infinity, in theory(without stray inductance).

It will be risky to involve 3 transistor. In figure 3.14, I will put a 10nF capacitor to bypass Q12 at high frequency. (10nF cap crossing the base and emitter pin of Q12).
 
Will not be easier to use instead Q13 3 pcs 1N4148 series connected , first anode to base Q12, last cathode to -Ub rail (or one green LED), and maybe increase R6 (fig.3.14) to 33-39R? No stability issues (no gain in current limiting loop), even with 3 transistors inside local Miller loop (Q12, Q4, Q18).
 
Putting 2 transistor inside miller loop is relatively safe, because the phase lag only reach 180 degrees when frequency goes up to infinity, in theory(without stray inductance).

It will be risky to involve 3 transistor. In figure 3.14, I will put a 10nF capacitor to bypass Q12 at high frequency. (10nF cap crossing the base and emitter pin of Q12).

This is how I do it, no 3 transistor inside the loop(in some way).
Damir
 

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Costs of TMC

Hi Bob,

this is a remark concerning the TMC explanation in your book, pages 182/183.

The scheme includes the OPS into the Miller compensation loop for a certain frequency range, thus reducing the effective OPS distortion. With your component values, this range stretches to about 500 kHz. The global feedback loop has roughly the same ULGF.
Unfortunately, both feedback signals add up in such a way, that the total ULGF around the OPS now is 1 MHz. A loop probe between OPS output and junction between TMC resistor and GNFB network will confirm that.

Opposing for quite some time against an equivalent argument for an amplifier with nested Miller compensation, I have cross-checked this with elementary results from control theory. You can find the calculations in the thread on amplifier with nested Miller compensation, post #40.

Maybe you can include a remark into your book that TMC does come with the cost of increased ULGF and reduced phase margin in the effective loop around the OPS.


Cheers,
Matze
 
Maybe you can include a remark into your book that TMC does come with the cost of increased ULGF and reduced phase margin in the effective loop around the OPS.


This is not necessarily true. The best procedure to ensure that stability margins are maintained within the loop enclosing the output stage is to design a double pole compensator that gives adequate stability margins for the major loop using the equations for the location of the coincident poles and the zero restoring a single pole roll off, and then connect the double pole compensator's resistor to the output.

The minor loop enclosing the output stage will then possess roughly the same stability margins as those obtained for the major loop with double pole compensation.
 
Hi Bob,

this is a remark concerning the TMC explanation in your book, pages 182/183.

The scheme includes the OPS into the Miller compensation loop for a certain frequency range, thus reducing the effective OPS distortion. With your component values, this range stretches to about 500 kHz. The global feedback loop has roughly the same ULGF.
Unfortunately, both feedback signals add up in such a way, that the total ULGF around the OPS now is 1 MHz. A loop probe between OPS output and junction between TMC resistor and GNFB network will confirm that.

Opposing for quite some time against an equivalent argument for an amplifier with nested Miller compensation, I have cross-checked this with elementary results from control theory. You can find the calculations in the thread on amplifier with nested Miller compensation, post #40.

Maybe you can include a remark into your book that TMC does come with the cost of increased ULGF and reduced phase margin in the effective loop around the OPS.


Cheers,
Matze

Hi Matze,

Having devoted only 2 pages in my book, it is certainly a goal of mine to greatly increase the coverage of TMC, and more clearly compare it to the performance of the same amplifier using straight Miller and also TPC.

You are right, that the ULGF of the totality of the feedback encircling the output stage must be evaluated and be assured to have adequate gain and phase margins. TMC can fool one into being too aggressive with it, since we traditionally focus on the gain and phase margins of the global loop, which with TMC, are going to be similar to those of an amplifier with Miller compensation having the same global ULGF. Interestingly, TPC does not tend to fool us as much because its effect on the ULGF around the output stage shows up in the global feedback as well.

In all of this, we always must recognize that there is no free lunch. The interesting thing about TMC and TPC is that we can often get a bit more lunch for our money. All of these trade-offs and cautions will be dealt with in much greater detail in the next edition.

Thanks for your input. Such feedback is very valuable to me, and I welcome it on any subject in the book.

Cheers,
Bob
 
Hi Bob,

Do you mind suggesting suitable target gain and phase margins for the TMC loop?

For instance, do you think 12dB and 60 degrees are enough?

Should the magnitude of (any) inner loop stability margins be viewed any differently from those of the global loop? Is there an argument that suggests an inner loop can exist with smaller margins than those we dictate for the global loop?

Do you have any clever suggestions of how one might measure these margins on a test bench amplifier?

Thanks,
Ian