Unstable VAS current in amp from Slone book

[andy_c]

Originally posted by mikek
you may want to examine this:

Giovanni Stochino's ultra fast amp

mikek,
Thanks for that link. It ended up pointing to this schematic:

http://www.soton.ac.uk/~apm3/diyaudi...no_circuit.jpg

which looks promising. I'm still scratching my head over some of the aspects of the design of that amp.

[sam9]

>>>"What is the point in tying to cascode the VAS stage anyway?"

In Slone's case, it seems to me that it is necessary in order to implement his soft clip circuit. He biases the inner transistors with a voltage diovider that sets the bias at 1/2 the difference between the output signal boltage and the rails. You can see this in the "'OPTI-MOS" design posted on www.sealelectronics.com. You may also notice that in this design he, too, abondonds the current mirrors.

I, too, tried modeling something like the original poster (used SIMetrix) and find it troublesome. My conclusion so far is that it doesn't provide enough current to the dominate pole capacitors at higher frequencies and reducing the resistor values beyond some point results in IS oscillations.

Andy C may be on the right treack as it looks like something is needed to get greater current out of the IS.

These are only my very amatuer guesses.

It should be noted that a number of people here have built the OPT-MOS design without repoting any problems. I don't think the design *exactly* as posted was ever presented as a complete amp in any of Slones books so it may be going a bit far to dump on Slone for a design didn't propose.

As a further note, the OPT-MOS design seems to be going into commercial production (ZUS Electronics) and Slone is wrapping up his on-line business. He says he may continue to sell the remaining OPTI-MOS pcbs but that's abot it.

[Christer]

Originally posted by andy_c


Oops, sorry. It's "Design 10", page 351, Figure 11.12. He first discusses the topology on page 94, with a schematic in Figure 4.10a (but without the cascode here). He first adds the cascode in Figure 5.8a on page 137, calling it "Ultra high performance input stage and VA stage combination".

Oh, that one. Yes, I see it now. I didn't remember he ever
used buffering between input and VA stages in any of the
designs, although he discusses the possibility.

Well, I don't have time to see what he writes about it now, since
I really ought to get my suitcases packed to go away for
a week. I was just so puzzled since I didn't remeber him
using this design, that I had to ask you right away.

[mikek]

Originally posted by andy_c


mikek,
Thanks for that link. It ended up pointing to this schematic:

http://www.soton.ac.uk/~apm3/diyaudi...no_circuit.jpg

which looks promising. I'm still scratching my head over some of the aspects of the design of that amp.

....actually its a high-slew design, (~300V/uS), in which ALL three stages operate in class AB.....you may need to get a-hold of the full article to fully appreciate the concept...infact i think it's a three- part paper.

[sam9]

To Andy C, et al,

I just opened the Slone book to Fig 11.12, page 351. My vision may be clouded with age, but I think that the cicuit you presented to start this thread is similar but NOT exactly the same as Slone's. I suggest you run a simulation on the exact circuit first, then make one mod at a time.

I have tried the same thing: take a piece from one example that I though looked good and tried to match it up with another piece withth idea of getting the best of everything; then I find they just don't work together! Very frustrating. Both Self's and Slone's books make it seem like designing a unique amp cicuit should be possible with a little cut and paste plus a SPICE simulator. In fact I'm comming to the realization that it's actually damn hard. I get the feeling that both of these guys have a lot of experience in their heads that doesn't come out in the books. Probably can't. It may be the only way to get from here to there is to be willing to try a lot of things and blow up a lot of transistors. (Done enough of that that my wife made me buy a CO2 fire extinguisher to keep by the bench.)

[millwood]

two questions:

1) how do the the first 2n5551 and 5401 on the input stage got its bias?

2) what do those four bd139 do?

[andy_c]

Originally posted by sam9
To Andy C, et al,

I just opened the Slone book to Fig 11.12, page 351. My vision may be clouded with age, but I think that the cicuit you presented to start this thread is similar but NOT exactly the same as Slone's.

Right. I believe I mentioned that I made some superficial modifications (in the current sources for the input diff amp for example) to avoid possible copyright issues. The current values provided by these sources are very nearly equal to those in the book (one Vbe or diode drop divided by 120 Ohms). What I did capture was the essentials of the circuit required to analyze the bias stability of the VAS. That is, complementary diff amps with current mirror output feeding a VAS consisting of an emitter follower feeding a cascoded common emitter amp. I used single-pole compensation instead of the two-pole approach he uses. But this doesn't affect the VAS bias stability (or lack of same), which was the motivation for the original post.

[andy_c]

Originally posted by traderbam
You seem to be going to a lot of trouble to make Sloane's impossible design work. Why not remove some distortion genertors and use simple collector resistive loads for the diff pairs?

That's what I ended up doing. I'd like to figure out how to get it to work right with the current mirror, but I'm out of ideas at present.

I'm not sure I understand the cascode/Early effect argument. After all, the cascode transistor experiences the same base curent modulation as the transistor it is shielding.

Well, I think my explanation was somewhat flawed. I'm not a transistor physics guy, so maybe someone who is can jump in and explain it better. The way I look at it is to visualize the curve tracer display of common emitter vs. common base transistor characteristics. The latter are flat as a pancake, yet the emitter current, and therefore the base current, is changing at each step in the family of curves. The common emitter characteristics have varying slopes of Ic vs Vce at each Ib step, and they "curl up" for large Vce, almost like a very slow onset of breakdown. So it's clear to me by simple lab observation that the output impedance of a common base amp is both higher and more constant than a common emitter amp. But I do admit that I don't have a rigorous transistor physics explanation.

Reducing non-linearities is really important. What causes non-linearities? Transistors!

But it does not always follow that reducing the number of transistors reduces nonlinearity. I was once asked to design an RF limiting amplifer which, at a certain number of dB below the absolute limit level, was required to have third-order intermods less than a certain amount. I used a diff amp for this. I figured out how much emitter degeneration was required. My boss insisted that I replace the current source with a simple resistor. The intermod performance of the circuit was horrible, nowhere near as good as the calculated value. As soon as I used a current source, the intermods met spec, and were within a few tenths of a dB of the calculated values. I realized then that any AC tail current in the diff amp will cause it to act as a Gilbert cell mixer. It mixes its tail current with its difference mode voltage. So here was a case where increasing the transistor count reduced the distortion - by about 20 dB in this case. This was about twenty years ago, so I can't recall the exact details. But there are many other examples. The current mirror at the diff amp output has been shown by Self to reduce distortion. That's why I was interested in preserving it.

[sam9]

" I believe I mentioned that I made some superficial modifications (in the current sources for the input diff amp for example) to avoid possible copyright issues."

As I said, I've been down the that road and discovered that what I thought were "superficial modifications" were not so superficial after all. At least in the sense that Slone's circuit worked and mine was crap.

Part of my post was also prompted by another post that expressed some negative vibes about Slone publishing unworkable circuit's. While Slone can take care of himself, I wouldn't want a reader to avoid building one of Slone's amps just because of that one statement which was based on a mod of Slones circuit rather than the original.

Not long ago I took one of Slones circuits and put in a SPICE model, then more or less systematically varied the component values. There seem to be two categories of values: those that make little if any difference over a broad range and those where the slightest change degrads the simulated performance. I suspect Slone spent a lot of time with a simulator to fine tune the final published circuit.

[traderbam]

Andy,
Just some food for thought.
I was a little unclear. I meant that each transistor in the signal path adds distortion. A CCS adds some distortion because its effective impedance is non-linear but the idea is that it is so much higher than a simple resistor that the net effect is to greatly reduce the non-linearity of the diff pair as you say. I'm not so sure the same can be said of a current mirror, where signals are amplified. Some care is needed as you know. A well designed diff amp has extremely low distortion when dynamic Ic changes are small and so the benefit of a current mirror in reducing common-mode error may be countered by the non-linearities of the current mirror itself.

Another thought is about the output Z of the VAS. It appears to me that the transistor's impedance will be swamped by the miller cap feedback loop and, in addition, will be in parallel with the impedance of the output stage and loudspeaker. Worrying about the "Early effect" may be guilding the lilly as it were and may not be a good reason, on its own, for cascoding the VAS transistor and introducing another semiconductor into the signal path.