Questions about the humble follower

[Gordy]

I am trying to design a simple ‘open-loop’ output stage with a CCS loaded source follower. I know it looks simple on paper, but there are some things I am not sure about, so I would like to ask some basic questions…

1. What causes distortion in a source follower, and how to minimize it?

2. Apart from Vds, Id, W, and input capacitance, what parameters are most important when choosing a device for a follower, and why are they important?

3. When using tubes I learned that equally spaced parallel lines on the device I / V characteristic graph are ‘a good thing’. Should I presume that the same applies with FETs? [Because most seem to have poor / unequal spacing!]

[AndrewT]

Pass uses these a lot.

Go to his site where you will many examples with comment and designs etc.

[Gordy]

Thanks Andrew, I will certainly be investigating the articles published by Nelson Pass as you say.


In the mean-time does anyone have any thoughts on any of my questions? (Even if just on one of the questions?)

[djoffe]

In a source follower, Vout=Vin-Vgs(Ids). As you deliver current into a load, Iout changes. Vgs depends upon Ids, and changes in Ids give useful output current, Iout, and so Ids also changes. So, to minimize distortion:

1. Minimize Iout variation by either:
a) lightly load the source follower
b) give it a high quiescent current, so that the load current variation is relatively small

2. Choose a device with high transconductance for a given current

3. Measure the load current and modulate the previously CCS to make Ids constant, even though you deliver useful load current. (a bit illegal given the no feedback dictum).

4. add feedback around the stage (ok...not allowed, given no feedback).

[Gordy]

djoffe, that's just the sort of thing I was hoping for, many thanks for the direction.

Points 1 and 2 noted for imminent use.

I think your point 3 is beyond me.

With reference to point 4, do you mean that it is possbile to have useful local feedback just around a single stage follower, or perhaps to the preceding stage without full-blown global feedback? (Or maybe I have misunderstood you?). If it is possible I would very much like to persue any references / links that you might be able to post?

Thank you.

[djoffe]

Sure...there are many forms it can take...at some point, it would look a bit too much like an op-amp for some people, but there are some in between things which might be done. I'll try to post some simplified schematics in the next day or so...

[Gordy]

Thanks, I'll keep an eager eye out...

[djoffe]

Just because it was easy to simulate, I did emitter followers...two cases, one with 10 mA, and the second with 1 mA. Now, I forced things for drama, but with the 1 volt peak input, the 10 mA circuit is wonderful...the 1 mA circuit is marginal, see enclosed FFTs.

[Gordy]

Yes, I see it clearly, that illustrates well your point about keeping a favourable ratio between quiescent and output current.

(It's 4:30 am here, so I must leave for now. Thank you again).

[AndrewT]

Hi DJ,
1Vpk input is going to produce ~1Vpk at the output.
Into a 1k load that requires ~1mA of output current.
A single ended device biased to 1mA is on the threshold of overloading (current clipping) at that level.
That is not a fair comparison.

Try increasing the bias to 1.2mA and 1.5mA and 2mA and see what the FFTs look like.