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Old 12th December 2011, 05:16 PM   #431
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Quote:
Originally Posted by dadod View Post
Hi Edmond,
Why there two transistors in parallel, Q4//Q7 and Q5//Q8? This is not Class i driver?
Damir
Hi Damir,

Good question. You can make it work with only one pair of them, but then you have to halve the output current of Q3 and Q6. As the current ratio between first pair of CCSes (Q3/Q6) and the second par (Q9/Q12) is rather critical, I prefer a 1:1 ratio (instead of 1:2), which is easier to maintain. In that case however, you will need Q7/Q8 as well. Overkill? Not at all! It cost you nothing as there are already four trannies per IC.

>This is not Class i driver?
That's right. And let's keep it that way.
I'm through with Class-I, as it is suboptimal.

Cheers,
E.
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Old 12th December 2011, 05:32 PM   #432
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Quote:
Originally Posted by Edmond Stuart View Post

I'm through with Class-I, as it is suboptimal.

Cheers,
E.
I Agree

BTW: The harddisk has crashed on my main PC, hopefully I'm able to restore it, otherwise alot of things are gone.

Hope you had a nice week in Paris.

Cheers
Stein
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Old 12th December 2011, 06:42 PM   #433
ihan is offline ihan  England
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Hi Edmond,

Referring to post 429, what is the function of D1 & D2?

Are D1 & D2 needed in the schematic of post 426 - HEEEELLLPPP : M. Randy Slone Mirror Image Topology Construction - Troubles

Thanks,
Ian
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Old 12th December 2011, 07:42 PM   #434
dadod is offline dadod  Croatia
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Quote:
Originally Posted by Edmond Stuart View Post
Hi Damir,

Good question. You can make it work with only one pair of them, but then you have to halve the output current of Q3 and Q6. As the current ratio between first pair of CCSes (Q3/Q6) and the second par (Q9/Q12) is rather critical, I prefer a 1:1 ratio (instead of 1:2), which is easier to maintain. In that case however, you will need Q7/Q8 as well. Overkill? Not at all! It cost you nothing as there are already four trannies per IC.

>This is not Class i driver?
That's right. And let's keep it that way.
I'm through with Class-I, as it is suboptimal.

Cheers,
E.
Hi Edmond,
What is output impedance?
Damir
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Old 12th December 2011, 08:15 PM   #435
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Originally Posted by stinius View Post
I Agree
Hi Stein,

At first sight, class-I looked very promising. However, there are too many quirks: a rather low and highly variable input impedance as well as a variable loop response. As for the latter, you can't optimize it for all dynamic conditions (i.e. low and high output currents). As a result, you need almost as much as two times more frequency compensation in order to cope with the worst case condition.
The only pro is more headroom (1 Vbe) for the bias/class-i circuitry.

Quote:
BTW: The hard disk has crashed on my main PC, hopefully I'm able to restore it, otherwise a lot of things are gone.
Too bad. Can you tie the HD on another PC? Much change to recover most of your data.

Quote:
Hope you had a nice week in Paris.

Cheers
Stein
Sure, we had a nice time; thanks.

BTW, do you have copies of syn08 posts on the 'other' forum about triple EF output stages? It's a pity that Andy has closed that site.

Cheers,
E.
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goed verliezen dan dooft het licht…(H.M. van Randwijk)
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Old 12th December 2011, 08:25 PM   #436
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Quote:
Originally Posted by ihan View Post
Hi Edmond,

Referring to post 429, what is the function of D1 & D2?
Hi Ian,

D1 & D2 prevent saturation and excessive base currents of Q4/5/7/8 under overload conditions (e.g. square waves).

Quote:
Are D1 & D2 needed in the schematic of post 426 - HEEEELLLPPP : M. Randy Slone Mirror Image Topology Construction - Troubles

Thanks,
Ian
Yes, indeed. They are also needed in this version (unless you can guarantee that you will never torture the amp )

Cheers,
E.
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Een volk dat voor tirannen zwicht, zal meer dan lijf en
goed verliezen dan dooft het licht…(H.M. van Randwijk)
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Old 12th December 2011, 08:31 PM   #437
ihan is offline ihan  England
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Thanks Edmond.
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Old 12th December 2011, 08:46 PM   #438
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Default Output impedance

Quote:
Originally Posted by dadod View Post
Hi Edmond,
What is output impedance?
Damir
Hi Damir,

About 0.7 mOhm (real) and it starts rising at ~3kHz, where it becomes inductive. At 10kHz Zo = 1.7 mOhm and at 100kHz Zo = 16 mOhm (without Zobel network, of course).
As you see, much lower than Kendall's class-i, where Zo = RE = 330 mOhm.

Cheers,
E.
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Een volk dat voor tirannen zwicht, zal meer dan lijf en
goed verliezen dan dooft het licht…(H.M. van Randwijk)

Last edited by Edmond Stuart; 12th December 2011 at 08:53 PM.
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Old 12th December 2011, 08:50 PM   #439
dadod is offline dadod  Croatia
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Quote:
Originally Posted by Edmond Stuart View Post
Hi Damir,

About 0.7 mOhm (real) and it starts rising at ~3kHz, where it becomes inductive. At 10kHz Zo = 1.7 mOhm and at 100kHz Zo = 16 mOhm (without Zobel network, of course).
As you see, much lower than Kendall's class-i.

Cheers,
E.
Hi Edmond,
I expected that, Class i gives it equal to Re.
Damir
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Old 14th December 2011, 03:53 PM   #440
dadod is offline dadod  Croatia
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Hi Edmond,
Here is my simulation of yours OPS.
Distortion is realy low, but the current of inactive output transistor dip below zero.
Could you explain? Does your OPS is non switching type? Could you show some charts of your simulatio, main could be wrong.
Damir
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