Update of the Aragon 4004

[mightydub]

I have been using an Aragon 4004 for about the last 20 years as my main amp, it has provided flawless service and great sound. A while back I got a copy of the schematic and started playing with it in LTSpice. It is a symmetric design, interesting in that the input stage uses quad transistor arrays from Sprague. The data sheet describes the transistors as similar to 2N5401 and 2N5550. I decided to attempt an update using the THAT transistor arrays for the input stage and Thermal Traks for the output.

I'm posting it here for comments, suggestions, and feedback. I've decided to build it so I'm working on a board, I'll turn this into a design/construction thread. This design will do about 200W into 8 ohms, plenty for my needs.

The topology follows the original 4004 design - symmetric input stage with cascodes, symmetric VAS. The changes I made are:

1) Added current mirrors to the input stage, as I find that this reduces THD by at least an order of magnitude in every case I have tried it. Yes I understand the problem with current mirrors and a symmetric VAS, and have come up with a solution to keep the VAS current defined. More about that later.

2) Used current sources to load the LTPs rather than a resistor as in the original design. Or at least that's what I infer from the schematic, it is a poor quality scan of a fax of an Nth generation photocopy, pretty bad and hard to read. I still have to take the cover off my 4004 to verify some of the details.

3) Output stage is a triple EF vs. a double in the original. The original also has 2 sets of drivers each driving 2 OPs, (4 OPs total), I'm using just one set of drivers with 2 OPs. Since I'm using Thermal Traks the biasing scheme includes the diodes.

4) I'm using 50v rails for now, vs. 70 in the original. Also RC filtering for the rails to the input stage.

Regarding using current mirrors in the input stage, it was easy to see the problem in simulation. Changing anything in the input stage, even by less than 1%, caused huge changes in the VAS current. After a lot of reading and thinking to understand the issue, the solution is pretty simple. Figure out the ideal voltage that the VAS input would sit at when everything is perfectly matched, and then tie one side of the VAS input to it through a reasonably large resistor. This was described by Bob Cordell and implemented in at least one form by Glen K. in other threads. After experimenting with various implementations - current source + resistor, precision voltage references, servos, etc, I came up with a really simple version. The reference voltage for the current sources on either side of the input stage are close to the voltage required, so I just used a resistive voltage divider. This keeps the VAS current pretty much constant when the input stage is deliberately unbalanced by using mismatched resistor values. Using this simple solution has a slight penalty in distortion, but the THD in simulation is so low anyway that it wasn't worth the additional complexity.

Speaking of distortion - simulated THD1K is below 0.0001%, and THD20K is about 0.001%. THD isn't the only thing that matters, so why go to such extremes? Well, because I can. I know that in real life the transistors and parts won't be perfectly matched the way they are in simulation, but if the design is inherently low distortion, even if i give up an order of magnitude to the realities of the real world I'll still have an outstandingly low distortion amplifier.

The compensation is really simple - just a 39pF cap on both sides of the VAS. I tried many different schemes in an attempt to keep the open loop gain up at 20K, but couldn't make any of them stable. I am leaving some stuff options in the pcb design to experiment with.

Enough for now - here's the schematic. Thoughts and comments? I'll post some simulation results tomorrow.

[mightydub]

Here is a plot of the open loop gain. Plenty of gain/phase margin, 0dB gain at about 630Khz.

I experimented with various ways to make the gain roll off start at a higher frequency, but couldn't make any of them stable.

[mightydub]

Clipping, input is 1Khz sine wave driven at 1.4V

[mightydub]

10Khz square wave performance, input filter removed.

[mlloyd1]

mightydub:

looks interesting ... thanks for sharing. a few questions now, maybe more later:
1. why use the expensive matched devices for input device cascodes? i would think they'd be better used as current mirrors (if they have the ratings). i think(?) that that makes quads with pairs of opposite polarity.
2. looks like your closed loop gain is roughly twice what i normally see for power amps. is that on purpose? just curious why ...
3. i would be surprised if you don't end up needing some small resistors in the bases of the outputs and/or drivers.
4. what color are your leds? :-) looks like 10mA in the VASs. i like those fairchild parts. i might go for 15 or maybe 20mA, but, hmmm ... you are using an output triple.
5. how hot are you idling the outputs?

keep posting your progress. i'm curious to know how close the end product matches the sims. and if you like the end result better than the original. have fun!

mlloyd1

[mightydub]

mlloyd1,

thanks for the questions!

1. why use the expensive matched devices for input device cascodes? i would think they'd be better used as current mirrors (if they have the ratings). i think(?) that that makes quads with pairs of opposite polarity.

I experimented with a few different configurations, this one (LTP and cascodes all identical, and in the same package) had lowest THD. I agree with you, it would seem to make sense using the THAT devices for the current mirrors, but that gives roughly 8x the distortion. I'm not sure why the KSA992 and KsC1845 do so much better there, the THAT parts seem to do best with a higher Vce.

Also I found that best performance was with about 1.9mA through each of the LTPs - much lower than with other transistors.

2. looks like your closed loop gain is roughly twice what i normally see for power amps. is that on purpose? just curious why ...

I'm aiming for close to full power at 1V pp input. Am I mistaken here? What is generally considered the maximum input swing? Easy to change.

3. i would be surprised if you don't end up needing some small resistors in the bases of the outputs and/or drivers.

I have thought about that. Doesn't seem to be necessary so far as I can tell from simulation.

4. what color are your leds? :-) looks like 10mA in the VASs. i like those fairchild parts. i might go for 15 or maybe 20mA, but, hmmm ... you are using an output triple.

Any color you like so long as they drop about 1.7V. The VAS runs at about 13.5mA.

5. how hot are you idling the outputs?

outputs are biased to about 118mA. The biasing scheme is designed to have two temp coefficients - the Vbe multiplier, predrivers, and drivers are intended to be isothermal and compensated by the Vbe, the outputs are compensated by the TTrak diodes with a parallel resistor to adjust the slope.

keep posting your progress. i'm curious to know how close the end product matches the sims. and if you like the end result better than the original. have fun!

Will do - any and all advice is appreciated.

[mightydub]

First pass of a PCB layout.

Would you experts out there look over the schematic and layout and let me know of any problems you see. It is getting close to time to go build this thing.

[mightydub]

Final version of the board and schematic. Some component values and package sizes tweaked to match reality, also decided to move the fuses off to a power supply board. I've got the BOM entered at Mouser and am about to pull the trigger on ordering parts.

[Bonsai]

mightydub, you should put some base stopper resistors in the driver and output devices bases. I designed and built a similar (i.e. fully balanced) amp and you will probably need these. If, in the final testing you see that you do not require them, you can always use 0 Ohm links. You can get some very nice SMD types - ideally th e base stoppers should be as close as possible to the devices.

I like the simple balance circuit around R19 to R21 - this type of topology will not work without some help on the balancing.

Good luck.

[mightydub]

bonsai, mlloyd1,

after much head scratching, reading, and study I have concluded that you are right about the base stoppers. I like bonsai's suggestion to use SMT, I had considered that for the entire circuit and will try it for the stoppers. Back to pcb layout.