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Old 9th September 2009, 05:31 PM   #21
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Lumba Ogir,

Thanks for the further part sugestions, I'm fairly new to using JFETs in power amps, so it's really useful. I might sound against the idea of using FETs but it's down partly to inexperience with them and partly to playing the devils advocate I'm always willing to experiment and adjust my opinions...

I think the idea that the CFP is inherantly unstable comes from people (doing what I intially did) forgetting to degenerate the compound pair back down to the same gm as a single transistor. Adding such a large amount of extra Aol unchecked will make most amplifiers very hard to tame. Done properly, the CFP is a super-beta transistor with lots of local NFB by degeneration, which makes the V/I plot extremely linear, and yet it still has enough gm left to provide good open-loop gain for the whole amp for global NFB; it seems ideal to me. The cascode does increase stage gain (a good thing if the IP pair degeneration is excessive), but this again is a case of increasing local NFB and adjusting compensation to make sure the resulting amplifier is stable.

I think the comparison between BJT and JFET is more fair if you specify using a cascode, though I think you then need to compare good JFETs against good low voltage BJTs with cascode. For example I have a box of MAT02 (AZ , from the middle of the wafer) supermatched pairs; I'd be amazed to see this level of performance from N-JFETs, at least in the 'tens to hundreds of ohm' souce impedance range we normally see with power amp LTP inputs.

I'd be interested to see an amp with a JFET input stage you commend, so I can do some analysis on it and better understand where you're comming from?

Cheers,
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Old 9th September 2009, 05:43 PM   #22
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Quote:
Originally Posted by homemodder View Post
Try Jfet/Bjt cfp, works ok. To obtain higher gm with jfets just parralel two or more of them.
Hi,
I've used this (jfet, then bjt in CFP) in a commercial design that needed very high imput impedance - it does indeed work great in that situation.

In that design the impedance into the FET gate was fixed and quite high (several k) from a transformer; the transformer was terminated precicely and the input stage could not add any additional load; I think this is a bit different from the situation with a power amp, where generally the lower the input impedance the better (might be <1 ohm at the input connector).

Paralelling jfets is interesting, since they're essentialy transconductance devices so you should double gm when you double the number of transistors....

Cheers,
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Old 10th September 2009, 07:01 AM   #23
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Atomicplayboy,
the JFET-BJT combination gives better stability mainly due to the much wider bandwidth of JFETs. I don`t anticipate any trouble.
The benefit of supermatched pairs is limited. Sonic performance is of primary importance and the available discrete transistors are better in that regard.
While considering stability (and noise), the input parallel resistor value for a transconductance stage should be set high to allow amplification of weak signals, or in case of high output-impedance signal sources, to obtain large current gain. 47kOhm could be a good compromise here.
Paralleling JFETs (or BJTs) is not very interesting. JFETs have large current gain and small voltage gain, the latter we want to keep at a minimum, anyway. Their task is to convert voltage to current and they do that pretty accurately (unlike BJTs).
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Old 10th September 2009, 11:37 AM   #24
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Lumba, what is a part like 2sj74 Jfet, lots os paralled small jfets to increase gm and lower noise. This does increase capacitance but thats what the cascode is for.
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Old 10th September 2009, 01:08 PM   #25
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homemodder,
you don`t read my posts, do you?
(J)FETs do not have appropriate properties for voltage amplification.
Crss for 2SJ74 is 32pF @ 10Vds, a way too high price for the (unnecessary) large Gm. It`s not just about multiplied capacitances, but a muddled signal processing. Noise is not that big issue here. By the way, power supply ripple and the signal related dynamic noise caused by global feedback is much worse.
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Old 10th September 2009, 09:04 PM   #26
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Hi Lumba, you've got me on the hook with this one

Quote:
Originally Posted by Lumba Ogir View Post
the JFET-BJT combination gives better stability mainly due to the much wider bandwidth of JFETs.
I'm not sure where you're coming from here. JFETs have higher parasitic capacitance than BJTs and they're usually operated with higher impedances, so should be slower than BJTs? Also, with BJTs it's surely just a matter of device slection; make sure the Ft of the first transistor is an octave or two more than the second transistor (yes I need to look at this in my amp circuit; thanks for reminding me) and it should be fine.

Quote:
Originally Posted by Lumba Ogir View Post
The benefit of supermatched pairs is limited. Sonic performance is of primary importance and the available discrete transistors are better in that regard.
I disagree on this one. One of the reasons to use a long-tail pair is cancellation of even-order harmonics; this is down to transistor matching and correct current balancing. JFETs are very poor in this regard (although the extra even-order harmonics might be flattering to the signal). Also good supermatch pairs have equal performance to good single transistors, with the advantage that they track perfectly with temperature. You just have to pay for the good ones...

Quote:
Originally Posted by Lumba Ogir View Post
Paralleling JFETs (or BJTs) is not very interesting. JFETs have large current gain and small voltage gain, the latter we want to keep at a minimum, anyway. Their task is to convert voltage to current and they do that pretty accurately (unlike BJTs).
Isn't paralleling up regular JFETs how they fab the 'high gm' parts that are suppose to compete with single BJTs?

Also, IIRC the voltage-current transfer function of a JFET is square-law. The same for a BJT is tanh. Both are non-linear (though I'll concede the FET is better), but because the BJT has so much more gm to start with, we can do a lot more to linearise it's transfer function.

I'm enjoying this discussion; please continue

Cheers,
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Old 14th September 2009, 05:23 PM   #27
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Atomicplayboy,
we are probably not getting further ahead on a theoretical bases. How would the input stage look like at the moment?
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Old 14th September 2009, 08:31 PM   #28
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Hi Lumba,

I agree that we have quite different ideas about how to do an input stage, but that's part of the fun You don't normally gain anything by discussing with people you completely agree with...

Anyway I've etched 4 boards tonight and will drill and populate one tomorrow. I'm planning to tweak/debug at the weekend, then do full testing on an AP next week. Assuming they work and I haven't done something stupid, I'll post the schem/artwork then.

Cheers,
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Old 20th September 2009, 05:09 PM   #29
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Ok chaps,

First PCB built up and tested - everything I can test at home looks good, time to get it on an AP at work next week

A few mechanical issues (and component rationalisiations) came up, so I'll be doing another PCB revision this week, but then I think it is good to go.

Thanks for all the comments and advice, you helped me avoid a few clangers

Cheers,
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Old 20th September 2009, 05:49 PM   #30
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Excellent work! Very nice PCB - I especially like the screw/eyelet connectors.
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