Hi everyone,
I'm having trouble with On Semiconductor MJL1302A/MJL3281A used as output devices. I acquired a lot of these devices. They are advertised as direct replacements for the old and well-known Toshiba 2SA1302/2SC3281, of which only fakes are available today.
In my circuit, I have three in parallel on each rail. I'm aiming for 300mA of total bias for the output stage. However, with devices from the same date code, I get quite large variations in the current through individual devices. I see anything from 8mV to 14mV accros the 0,1R emitter resistors when I adjust for 300mA current drain of the output stage.
Is this normal for these kinds of devices?
Do you select output devices?
Does the difference become smaller with higher currents?
Before I start further testing, do you think it matters?
I have never experienced these problems with other devices before.
I'm having trouble with On Semiconductor MJL1302A/MJL3281A used as output devices. I acquired a lot of these devices. They are advertised as direct replacements for the old and well-known Toshiba 2SA1302/2SC3281, of which only fakes are available today.
In my circuit, I have three in parallel on each rail. I'm aiming for 300mA of total bias for the output stage. However, with devices from the same date code, I get quite large variations in the current through individual devices. I see anything from 8mV to 14mV accros the 0,1R emitter resistors when I adjust for 300mA current drain of the output stage.
Is this normal for these kinds of devices?
Do you select output devices?
Does the difference become smaller with higher currents?
Before I start further testing, do you think it matters?
I have never experienced these problems with other devices before.
had same issue with the similar NJW0281/0302 ' s(ON-semi) . Used 2 different batches on one amp (20-30ma variation ), built the other amp from one "batch" (same date code) ... just 2-3ma variation. I did run the hell out of the "mismatched" amp , it did not sound any worse , did not go up in smoke
.I did remake it later with new devices from the same "batch" , but it showed no undue stress while mismatched.
OS
Current sharing stability depends on power supply voltage and non-shared thermal resistance too. It gets worse towards higher voltages and higher thermal resistances.
What kind of insulators, if any, are you using? How high is the power supply voltage? Having 0.1 ohm emitter resistors sounds quite low, but if power supply voltage isn't too high it could work.
What kind of insulators, if any, are you using? How high is the power supply voltage? Having 0.1 ohm emitter resistors sounds quite low, but if power supply voltage isn't too high it could work.
In this case also this thread could be of interest:
http://www.diyaudio.com/forums/soli...istor-families-audio-power-output-stages.html
http://www.diyaudio.com/forums/soli...istor-families-audio-power-output-stages.html
Hi,
as the others are telling you, your parallel devices have not been matched.
If you want optimal operation from parallel devices you must match them.
You can use your completed 3pair PCB as your test device. But I'd suggest that each group of DUTs are attached with short leads to save the PCB and the devices from damage when you try to remove them.
Set up your PCB Vbe to give the bias you need. Don't change it.
Attach your DUTs. Measure Vre. Remove and group the DUTs by Vre readings.
Select PNP DUTs that have very similar Vre readings and select NPN DUTs that have similar (but not necessarily the same as PNP) and attach your 3pair of these selected devices to your test PCB.
measure the Vre. You should find that the devices Vre is now very much closer together. If they are within 10% total spread you can stop. If you are <5% total spread you have an excellent match of Vbe.
If you are around 20% spread then a second set of DUT testing is looming in.
Now to an optimum ClassAB bias current.
The Vre of the external resistor and the effective internal resistor should be 26mV when the transistor is cold (Tc=25degC). This falls slightly as the Tc & Tj rises.
Assuming Re=0r22 and that the transistor has an effective re=0r04, then total Re+re=0.26ohms.
The required bias voltage across Re is 22/26 * 26mV ~=22mV
Set Vre to average 22mVre across the 3devices.
If you decide to use Re=0r1 then try setting Vre to ~18mVre. This will require a heatsink about twice as big.
as the others are telling you, your parallel devices have not been matched.
If you want optimal operation from parallel devices you must match them.
You can use your completed 3pair PCB as your test device. But I'd suggest that each group of DUTs are attached with short leads to save the PCB and the devices from damage when you try to remove them.
Set up your PCB Vbe to give the bias you need. Don't change it.
Attach your DUTs. Measure Vre. Remove and group the DUTs by Vre readings.
Select PNP DUTs that have very similar Vre readings and select NPN DUTs that have similar (but not necessarily the same as PNP) and attach your 3pair of these selected devices to your test PCB.
measure the Vre. You should find that the devices Vre is now very much closer together. If they are within 10% total spread you can stop. If you are <5% total spread you have an excellent match of Vbe.
If you are around 20% spread then a second set of DUT testing is looming in.
Now to an optimum ClassAB bias current.
The Vre of the external resistor and the effective internal resistor should be 26mV when the transistor is cold (Tc=25degC). This falls slightly as the Tc & Tj rises.
Assuming Re=0r22 and that the transistor has an effective re=0r04, then total Re+re=0.26ohms.
The required bias voltage across Re is 22/26 * 26mV ~=22mV
Set Vre to average 22mVre across the 3devices.
If you decide to use Re=0r1 then try setting Vre to ~18mVre. This will require a heatsink about twice as big.
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I usually find 5mA through each MOSFET is enough to get rid of crossover distortion.
Any more is just wasted as heat.
I use a sig gen and a scope, apply a 1 volt sine wave and monitor the output into a speaker. I turn the bias up slowly until the sine wave is no longer distorted and leave it there.
Any more is just wasted as heat.
I use a sig gen and a scope, apply a 1 volt sine wave and monitor the output into a speaker. I turn the bias up slowly until the sine wave is no longer distorted and leave it there.
Glen and richie00boy have given good advice. You have to drop 25mV across your emmitter degen resistors for best linearity and thermal stability. For this reason, a good emitter resistor value is 0.22 Ohms with 100 to 110mA of quiescent current per device. This will also moderate somewhat the transistor to transistor differences you are seeing, since at 0.1Ohm, you need bigger variations in quiscent current (I x R) to develop any emitter degeneration voltage, unless you set the quiescent current at a high intial value. OTOH, making Re too high is also problematic
Get hold of Self's Amplifier Design Handbook - he covers this subject in quite some detail.
Get hold of Self's Amplifier Design Handbook - he covers this subject in quite some detail.
Mosfets are notoriously very non-linear in the low conductance region. When you measure output with the scope and determine it is no longer showing crossover, did you ever look at the gate drive signal? I bet the fb loop is at task to 'correct' lots of error around crossover. (of course fb doesn't actually correct errors
) Mosfets have lower transconductance than BJTs so they need more bias, at least a couple hundred mA. I prefer a bit more. I have observed in my mosfet EC amp the gate drive error signal or 'distortions' at different bias levels. Even with class B bias, the output showed no crossover but the gate drive had much 'error'. With a few mA, the error is still very significant. It took about 300mA to almost completely get rid of the crossover error in the gate drive. Unless you are class A, there will always be some bit of crossover distortion in there. Your fb just shifts it to an inaudible frequency band. BJT's have very high transconductance compared to mosfet and do not need lots of bias to have optimum crossover. If you’re fretting over a few Watts of power, BJT’s are your friend, I suppose.
As for me, the substantial increase in SOA for the mosfet more than makes up for a few extra Watts of heat. 
Mosfets are notoriously very non-linear in the low conductance region. When you measure output with the scope and determine it is no longer showing crossover, did you ever look at the gate drive signal?
So long as the sine wave looks good into a speaker and it sounds good to the ear then I am happy with that.
The crossover distortion clearly goes around 5mA on my complimentary MOSFET amps.
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