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Old 20th August 2009, 07:53 PM   #1
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Default Response to Kenpeter fantasies

<<What if you abuse a 4 terminal MOSFET with separate connection
for substrate? And wire that to a resistive divider spanning from
drain to source... Does this sufficiently fake the space charge
effect that defines Mu? Would such a divider need an emitter
follower to drive the capacitance of the subtrate/body?
I think this body "diode" is forward biased when pulled higher
than drain? There might need to be a negative DC offset? maybe
a battery or something...
Its essentially a big unused JFET gate (depletion mode?) on the
flip side of the channel....>>

Mosfets with the separate substrate lead were made as small signal only (TO-72 type). It is true, that the substrate act as a p-n gate to modulate the channel width (in the depletion fashion), but the Id=f(Ubs) is weak.

Take a look at this example:
http://www.datasheetcatalog.org/data...SS83_CNV_2.pdf
Study Fig. 6: mosfet connected as a diode (g+d), control through substrate.
Doesn't it look like a V-JFET (SIT) surrogate? Yes, but mu<<1. And to get the highest possible mu we will have to use positive Ubs, (0-0.4 V).
I would rather call it a mosfet diode with adjustable voltage drop.

Besides using mosfet with substrate as the additional gate (in mixers, feedback...), the diode arrangement can be employed in (Vbe) multipliers (connecting this diode between B-C), using substrate as the control lead to adjust bias in various approaches.
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Old 21st August 2009, 12:54 AM   #2
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Yeah, the whole idea was completely nuts... Not one of my better ideas.
Not so much a JFET on the back side of the channel, its more like the base
of a parasitic BJT. I really didn't fully understand how it was constructed.

Can't explain the VFET surrogate curves you found??? I was thinking only
to inject a feedback (like Nelson's ZEN) here to make fake Triode curves.
With the idea this sneaky feedback would maintain the MOS gate's high
impedance... I'm not so sure now (with BJT on the back) this is possible?

Last edited by kenpeter; 21st August 2009 at 01:13 AM.
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Old 21st August 2009, 03:39 AM   #3
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kenpeter,
Quote:
With the idea this sneaky feedback would maintain the MOS gate's high
impedance...
It will be maintained without any sneaky feedback.
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Old 21st August 2009, 07:19 PM   #4
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Feedback wasn't sneaky enough (for me) in Nelson's originally
proposed Zen configuration. Voltage divider from drain to source
tied to front MOS gate. Front gate then has impedance leaks
through both resistors, one aggravated by negative feedback...

OHSchade's transfomer coupled feedback for Pentode wasn't
any better in this regard.... Neither Mu emulator design had as
high input impedance comparable to a real Triode, SIT or VFET.

Any real Mu is local and fast as you can get. Any external paths
that attempt to fake it should try to avoid reactive phase shifts.
Feedback into big gate capacitance through a resistor may not
be fast enough approximation.

Last edited by kenpeter; 21st August 2009 at 07:48 PM.
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Old 21st August 2009, 07:53 PM   #5
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You may use a capacitive divider.
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Old 21st August 2009, 08:05 PM   #6
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Also you refer to a MOSFET diode curve with an adjustible ( *Mu ) voltage drop added.
This was how my first attempt at triode emulator worked. Of course, the curves are
all way too parallel. No bunching toward the bottom left, nor lean toward the top right.
A little too "perfect" to be authentic.

Smoking had the soloution. He explained that real triodes are many possible internal
paths in parallel, and all slightly diffferent in cutoff. So I paralleld three or four such
emulators with perfect, but slightly different parallel curves. Sure enough, the lean
and bunching begin to look much more like the real Triode.

This wasn't an effective solution with multiple vacuum diodes as references. But you
could easily stagger three or more mismatched small signal mosfets over the problem
to the same effect.

Last edited by kenpeter; 21st August 2009 at 08:22 PM.
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Old 21st August 2009, 08:06 PM   #7
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Quote:
Originally Posted by Wavebourn View Post
You may use a capacitive divider.
Yes, but what does that do to input impedance?

Last edited by kenpeter; 21st August 2009 at 08:13 PM.
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Old 22nd August 2009, 01:19 AM   #8
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Ken,

You might be onto something using the substrate, depends on whether the voltage range permits (avoiding current drawn thru the substrate). The voltage divider from drain to substrate to source will increase the Mu.

You can always just put a cascode Fet above the bottom Mosfet drain and connect an output divider tap to the cascode gate. This would then have to operate the bottom device in the low voltage "triode" region. If the substrate connection works too, then another tap in the divider string would give you two variable Mu's to work with for curve forming.

Another possibility would be to use a dual gate FET at low voltage with output voltage divider taps to the two gates.

Don
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"Most Universes are not quite parallel."

Last edited by smoking-amp; 22nd August 2009 at 01:23 AM.
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Old 22nd August 2009, 01:28 AM   #9
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Quote:
Originally Posted by kenpeter View Post
Yes, but what does that do to input impedance?
Anyway it is capacitive. Less of voltage swing, but more of current swing will be needed to drive it. Step-down transformer would work, like SE audio output one. 0.47 uF from gate to ground, and corresponding one from drain to gate, if to use 8 Ohm OPT.
I.e. instead of fighting against capacitances you just shunt and use them.

Edit:
Hi Peter;

here is what I come with:

Class-A-Burn: an amp with capacitive feedback divider around MOSFET

Comments?

Last edited by Wavebourn; 22nd August 2009 at 05:56 AM.
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Old 22nd August 2009, 04:48 PM   #10
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I think one reason that substrate driven Mu in the above cited spec sheet
example might be so low, because the Front gate was strapped directly to
the drain, as one might triode strap a screen. Basically, It seemed to have
real Mu because the front gate was 1:1 heavy Schading being fed back...
And direct coupled, there was no RC time constant...

Now if you can tolerate some RC delay, or willing to throw a follwer into
the mix to speed things up, you could Schade the front gate UL? Anything
less than presenting the full drain swing... This might bring back gate driven
Mu up toward useful voltage gain.

So, driving the back gate and applying the sneaky feedback to the front...
No spice model that I trust to tell me how this behaves. I just need to
breadboard with a real part or two and see what happens.

Really, I'm not sure which gate better to drive? and which to Schade...
Is the common "dual gate" physically different than a Cascode of two
seperate FETs? I'm not sure if it matters? Side by side gates, or in a row???

Last edited by kenpeter; 22nd August 2009 at 04:52 PM.
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