Response to Kenpeter fantasies

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<<What if you abuse a 4 terminal MOSFET with separate connection
for substrate? And wire that to a resistive divider spanning from
drain to source... Does this sufficiently fake the space charge
effect that defines Mu? Would such a divider need an emitter
follower to drive the capacitance of the subtrate/body?
I think this body "diode" is forward biased when pulled higher
than drain? There might need to be a negative DC offset? maybe
a battery or something...
Its essentially a big unused JFET gate (depletion mode?) on the
flip side of the channel....>>

Mosfets with the separate substrate lead were made as small signal only (TO-72 type). It is true, that the substrate act as a p-n gate to modulate the channel width (in the depletion fashion), but the Id=f(Ubs) is weak.

Take a look at this example:
http://www.datasheetcatalog.org/datasheet/philips/BSS83_CNV_2.pdf
Study Fig. 6: mosfet connected as a diode (g+d), control through substrate.
Doesn't it look like a V-JFET (SIT) surrogate? Yes, but mu<<1. And to get the highest possible mu we will have to use positive Ubs, (0-0.4 V).
I would rather call it a mosfet diode with adjustable voltage drop.

Besides using mosfet with substrate as the additional gate (in mixers, feedback...), the diode arrangement can be employed in (Vbe) multipliers (connecting this diode between B-C), using substrate as the control lead to adjust bias in various approaches.
 
Yeah, the whole idea was completely nuts... Not one of my better ideas.
Not so much a JFET on the back side of the channel, its more like the base
of a parasitic BJT. I really didn't fully understand how it was constructed.

Can't explain the VFET surrogate curves you found??? I was thinking only
to inject a feedback (like Nelson's ZEN) here to make fake Triode curves.
With the idea this sneaky feedback would maintain the MOS gate's high
impedance... I'm not so sure now (with BJT on the back) this is possible?
 
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Feedback wasn't sneaky enough (for me) in Nelson's originally
proposed Zen configuration. Voltage divider from drain to source
tied to front MOS gate. Front gate then has impedance leaks
through both resistors, one aggravated by negative feedback...

OHSchade's transfomer coupled feedback for Pentode wasn't
any better in this regard.... Neither Mu emulator design had as
high input impedance comparable to a real Triode, SIT or VFET.

Any real Mu is local and fast as you can get. Any external paths
that attempt to fake it should try to avoid reactive phase shifts.
Feedback into big gate capacitance through a resistor may not
be fast enough approximation.
 
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Also you refer to a MOSFET diode curve with an adjustible ( *Mu ) voltage drop added.
This was how my first attempt at triode emulator worked. Of course, the curves are
all way too parallel. No bunching toward the bottom left, nor lean toward the top right.
A little too "perfect" to be authentic.

Smoking had the soloution. He explained that real triodes are many possible internal
paths in parallel, and all slightly diffferent in cutoff. So I paralleld three or four such
emulators with perfect, but slightly different parallel curves. Sure enough, the lean
and bunching begin to look much more like the real Triode.

This wasn't an effective solution with multiple vacuum diodes as references. But you
could easily stagger three or more mismatched small signal mosfets over the problem
to the same effect.
 
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Ken,

You might be onto something using the substrate, depends on whether the voltage range permits (avoiding current drawn thru the substrate). The voltage divider from drain to substrate to source will increase the Mu.

You can always just put a cascode Fet above the bottom Mosfet drain and connect an output divider tap to the cascode gate. This would then have to operate the bottom device in the low voltage "triode" region. If the substrate connection works too, then another tap in the divider string would give you two variable Mu's to work with for curve forming.

Another possibility would be to use a dual gate FET at low voltage with output voltage divider taps to the two gates.

Don
 
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Yes, but what does that do to input impedance?

Anyway it is capacitive. Less of voltage swing, but more of current swing will be needed to drive it. Step-down transformer would work, like SE audio output one. 0.47 uF from gate to ground, and corresponding one from drain to gate, if to use 8 Ohm OPT.
I.e. instead of fighting against capacitances you just shunt and use them.

Edit:
Hi Peter;

here is what I come with:

http://www.diyaudio.com/forums/showthread.php?t=149223

Comments?
 
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I think one reason that substrate driven Mu in the above cited spec sheet
example might be so low, because the Front gate was strapped directly to
the drain, as one might triode strap a screen. Basically, It seemed to have
real Mu because the front gate was 1:1 heavy Schading being fed back...
And direct coupled, there was no RC time constant...

Now if you can tolerate some RC delay, or willing to throw a follwer into
the mix to speed things up, you could Schade the front gate UL? Anything
less than presenting the full drain swing... This might bring back gate driven
Mu up toward useful voltage gain.

So, driving the back gate and applying the sneaky feedback to the front...
No spice model that I trust to tell me how this behaves. I just need to
breadboard with a real part or two and see what happens.

Really, I'm not sure which gate better to drive? and which to Schade...
Is the common "dual gate" physically different than a Cascode of two
seperate FETs? I'm not sure if it matters? Side by side gates, or in a row???
 
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The two gates of a dual gate FET seem to commonly be in sequential order along the channel (although some diagrams show them as top and bottom gates like a substrate "gate")

The key would be to operate at low voltages, so the channel is not pinched off. This might just have a similar effect to cascoding a pair with low voltage on the bottom device to stay in it's "triode" mode (so Drain or subsequent gate still affect the field in the channel). The 1st gate generally looks to have the higher gm. So for Mu > 1, gate 2 (or the cascode gate, or substrate "gate") would seem to be the logical connection for the feedback divider.

The 2n439x series JFETs would seem a good place (bottom FET) to start for a cascoding experiment. Maybe some HV Mosfet for the top device. If that can be made to work usefully, then a dual gate or substrate device would be the next step for making this more compact. Unfortunately, I doubt whether any power or HV devices exist with dual gate or substrate access, so small signal only.
 
Kenpeter,
I had this idea for ~30 y, and have abandoned it because of its limitations, and because I was able to obtain small power and med. power SITs for front/VAS.

The limitations are low voltages (30 V at best for n-ch and 40-50 V for p-ch), low power dissipation of 200-375 mW. Now, these transistors have Sub electically connected to case, so it may help to increase dissipation by using a heatsink. I don't know the thermal qualities of that internal link (it was provided for using the case for shielding/grounding purposes, and these transistors do have low capacitances).
The candidates for this appl. can be found in the old Intersil, Motorola, Siliconix, RCA, Philips databooks.

Dual gate devices are cascodes. There are J (i.e. 3SK22 from Toshiba - 18 V) and MOS types. Think modulated cascode.

About these Sub. leaded mosfets. Mos gate transconductance Sm is higher than Sj. And MOS gate noise is higher that that of the Jgate. You are right about low mu in my extreme example - it is 100% volt feedback, and mu in this case =Sj*Rout. If we reduce this feedback by voltage divider Rout will rise. You are on the right track. Find the suitable transistor and do some experiments.

Let's do mental calculations. If Vd positive excursion will reach 30V level,
when using Jgate for FB voltage divider must be selected to not overdrive p-n junction threshold of 0.4 V: 0.4/30=1/75. That will be also the ratio for FB - very low FB.
when using mos gate for FB, that ratio can be much higher, thus providing meaningful effect. Like you already said, using (stable voltage Li, Merc) batteries may help to shift DC levels to offset threshold voltages.

What if you will use low capacitances E/S follower, like you proposed, to buffer the drain loaded with low capacitance CCS, use follower's load as that volt. divider (pot, feeding the mgate from the viper) and taking signal out from the E/S? This will bias the whole thing very stable.

Here is another example of substrate influence (page "262"-bottom chart):
http://www.datasheetarchive.com/pdf-datasheets/Datasheets-112/DSAP0052720.pdf
 
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StevenOH,
"and because I was able to obtain small power and med. power SITs for front/VAS."

Where can one order SITs? Datasheets?

This enterprise of emulating tubes has a certain interesting intellectual aspect, but is it really making sense overall when excellent video amp and deflection amp tubes are available for $1.

10JT8 21HB5 --- a whole P-P amplifier tube complement for just $4. Getting rid of the expensive output xfmr would seem to be the real problem to solve. A simple tube/SS Darlington circuit will suffice for that.

Don
 
I dunno??? there was another thread recently where a dude mentioned the
part number and spec sheet link for a Russian VFET that was supposed to
still be obtainable. Thread may be temporarily stranded on "upgrade island".

Today I hit Tanner Electronics and snatched up samples of four different
FET devices with 4 terminals and/or "dual gate"... They are out in the car,
I don't got part numbers for you right this second. 3N122 the only one I
clearly remember. I got enhancement and depletion types, some of em
were in box with note "VHF Mixer".

Characterizing might be easier to do at work: Labview, Agilent, and Keithly
supplies with GPIB and all that nonsense... But finding the time will be hard.
I'm not really good or fast at Labview yet. Completed the Intermediates II
class, just barely understanding. I need to actually "USE" this stuff before
I forget how. I also need real practice before the CLDA certification test.

I wouldn't sweat any current aspect of power handling, only the Voltage.
In Triodlington (Darlington or Siziklai), the property of Mu inherits to any
ordinary power BJT so driven. By (1/Mu-1) direct coupled feedback path.
4th circuit as Old Europe would call it.
 
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