Comments on this symmetric design

[AndrewT]

Hi,
is that the same as saying use the CCS current across the 680r to set the VAS quiescent current?
Sounds too easy!

picknowl is bookmarked.

[GK]

Originally posted by AndrewT
Hi,
is that the same as saying use the CCS current across the 680r to set the VAS quiescent current?
Sounds too easy!

picknowl is bookmarked.

Yes. The LTP current is actually irrelevant.

[danfo098]

Back home again.

Here is the latest schematic.

Removed the collector resistors for Q19/Q20.
Added 2 pole compensation.
Added cascodes in the VAS.
Changed VAS emitter degeneration to 100R.
Changed diff-stage emitter degeneration to 100R.
Added RC filtering for diff/VAS supply.
Lowered supply filtering capacitance to 470uF due to size constraints.
Added two Leds.

The "hump" however remains but I'm not going to spend more time on it for now (maybe it's because of the on-semi transistor models?).

LT Spice loop gain simulation.

The PCB size is 120x70mm (~4.72"x~2.76").
Preliminary PCB component layout.

And finally the BOM.

[danfo098]

I finished the PCB.

Schematic and PCB.

PCB Specs:
120x70x1.6mm
6 layers
70um copper on all layers
ENIG plating

$40.8 US / card (10 card order)

The PCB:

[Eva]

For that kind of symmetrical LTP with two current mirrors I did some experimentation a few years ago with an optocoupler for VAS bias regulation. One of the problems that I had was that 4N25 was very slow, I didn't know about 6N135, 6N136 and HCPL4502 back then

The photodiode was in series with the collector of the Vbe multiplier and with a resistor in parallel.

[darkfenriz]

I agree with that, some sort of VAS quescient current monitoring and feedback to LTP is absolutely mandatory. Optocoupler is popular solution.

[AndrewT]

are posts 35 & 36 referring to needed feedback due to the mirror adopted for the LTP collector loads or for some other reason?
Please explain.

[darkfenriz]

Yes, symmetrical LTPs with mirror loading are inheretely bias-unstable.

P.S. with some optocoupler, being basically a current-to-current transformer you can squeze all the gain and keep the bias points stable.

[danfo098]

So I could remove R22/R23 and their respective CCS:es and use a optocoupler instead somehow and get better performance?

I'm not sure how I should connect the feedback from the optocoupler so feel free to give more information, but if the performance enhancement isn't really great I think I'll stick to the current design.

Also I found a mistake in the pcb above (the E and B in the MJE340/50 footprint was inversed) but it's fixed now. I also removed one via, so now there is a total of zero vias .

[Eva]

Yes, I was talking about bias control in symmetrical VAS with two current mirrors.

The trick would be to make a circuit that always tends to bias runaway and then use one or two matched optos to reduce bias to the desired level.

For example, adding B-E resistors (or current soruces) to the VAS transistors to drain any minimum error current from the mirrors and then a current source between the bases which should be progressively turned off as the opto turns on.

It involves some complexity, but it kills the symmetrical-VAS-with-two-mirrors myth (In fact, I wouldn't do it for any other reason, as I would prefer to do a class D amplifier to start with).