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26th June 2009, 02:27 PM
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#1 |
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diyAudio Member
Join Date: May 2006
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Using Vertical Fets below Thermal Equilibrium pt?
Hi all. I'm designing a simple HV shunt regulator at the moment (for a tube stage) and am prevented from using lateral fets because their highest Vds seems to be 200v or so.
Also I'll be only running them at a few mA, so they will be have a negative Vgs tempco anyway. So the plan is to use vertical fets. Now I gather the DC feedback will take care of the Vgs decrease with temperature, but I am worried about the phenomenon of thermal "hot spots" in VFets  Are there any tips to operate VFets safely in these conditions? Apologies if this is a silly question, as I know Nelson Pass's stuff has no problem on this front.... Apologies if this is in the wrong forum, I just thought this would be the place to ask  Cheers dudes |
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26th June 2009, 02:37 PM
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#2 | |
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diyAudio Member
Join Date: Sep 2006
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Re: Using Vertical Fets below Thermal Equilibrium pt?
Quote:
I have used vertical power MOSFETs as pass regulators in a tube amplifier with no problem (screen voltage regulators in a Pentode amplifier with KT88s, and also for driver and input stage B+). Hot spots should be no problem in your application as long as you stay below rated dissipation and do a decent job of heat sinking them. Cheers, Bob |
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26th June 2009, 02:39 PM
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#3 |
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The one and only
Join Date: Mar 2001
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I don't think you'll have a hot spot issue, you appear to be well
within the SOA of the part. 
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