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Old 18th May 2009, 01:50 AM   #1
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Default JFET sorting by Ron?

Tried a quick experiment that looked promising. Using test probes with clips and grabbing the gate and source with one and the drain with the other (so as not to heat the FET) and using the 200 Ohm scale on a handheld DVM I was able to get instant readings of the "0" Vds channel resistance. This in theory is the inverse of the gm at Idss which for constant process "beta" factor would directly indicate the Idss. I pulled out one half of a super matched pair and grabbed a FET from a totally different date code with and almost identical Ron, the amp retained a very low Vos.
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Old 18th May 2009, 04:00 AM   #2
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Coolness!

One question though.

Who the hell's Ron?

se
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Old 18th May 2009, 04:17 AM   #3
EUVL is offline EUVL  Europe
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Thanks for the tipp.

Perhaps one question :

What is the advantage compared to measuring Idss with an ampmeter ?
It seems the effort is about the same ??


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Old 18th May 2009, 05:38 AM   #4
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If to put on a gate half of what voltage is on the drain measurements will be more accurate: your DVM does provide some bias, just for the measurements' sake.
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Old 18th May 2009, 07:04 AM   #5
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Quote:
Originally posted by Steve Eddy
Coolness!

One question though.

Who the hell's Ron?

se
I thought it stood for ON Resistance.
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Old 18th May 2009, 10:47 AM   #6
syn08 is offline syn08  Canada
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Default Re: JFET sorting by Ron?

Quote:
Originally posted by scott wurcer
Tried a quick experiment that looked promising. Using test probes with clips and grabbing the gate and source with one and the drain with the other (so as not to heat the FET) and using the 200 Ohm scale on a handheld DVM I was able to get instant readings of the "0" Vds channel resistance. This in theory is the inverse of the gm at Idss which for constant process "beta" factor would directly indicate the Idss. I pulled out one half of a super matched pair and grabbed a FET from a totally different date code with and almost identical Ron, the amp retained a very low Vos.
Sure, that's perfectly fine for matching JFETs.

All handheld DVMs that I've seen are injecting a constant current in the DUT and measure the voltage across; for a typical 3 1/2 digit DVM, the current on the 200 ohm scale is 1mA.

You measured and compared the JFET linear region(s) where gm is exactly half the gm in saturation. That's perfectly fine, as far as Idss is much larger than the measuring current, which is fine for BL or V devices, could be a problem for GR devices. For GR devices, you may enter the quasi-saturation region (that is, the region where Id-Vds starts bending) and the matching process could be a little shaky.
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Old 18th May 2009, 02:28 PM   #7
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Quote:
Originally posted by Samuel Jayaraj


I thought it stood for ON Resistance.
Yes, I know.

I was just being a smart-***.

se
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Old 18th May 2009, 02:49 PM   #8
AndrewT is offline AndrewT  Scotland
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Old 18th May 2009, 03:08 PM   #9
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Quote:
Originally posted by EUVL
Thanks for the tipp.

Perhaps one question :

What is the advantage compared to measuring Idss with an ampmeter ?
It seems the effort is about the same ??


Patrick
You don't get any self heating, that is the measurement settles instantly and you don't need anything but the meter. I was having to wait for a while to let the curent settle in when measuring Idss.
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Old 18th May 2009, 03:27 PM   #10
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Default Re: Re: JFET sorting by Ron?

Quote:
Originally posted by syn08


For GR devices, you may enter the quasi-saturation region (that is, the region where Id-Vds starts bending) and the matching process could be a little shaky.
The 2SK170 datasheet shows a min Idss of 2.6mA this would give a compliance burden of 50-60mV max @ 1mA, I would think the errors would remain minimal.

I'm curious what other folks consider an optimum match. Gm at the same operating point, Vos as a diff-pair at a particular operating point, untrimmed THD in a particular configuration?
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