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Old 10th April 2009, 01:55 AM   #1
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Default Limiting the bandwith of a current mirror

Sorry for not posting any schematics but i'm on a mac now and i don't have any usable schematic capture software. I feel the circuit is simple enough to describe it by words:

I have a current mirror made of two transistors connected to the supply by an emmiter resistor of arround 100 Ohms. Their bases are joined and the "governing" transistor has its collector tied to the bases, so it's a normal current mirror with emmiter degeneration.

I want to limit the bandwith of it and i don't know where to place the cap. The choices are two: base-supply or emmiter-supply (emmiter of the governing transistor). I could also place both if it was to sound better.

Placing it at the emmiter does not seem a good idea because it is a feedback method and it will start to fail as the frequency approaches the transition frequency of the output transistor. Nonlinearities then might cause demodulation and i don't want this to happen. Am i right? Can this it inject psu noise to the signal being mirrored?

This is for a discrete dc servo and i would really like it to "forget about the music and deal only with the offset", so i'm specifically concerned with not adding sources of noise.
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Old 10th April 2009, 02:06 AM   #2
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If you add a cap from collector to ground you can get a slew rate limitation. A cap in emitter will turn your mirror into a rectifier.
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Old 10th April 2009, 02:12 AM   #3
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Quote:
Originally posted by Wavebourn
If you add a cap from collector to ground you can get a slew rate limitation. A cap in emitter will turn your mirror into a rectifier.

I don't care about slew rate limitation as it is intended to work at dc. Slew rate of one volt per second might be enough.

What about a cap between the base and the emmiter of the "slave" transistor?
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Old 10th April 2009, 02:21 AM   #4
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Quote:
Originally posted by ionomolo



I don't care about slew rate limitation as it is intended to work at dc. Slew rate of one volt per second might be enough.

What about a cap between the base and the emmiter of the "slave" transistor?
Anyway you will get rectification, but according to my in-brain simulator connecting it from collector to power rail (or to ground) you would get more symmetrical slew rate limitation than between collector and emitter.
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Old 10th April 2009, 02:25 AM   #5
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Thanks, i will confirm your in-brain simulations with some spice once i sit on a computer capable of running it. Anyways i belive that your in-brain simulator is working right .

Thanks for your insights in rectification and symmetry. I'm missing anything else?
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Old 10th April 2009, 02:32 AM   #6
Mr Evil is offline Mr Evil  United Kingdom
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A capacitor from the input (base/collector of first transistor) to supply will effectively limit bandwidth by preventing high frequencies from reaching the input at all. The corner frequency will be determined by the size of the capacitor and the mirror's input resistance (approximately the size of the emmiter resistor).
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Old 10th April 2009, 02:33 AM   #7
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Quote:
Originally posted by ionomolo

Thanks for your insights in rectification and symmetry. I'm missing anything else?
No, just a symmetry of charging/discharging currents. If you have some extra voltage to trade off you may make it more symmetrical adding a resistor.
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Old 11th April 2009, 02:49 AM   #8
eyoung is offline eyoung  United States
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Hola Y'all...

There is a thread on current mirrors ,Current Mirror Discussion....do a search ...check it out.

Regards, Elwood
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