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|10th April 2003, 09:34 PM||#1|
Join Date: Oct 2002
Blog Entries: 1
For jcarr: PSRR of AD797
The question came up about what made the 797's PSRR so good- compared to most other IC opamps, the PSRR at high frequencies is as much as two orders of magnitude better.
I inquired to a friend of mine who was responsible for the design of that chip. His response boiled down to:
1. Tight matching of all the transistors on the chip. Everything balances much more closely than the norm.
2. Very stiff bias rails.
3. Cascoding of every stage.
The trade-offs are the inability to swing very close to the rails and the inability to accept common-mode signals that swing close to the rails. The bootstrap back to the current mirror you asked about is actually a way to drop output stage distortion. It's outlined in one of AD's patents, US5166637.
As a side note, I've used this chip in a phono amp and it worked spectacularly well.
If there's a sucker born every minute, where do the rest of them come from?
|11th April 2003, 02:44 AM||#2|
you remind me of how I wept
when I crushed one of these babies (AD797) the surface mount version, on my lab floor.
|11th April 2003, 03:01 AM||#3|
Join Date: Jul 2002
Location: Tokyo, Japan
Thank you very much, Sy:
>Tight matching of all the transistors on the chip.<
Always a good idea, but much more suited for monolithic construction than discrete.
>Very stiff bias rails.<
This is an interesting point that normally doesn't get much attention. But based on my own findings, I can concur. In fact, my Connoisseur 4.0 amplifier uses a folded-cascode topology with each and every bias point generated by a voltage regulator rather than a diode arrangement.
BTW, I have been experimenting with using bootstrapping to generate the biasing for the folded-cascode devices (within the context of a complementary topology), and the initial results are that this does consistently yield a measurable reduction in distortion. OTOH, I haven't gotten around to studying the PSRR areas yet.
>Cascoding of every stage.<
Ah. I had been wondering whether the summing current mirror was really a Widlar or not (per the simplified schematic provided in the datasheet). It sounds like it probably isn't.
>The trade-offs are the inability to swing very close to the rails<
But is this anything unique to the 797? Folded cascode topologies have this problem (if you can call it that) in general, because whatever voltage is used to bias the folded-cascode devices needs to be subtracted from the voltage rails, and the voltage dropped across the current sources does not contribute to output swing. The limiting voltage regarding the output swing is the biasing of the folded cascode devices, and since these must be clearly less than the supply voltages, the net effect is similar to a reduction in the supply rail voltages to the voltage gain stage.
>The bootstrap back to the current mirror you asked about is actually a way to drop output stage distortion.<
When I tried this some time ago, it appeared to me that what was happening was that the open-loop gain increased substantially, and this resulted in greater global NFB and was the primary mechanism in reducing distortion. But perhaps there is more happening than what my original observations suggested.
>It's outlined in one of AD's patents, US5166637.<
I will look this up.
>I've used this chip in a phono amp and it worked spectacularly well.<
So have I, and likewise, I thought that the results were promising.
Thanks again, Sy, and my compliments to your friend on a great design!
regards, jonathan carr
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