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Old 10th April 2003, 06:52 AM   #1
jcarr is offline jcarr  United States
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Default PSRR, topologies, device characteristics

Sy originally said:

>>>A cheezy opamp like an LF351 will have a PSRR of about 50 dB at 10KHz, and dramatically better performance at lower frequencies where the ear is more sensitive. A decent opamp like the AD797 (designed by one of my drinking buddies) will show something more like 80 dB at 10KHz.<<<

>>>Of course, the frequencies at which PSRR tails off are exactly those where proper bypassing can take care of things quite well.<<<

To which I responded:

>>SY: Do you reckon that the bootstrapping of the second-stage summing current mirror is partly responsible for the better-than-normal PSRR of the AD797? When I tried this, I remember that it certainly added loads of open-loop gain, but I don't seem to recall how it affected the PSRR.<<

Sy then answered:

>I don't know off the top of my head. I'll take a look at the schematic. If necessary, I'll ask the designer to put down his glass for a moment and explain it to me.<

Thank you, Sy. The 797 has a couple of interesting twists compared to a normal folded-cascode implementation, and it would be educational to hear the designer's rationale for his choices.

It would be particularly interesting to know whether the 797's PSRR is primarily down the topology, or whether something more is provided by the device characteristics. In my designs, I have found that the Early voltages of the summing current-mirror devices have a notable effect on the negative-rail PSRR, but so far it has been difficult to capitalize on this information - the vast majority of medium-voltage BJTs with low noise and low capacitance have rather high Early voltages, while Early-voltage cancelling topologies are tricky.

For instance, Barry Hilton discusses an Early-voltage cancelling scheme on pages 194~5 of Jim William's compilation "Analog Circuit Design". Has anyone tried this type of topology, or managed to get it working to satisfaction?

best, jonathan carr
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Old 12th April 2003, 06:23 AM   #2
jcx is offline jcx  United States
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The Williams approach is frighteningly complex, I have prototyped and simulated this "Super Pair" cirucit but never tested it thoroughly for a product application

Baxendall, “Constant-current source with unusually high internal resistance ..." Electronics Letters , vol 2, 1966, p351
( I haven't read this article but it was referenced in: "Active Filters for Integrated Circuits" W.E.Heinlein and W. H. Holmes, 1974 )


Hawksford, “Reduction of Transistor Slope Impedance Dependent Distortion in Large-Signal Amplifiers” JAES Vol. 36, Number 4 pp. 213 (1988)


Largely forgotten during 70's, rediscovered/reinvented in 90's as complementary bipolar IC processes and current feedback op amps became popular

Hawksford's paper analyses circuit, shows near equivalence to traditional cascode, shows many topological variants with application to discrete audio amplifier design
( Hawksford may have been unaware of the Baxendall ref.)

Provides nearly 100x improvement in nonlinearity due to Hfe and collector-base impedance variation over single transistor ( Ccb cancellation gives traditional cascode's speed as well )

NOT JUST A DARLINGTON!
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Old 12th April 2003, 06:33 AM   #3
jcx is offline jcx  United States
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…for even more fun see:

“A General Relationship Between Amplifier Parameters, And Its Application to PSRR Improvement” E Sackinger, J Groette, W Guggenbuhl, IEEE Trans CAS vol 38, #10 10/83 pp 1171-1181

which gives:

1/(CMRR) + 1/(PSRR+) + 1/(PSRR-) = (1/Adiff) * Zload/(Zload+Zout)

as a fundamental relationship for the standard op amp, and shows ways around this limit by adding diff output or output ref to a amp circuit

( admit it, you’ve always wanted to say: “that’s an obvious consequence of the gauge-invariance of the electric potential field” )
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Old 12th April 2003, 06:40 AM   #4
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Question Re: PSRR, topologies, device characteristics

Quote:
Originally posted by jcarr
pages 194~5 of Jim William's compilation &quot;Analog Circuit Design&quot
best, jonathan carr

Hi Jonathan,
Where can I find this Compilation of Analog Circuit Design by Jim Williams?
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Old 12th April 2003, 06:48 AM   #5
jcx is offline jcx  United States
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"Analog Circuit Design
Art, Science and Personalities" Jim Williams ed
EDN series for Design Engineers
Butterworth-Heineman 1991
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Old 12th April 2003, 12:41 PM   #6
jcarr is offline jcarr  United States
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Elso:

Hardback edition: ISBN 0-7506-9166-2

Softcover edition: ISBN 0-7506-9640-0

hth, jonathan carr
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Old 12th April 2003, 01:57 PM   #7
jcarr is offline jcarr  United States
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jcx:

>The Williams approach is frighteningly complex, I have prototyped and simulated this "Super Pair" cirucit but never tested it thoroughly for a product application<

I enjoy the conceptual process behind the circuit, which is a major reason why I am attracted to it. I imagine that building a circuit that incorporated similar thinking could be a useful learning experience.

Thank you for bringing my attention to the Baxandall circuit. I found it very interesting - not the least because I worked out a compound cascode circuit on my own which is almost identical to the Baxendall version that you posted. I had been under the impression that I had invented something pretty cool, but it looks like I was beaten to the punch over 30 years ago. It would be interesting to read Baxandall's article, because this would give me an additional perspective on my own work.

In my version, both R3 and R4 are CCSs, and I alternate between tying R4 to a independent voltage rail per your schematic, or to the Iout node in a floating configuration. My circuit exists in both NPN-PNP and PNP-NPN flavors, and I use it primarily as a cascode with built-in Cob cancellation.

I have not read the Hawksford paper either, but it looks like I should.

Additional thoughts on the compound cascode circuit. Q5 should ideally be chosen for high hfe, low Cob, but also low Vsat, and this is a somewhat unusual combination.

Although one of the goals is to cancel the Cob of Q4, the end result is a reduction rather than a cancellation. If we express the residual capacitance as Cres, the equation is:

Cres=(1-hfb)Cob,

where hfb is the current amplitude of Q5 in common-base mode, and hfe is the current amplitude of Q5 in common-emitter mode.,

This can be approximated as Cob/hfe, and since hfe is typically anywhere from 100~1000, the residual capacitance Cres will be reduced to 1% ~0.1% of the Cob.

If we also look at the output impedance, for a normal simple cascode this can be approximated as ro x hfe, where ro is the collector-to-emitter impedance - including parasitics. If we appropriate jcx's device identifiers and apply them to a simple cascode, the equation would be ro4 x hfe4.

Now if we look at the output impedance of the compound cascode, ro x hfe remains intact, but is further multiplied by the hfe of the additional transistor. In jcx's circuit, we would have (ro4 x hfe4) x hfe5, and the output impedance will go way, way up.

In practice, the output impedance of a simple cascode may be, say, 30Mohm, while the output impedance of the same device when used in compound cascode configuration will be more like 300Mohms.

regards, jonathan carr
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Old 12th April 2003, 10:44 PM   #8
jcx is offline jcx  United States
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The relation:

1/(CMRR) + 1/(PSRR+) + 1/(PSRR-) = (1/Adiff) * Zload/(Zload+Zout)


shows that high PSRR & CMRR is only possible in a op amp if the gain Adiff is very high, it would be interesting to know if Scott Wurcer knew this when designing the AD797

If Sy can get the attention of Analog Devices maybe he can get someone to educate Soufiane Bendaoud on this issue and prevent his buggering more of AD’s spice models by adding “CMRR” modeling parts that are referenced to ground, ruining perfectly good multipole op amp models for predicting floating/bootstrapped power supply op amp behavior – the irony is that it actually requires fewer parts to model these effects correctly

In discrete design we can do better than this relation for the PSSR by referencing the Vas stage to an external circuit reference ground by separately regulating the Vas and input stage supplies
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Old 12th April 2003, 11:06 PM   #9
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I'll relay your criticism .
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Old 1st January 2004, 10:06 PM   #10
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OK, I now understand how the super pair works ; reducing the linearities by reinjecting the main transistor's base current into the main circuit.

However for me it oscillates ! I've opened a thread for that if you can help me :

Baxandall Super Pair

Thanks a lot.
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