YAP - Yet Another PowerAmp

[syn08]

Dayjob duties and troubles are still keeping me away from updating my website with the latest power amp I designed and implemented. I really hope I'll be able to replace the current teaser with construction details, measurements, etc... pretty much following the same pattern and layout as I did for the PGP amp, ASAP. This project will follow the same roadmap, final bench testing is now completed, now the power supply, auxiliarry circuitry, case, then audition tests.

Meantime, here are the schematics and some final experimental results. I should probably start from my dissatisfactions with the PGP amp. Being a software guy, I like modular things, pretty much like LEGO building blocks that can be assemblied and tuned to match certain requirements or tastes; unfortunately, this was not the case with the PGP amp. The HEC output stage was anything but flexible and the requirements for precision resistors and on board tuning is really annoying. I've seen recently on this forum a DIYer fighting the HEC battle, it's very hard to distinguish between an out of balance HEC stage and some external issues, like power lines induced 2nd harmonics. The front end that Edmond designed and simulated is again not a model of flexibility; changing the gain from 28 to 20 requires quite a bunch of parts to be replaced, because all the Cherry feedback loops have to be rebalanced. OTOH, if one decides to build his own PCBs and change the layout of the whole amp, chances are high the final results are going to be poor (I had such a DIYer case that I was trying earlier this year to help by email). And of course, complexity and costs are issues as well; the front end PCB is definitely something that should go to a PCB manufacturer (I use either www.4pcb.com in the US or www.apcircuits.com in Canada) which is known as being quite expensive.

I have decided for a current feedback, unity gain OPS able to drive (this time) enough current to safely support 4ohm loads; theree pairs of 2SK1530/2SJ201 were used. The output devices are driven by a diamond buffer, while the VAS is a so-called Hawksford cascode. Current feedback is applied to the input stage, set for a gain of 1. The input stage is thermally compensated.

The protection is quite original and is experimentally proven to be very efficient. The output devices current is monitored by a standard current sense circuit. However, this circuit controls a floating current switch. The loop gain is pretty high, so as soon as the current sense circuit injects a small current the curent switch fires and latches, effectively cutting the VAS and the diamond buffer currents. The proces is sequenced, to avoid any transient effects at the output which should drop cleanly to zero. I have successfully tested several times for load shorts at full power and the amp survived. An optocoupler (no need for a high speed device) is used only for signalling the fault condition.

With all due respect to Edmond and others here, I was unable to identify any advantage of a TMC compensation schema over TPC. The OPS uses TPC and, combined with a very careful layout, delivers 8MHz of unity gain bandwidth and 85 degrees of phase margin, good enough for pole separation when adding a whatever front end stage (with gain). Distortion @20KHz is a mere 0.002% (20ppm) and IMD in the same range.

http://www.synaesthesia.ca/files/ops.gif

The front end was so far build in three versions.

1. A National LME49810 IC, using the bias terminals as outputs (they deliver a little over 2mA just good for biasing the OPS input stage). This is a ridiculously simple solution, though delivers excellent performance. The overall measured THD20 with the standard LME49810 compensation was very close to the National datasheet (for the LME49810 alone) of 7ppm. The only think not really spectacular was the slew rate, limited by the LME49810 to about 40V/us. The IMD consequently measured slightly higher (at around 15ppm, this has to be doublechecked). I believe this approach is very effective and I would recommend to anybody that is looking for a quick win rather the ultimate performance. BTW, the on chip Baker clamp works great.

2. A mixed (IC plus discretes) current feedback front end (schematic is attached). The IC is an ADA4899-1, one of the best bipolar ICs available today, coming from Scott's playground Another Hawksford cascode as a gain stage and a servo loop around a good FET input opamp. Compensation is very simple and the unity gain can be set anywhere between 1 and 3MHz. Some implementation details are missing from this schematic; two very simple power supplies are added for the front end supply lines, so that the front end Baker clamp would kick in before the OPS enters in clipping.

End to end measured performances are quite spectucular. Depending on the front end compensation schema, THD20 goes from under 1ppm to 4-5ppm. There is of course a trade between the stability margin and loop gain. For 1ppm and under the response was sligtly overshooting (<15%). To stay safe, the final circuit deliveres 2ppm of THD20 and the same amount of IMD19+20. Slew rate is around 270V/uS (non slewing, of course) at full output, before the Zoebel and output inductor. The output inductor is not required, but I've decided to settle for a 0.6uH || 4.7ohm to stay on the safe side. The amp is stable in whatewe reactive load I was able to provide.

http://www.synaesthesia.ca/files/FS.gif

3. A pure discrete front end, using a current feedback input stage and a folded cascode gain stage. Schematic to be published later, but performance wise there's nothing to write home about. It was actually worse than 1. This doesn't mean anything but the circuit needs more design work.

Just for the heck, I have tried the new OPS with the PGP front end. Unfortunately it is not stable out of the box and I was not in the mood to start tweaking neither of the boards.

Again, I'll update my website as soon as possible with all the design, construction details and measurements results. Meantime, comments are welcomed.

[PMA]

Congratulations to your new project.

[h_a]

Again very impressive work!

By the way you have also my envy for getting reasonable numbers out of the simulator for these circuits!

Have fun, Hannes

[syn08]

Originally posted by h_a
By the way you have also my envy for getting reasonable numbers out of the simulator for these circuits!

Well, I'm not really proud of the numbers that I get from the PSpice simulator. As long as I still have to work with unreliable models, Spice is to me just a :bs: checker.

For this particular project, Spice correctly guessed the order of magnitude and the trends, that's it. All numbers above are measured.

[h_a]

For this particular project, Spice correctly guessed the order of magnitude and the trends, that's it.

That's a lot more than I get usually.

Anyway, I'm always wondering how the others get reliable data from simulation or if they - when posting e.g. THD numbers - just don't mention that e.g. the calculated frequency response is bogus.

But that doesn't belong here

All numbers above are measured.

I didn't intend to say otherwise.

I'm keen on some more details!

Have fun, Hannes

[Edmond Stuart]

First, Congratulations with YAP. It should be considered as new milestone which clearly demonstrates that a very low distortion amp can also be made with less sophistication and complexity!.

Second, despite your critics in the past, I feel really flattered that you have adopted my CFB-OPS instead of HEC.

Third, regarding TMC vs. TPC, you're right that in this particular application not much is gained by using TMC (probably because the gain of the OPS is just 1). So your comment on TMC should not be considered as a general rule of thumb. It all depends on the details.
BTW, I'm using TMC in my OPS (gain=1.33) of the PCP amp and it lowers the THD with only a modest 6dB or so.

Fourth, regarding Spice. It's certainly not only a BS checker. You mentioned a measured OPS THD20 of 20ppm. I get simulated 16ppm, however with four pairs of MOSFETs in the OPS. Who says that THD simulations are unreliable?

[janneman]

Originally posted by syn08
Dayjob duties and troubles are still keeping me away from updating my website with the latest power amp I designed and implemented. I really hope I'll be able to replace the current teaser with construction details, measurements, etc... pretty much following the same pattern and layout as I did for the PGP amp, ASAP. This project will follow the same roadmap, final bench testing is now completed, now the power supply, auxiliarry circuitry, case, then audition tests.

Meantime, here are the schematics and some final experimental results. [snip]

Impressive! I like your current switch protection. It reminds me of a device I used a very long time ago, something like a dual gate thyristor I think. Must look it up.

Again, impressive piece of work.

Jan Didden

[syn08]

Originally posted by Edmond Stuart

Second, despite your critics in the past, I feel really flattered that you have adopted my CFB-OPS instead of HEC.

Fourth, regarding Spice. It's certainly not only a BS checker. You mentioned a measured OPS THD20 of 20ppm. I get simulated 16ppm, however with four pairs of MOSFETs in the OPS. Who says that THD simulations are unreliable?

My critics in the past are still there and valid. I disagree for a NFBOPS that has the loop gain pole(s) close to the front end and the global FB loop gains. The OPS has to be much faster and a 4...5 times pole frequency separation is optimal. According to my analysis, even a little overshooting is acceptable as a trade for more speed. Your approach is exactly the "monolithic" approach that I don't in particular like, melting the OPS and the front end in a tightly integrated compensation schema. Granted, this approach may have certain advantages performance wise, but it is difficult to implement and reproduce.

Take a closer look at the schematic; the feedback loop around the input stage is different than yours! In fact, mine is the classic current feedback loop, while yours (with voltage gain) is a combination (from an analysis perspective) of both current and voltage, none of them alone can be used to analyze the circuit. If the performance requirements are met and I don't see any advantages in the other options, I always choose a clear, classic implementation.

The diamond buffer is one of the key to the good performance of this OPS; avoiding driving the output devices from a simple follower makes quite a difference in both measurements and simulations.

Finally, apparently my search for a transparent protection circuit is finally over; I've also tried the same schema with power bipolars (2SA1930/2SC5200) and it protected the devices just fine, apparently without a performance penalty as well.

[traderbam]

Very impressive, Ovidiu. You have been very busy.

I like the use of CFB, a more sensible and versatile implementation of local NFB around the output stage than the PGP, and of course the THD figures are excellent.

I also really like your natty protection circuit. It first reminded me of a triac, and then I started musing about the concept of the "audiophile triac", it being implemented in discrete form (for "real men")

I like to count signal path transistors. My eyes are getting old but, excluding power FETs, I reckon the PGP has about 40 and the YAP about 20 plus op-amp. So I think you are reducing the complexity a little, which is a good thing.

Brian

[Edmond Stuart]

Ovidiu,

:bs: Your critics (in the past) had nothing to do with a "4...5 times pole frequency separation" between the front-end and OPS. You were just moaning about poles, zeros and beta dependencies of the OPS alone. Also, you reject my (simplified) transfer functions. I'm still waiting for yours and hope they will be better.

BTW, My latest design of the PCP amp has front-end Fu of 750kHz and a OPS Fu of 3MHz. IOW, nothing to complain about, even by you.

2. "mine is the classic current feedback loop". I guess you are talking about the input stage of the OPS (not the front-end, as this one has a voltage FB op-amp). Indeed, my OPS has a voltage gain of 1.33. That doesn't mean it's no longer a CFB thingy. So what's your point? Analyzing problems? That's why simulators are for!

3. What's so special about the 'diamond buffer'? Better transient response, lack of dangerous cross-conduction? Please elaborate.

4. "I always choose a clear, classic implementation" . Hmm... isn't that a clear hindrance to evolution, is it?