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Old 15th August 2008, 07:22 PM   #1
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Question Cascode Buffers

Primarily the use of cascode (CB) current buffers upon common-emitter (CE) transconductance stages increases bandwidth and stabilizes gain by holding collector voltage constant for the CE stage. This is readily available knowledge.

The main question is: In case of low-gain CE stages with substantial signal voltage arising on relatively large emitter ballast resistors (approximately negatively proportional to base signal), does it ever make sense to buffer the base (of CE stage) signal with an emitter follower to drive cascode "ground" reference voltage, so that the CE stage sees constant C-E voltage at the expense of applying signal to the CB stage?

Would this decrease the advantages of the CB stage by re-introducing the Miller effect (remember that CB base drive has been buffered by an emitter however), or are the potential improvements of stabilizing CE stage C-E voltage worth the compromise (including additional semiconductor components) if high dynamic voltage range (significantly varied CE emitter voltage) is desirable?

Any thoughts on this would be greatly appreciated!

Happy listening!!
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Old 15th August 2008, 08:28 PM   #2
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Exclamation error fix

With apology, an error correction: in case of "negatively proportional to base signal" I meant to be referring to C-E voltage (and C-B voltage), rather than emitter voltage.

Good day.
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Old 15th August 2008, 08:58 PM   #3
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I do not often use cascode.
The few times I use it, is 9 times out of 10 in the VAS.

It is very much dependent on the actual transistors, voltage and currents used,
if there is a real benefit of using cascoding.
At least to justify the increased complexity and deal with drawbacks.

Not all parameters gets better with cascode.
There are parameters that will be less good.

Bottomline:
There are no precise rules for when and how to cascode.
Depends on the circuit, the source signal, the output signal and used transistors.
And even in those cases when a cascode can improve,
there are many times other ways to deal in a more simple way.
In my opinion.


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Old 15th August 2008, 09:23 PM   #4
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Default Re: Cascode Buffers

Quote:
Originally posted by acoustixman


Would this decrease the advantages of the CB stage by re-introducing the Miller effect

In my opinion: YES, exactly.

Alternatively you can use something like Hawksford's 'cascomp' or reference the CB stage to the emitter of CE stage (even with a higher voltage JFET if you like).

Kind Regards,

Adam
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Old 15th August 2008, 10:01 PM   #5
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lineup,
you talk loosely.

acoustixman,
could you come up with a drawing, please.
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Old 15th August 2008, 11:52 PM   #6
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Default accompanying schematic

Thanks all for the replies;

lineup: I didn't intend to be debating the use of the cascode topology itself. Agreed; like all practical circuit implementations it has real-life limitations and represents a form of compromise (rail voltage loss margin being the greatest in my opinion). These limitations do not generally include bandwidth or linearity in my experience. As such I use them for virtually all Miller-sensitive stages in my own audio work. Such high GPB & Hfe transistors are now available (non-darlingtons in the 1,000's) [generally at "low" C-E voltage ratings] that interstage loading can be minimized and this is a substantial benefit alone, but they need to be protected under a cascode stage in the VA section in particular to defend their ratings.

darkfenriz: I feel that you understood my question entirely, but I'm wondering if the effects would quantitatively outweigh those of having variance in the C-E voltage of the gain transistor.

Lumba Ogir: I never talk loosely. Our terminology is probably different (I'm a chemical engineer, not electrical unfortunately so I just have to pick this stuff up as I go)... I have included a diagram for clarity:

In the diagram, I have omitted frequency and temperature compensation elements and other distracting supplemental componentry, other than the zener bypass caps, to help imply that the voltage DROP there is to be maintained constant, even if it changes relative to the rails in "option II".

It is to be assumed that the ballast resistor is significant enough to provide substantial AC signal at "V emittr", such that with "Option I", the C-E voltage on Q1 will surely decrease as "error IN" increases. This would happen likewise in "Option II", but this voltage is applied via buffer to the Zener, so that while the cascode voltage "slides up" in response, the C-E voltage would be held approximately constant. In this state, Q1 will be "optimally cascoded", but only because of the base of Q2 being driven with signal. This is where the main question comes in:

Does the base of Q2 being driven with signal negate the effects of the cascode in terms of the final collector being able to impose its Miller capacitance on the base, or if the voltage "interval generator" impedance is low enough, will that dissapear? Miller himself proposed that the degree of effect would depend on source impedance. I'm making no statement about the Zener bias impedance, rather wondering if this is a worthy endeavor at SOME adequately low cascode bias source (VBQ2) impedance. Surely the Miller capacitance pole frequency is dictated positively by the available base drive current, correct??

More thoughts?

Thanks again all, and happy listening!
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Old 15th August 2008, 11:53 PM   #7
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Incidentally, it is further assumed that the configuration allows that Q3 never saturates.
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Old 16th August 2008, 08:32 PM   #8
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Your circuit from example II is actually referencing collector voltage to emitter voltage.
This is very nice circuit and should perform better than ordinary cascode from example I, but beware of oscillations! There are paths of feedback which may create a high Q oscillator at several MHz. This may need some experiments with layout, base resistors or even ferrite beads to tame it.

Adam
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Old 16th August 2008, 08:39 PM   #9
Tim__x is offline Tim__x  Canada
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When you have voltage gain, the miller effect never goes away. Whenever there is significant voltage swing on the collector relative (remember voltages are always differential) to the base, you have the miller effect.
Ignore ground, just look at the voltages and currents actually presented to the transistor and you'll see a CB stage is no different than a CE stage.

All a cascode does is let you move the miller effect to a different transistor. It lets you pick a faster, lower capacitance transistor without much penalty, and it's makes it easier to drive the miller affected ( ) transistor from a low impedance source; it's easier to make a low impedance fixed voltage reference than a low impedance signal.

Your idea (which I am sorry to say, like most other ideas is not new) will likely increase linearity. It's hard to predict what it'll do for speed, it'll reduce the remaining miller effect on the lower transistor, but it will also increase the drive impedance to the base of the upper transistor lowering the pole produced by the miller capacitance.
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Old 16th August 2008, 09:51 PM   #10
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acoustixman,
Quote:
I never talk loosely.
Please note I did not say you do, that was addressed to Lineup.

To me its an elegant way of directly applying the drain-source reference voltage. (An old British? idea).
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