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Old 9th July 2008, 09:00 PM   #1
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Default Bryston quad-complementary interconnection

4B SST schematic

Someone please look at the schematic and then tell me, how it is possible to get 300W,8ohm and 500W,4ohm reliable power out of four pairs of MJL21193/21194, without transgress the SOA and that at +/- 85V rails ?

Is it some kind of peakpower, or what is it Brystone really spec ?

The amp look ordinary with ordinary outside heatsinks.
Anyway, the key seem to be the patented Quad-complementary interconnection of powertransistors in the outputstage.
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Old 9th July 2008, 09:22 PM   #2
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My calculations are:

1) 8 ohm load (resistive), 300W average power
Each bank of 4 transistors dissipates 83W avg, 226W peak

2) 4 ohm load (resistive), 500W average power
Each bank of 4 transistors dissipates 175W avg, 452W peak

Is this what you estimate?
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Old 9th July 2008, 10:05 PM   #3
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If my calculations are correct, the worst case scenario for SOA is when the amp is driving 64V across a 4 ohm load. This is about 1kW peak load power. At this point the bank of 4 transistors will have about 21V Vce (85V - 64V) and the current will be 16A. The SOA curve for MJL21194 is ok for 21V Vce and 4A.

The next issue is max. power dissipation. Each transistor can dissipate 200W at 25C, derated at 1.43W/C. The peak power of each bank of 4 is 453W, a peak of 113W per transistor. We can calculate the maximum case temperature as 86C = 25C + (200 - 113)/1.43.

It gets a little tricky to calculate the maximum heatsink temperature such that the transistor case temperature never exceeds 86C. We have to estimate the thermal resistance of the insulator/grease. The figure of 0.5C/W as a rule of thumb comes to mind, not sure how accurate this is, but let's use it to show a working. We know the avg dissipation is 44W = 175/4. This means the heatsink-case temp difference will be 22C on average. So the heatsink must be less than 64C = 86 - 22. Because the power varies across the cycle and there is thermal inertia involved, the heatsink needs to be lower than 64C...maybe below 60C...it's a guess.

So it looks like the amp will be ok, even at 500W into 4-ohms (resistive), provided the heatsink is kept below 60C.

Whether the heatsink can be kept below 60C in the sort of environment where someone will be driving 500W channel is another question.
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Old 9th July 2008, 10:50 PM   #4
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I usually do calculations like this:

Assume worst possible signal: square wave at half rail voltage. The peak dissipation in transistors is the same as sine, the average a little bit bigger but not much. It is much easier to calculate though and gives some safety margin.

Let's try with 85V rails. This is unloaded right? If it is this calculation will be very pessimistic as the rails *will* drop a lot under load!

Peak dissipation per transistor = (85 volts/2)**2 / ((4 transistors * 4 ohms) + .3 ohms) = 111W peak

Average dissipation is half of that.

Rth(j-c) of these are 0.625 K/W. The worst case is at low frequencies. Let's say 20Hz. Each transistor is on for 25mS. It would be nice to have a transient thermal impedance plot for the transistors, but something like 0.5 K/W at D = 0.5 might be reasonable as these have pretty large dies giving good thermal conduction to the heatspreader. That would mean Tj peaks at 55 degrees above case temperature.

The package itself has a lot of thermal mass so the insulator only sees the average power. 55 watts average * 0.5 K/W = 28 degrees.

The thermal breaker is 80 degrees. Just before thermal cutoff, driving worst possible signal into the load with no rail drop: 163 degrees peak Tj. This is 13 degrees over rated value but we didn't account for some very important effects:
* Rails dropping under load (This one makes a huge difference!)
* Music is much more benign than a low-frequency square wave. It doesn't sit at peak dissipation for 25mS at a time and the case-sink time constant is pretty long so the dynamics of the music will make the average dissipation lower even when bursts of low frequency are played.

OTOH reactive load will increase (especially peak) dissipation somewhat but usually the impedance is higher at these frequencies and the peaks are pretty short and no problem even at low frequencies.

QSC has an amp that uses 4 pairs 2SC5200/2SA1943 per rail from +-85V or so unloaded rails. These have crappy SOA and thermal performance compared to these but still they seem to be reliable...
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Old 9th July 2008, 10:58 PM   #5
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BTW, 500W 4 ohm would suggest the rails drop to about 70V or so. -> 136 or so degrees C tj peak into 4 ohm resistive
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Old 9th July 2008, 11:21 PM   #6
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Yes, by my method too, if the rails sat at 70V, a max heatsink of 80C would be ok for 500W avg into 4 ohms resistive. I'm being a little more conservative than you so if your psu sag is right then it looks like the Bryston will be ok.
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Old 10th July 2008, 12:28 AM   #7
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I'd guess something like that, 500W into 4 ohms is about 64V peak.

If I use the DC thermal resistance of 0.625 K/W instead of assuming 0.5 for 25mS D = 0.5 my method gives 145 degrees as peak Tj for 70V rails. This is for a very unrealistic waveform so my method is a bit pessimistic in this case.

There are some typos in the Onsemi datasheets, Pdmax, Rth(j-c) and derating doesn't add up. I believe the right ones are 200W pdmax, Rth of 0.625 K/W and thermal derating of 1.6 K/W. The alternative is 180W pdmax, 0.7 K/W and 1.43 K/W derating - but I believe this is something that has sneaked in from the TO-3 datasheets. Some of the other TO-264 and even TO-247 case transistors show 0.625K/W as their value.

The thermal capacity of the packages themselves is very big, I believe I've seen numbers in the order of 2 Ws/K - and that was for the smaller TO247. 100W during one half cycle of 20Hz would cause a temperature change of about 1 deg C... The time constant with the insulator is about 1 second - large compared not only to single half cycles but even notes in the music.
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Old 10th July 2008, 09:34 AM   #8
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" I believe the right ones are 200W pdmax, Rth of 0.625 K/W and thermal derating of 1.6 K/W."

Yes, I think you re right. So this gives an estimated total Rth(j-h) = 1.125 K/W.

If the psu does not sag (+/-85V case) each transistor dissipates 44W average, raising its Tj 50C above Th. The peak is 175W - raising Tj by a further 148C if it were continuous. As you say, the heat capacity is pretty high. Without doing a simulation I can only guess. Perhaps 10% of the peak is achieved (?) => the max. additional junction temperature is 15C, making the max T(j-h) = 65C. So Th max = 85C.

For an 80C heatsink cut-out this looks a little cosy at first, but given your estimated psu sag, it looks like the transistors will operate well within their thermal spec.
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Old 10th July 2008, 12:59 PM   #9
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Thanks guys

Im reading and learning out of your conclusions.
As a newbee in SS, im not abel to argue with you yet, but im learning quickly.

Can these figures tell us something?
2 channels At Idle 170 Watts
Max. Heat Dissipation 580 Btu/Hr.
2 channels @ 300W @ 8 ohms 1280 Watts
Max. Heat Dissipation 8 ohms 2320 Btu/Hr.
2 channels @ 500W @ 4 ohms 2100W
Max. Heat Dissipation 4 ohms 3750 Btu/Hr

Click the image to open in full size.
As we can see the heatsinks are not big and no fans, the transformers are stacked.
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Old 10th July 2008, 03:34 PM   #10
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Quote:
Originally posted by traderbam
" I believe the right ones are 200W pdmax, Rth of 0.625 K/W and thermal derating of 1.6 K/W."

Yes, I think you re right. So this gives an estimated total Rth(j-h) = 1.125 K/W.

If the psu does not sag (+/-85V case) each transistor dissipates 44W average, raising its Tj 50C above Th. The peak is 175W - raising Tj by a further 148C if it were continuous. As you say, the heat capacity is pretty high. Without doing a simulation I can only guess. Perhaps 10% of the peak is achieved (?) => the max. additional junction temperature is 15C, making the max T(j-h) = 65C. So Th max = 85C.

For an 80C heatsink cut-out this looks a little cosy at first, but given your estimated psu sag, it looks like the transistors will operate well within their thermal spec.
Wasn't 175W the average power for the 4 transistors combined? Both you and I calculated a peak of 110W per transistor.

The junction-case transient thermal impedance won't be much lower than DC at lower frequencies. Possibly 80-90%. The case-sink is what I meant will not change temperature much at all during a cycle. Calculating sink temperature + Rth(c-s) * average power + Rth(j-c [for DC]) * peak power would be a little conservative but not much.

With your numbers: 80 + .5 * 44 + .625 * 110 = 170 deg C (peaks 90 degrees above sink temperature)

Add in the rail drop and we are safe, even at low frequencies

I'd say this design is quite conservative compared to many that are out there...
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