AMP problem

[nigelwright7557]

Having some problems with a new amp.

Any one any idea what causes this ?

10KHz sine wave signal in.

Below 4 v pk 2 pk the output is fine.
Get above 4 v and the resulting waveform occurrs.

Have tried more drive current and it makes no difference.
Disconnected zobel network and again no difference.

Any input would be appreciated.

Nigel

[nigelwright7557]

Enclosed driver board cct

The output transistors are IRFP240 and IRFP9240
There are 3 of each on teh output.

[wg_ski]

That 100k limit sure makes schematics hard to read. This one takes the cake.

[nigelwright7557]

Originally posted by wg_ski
That 100k limit sure makes schematics hard to read. This one takes the cake.

Cant be helped on a free site.........

The amp actually sounds fine which is odd !
If I hadnt seen the scope output I would have said it was OK.

[nigelwright7557]

Heres a slightly bigger cct diagram

[CBS240]

Hi

What does the square wave look like? Is there a difference between loaded and unloaded? I suspect it has something to do with the two diodes on the emitter of one transistor in the LTP and not the other. How is DC output? It should balance fairly close to 0VDC without these diodes. The bases of Q1 & Q2 should be the same voltage, at 0VDC, in order to have balance in the LTP. You must strive for current balance in the LTP.

You only have 2 diode drops as the gate spreader on the outputs? VgsTH is 2-4V for these devices. Could there be crossover noise since the outputs are in cut-off? These devices need thermal compensation as well. Look at the transfer characteristic curve (Fig 7) in the datasheet. See how Vgs decreases vs Id for an increase in temperature? It appears these devices have a positive temperature coefficient below 2A. If you bias at 2A, I guess you wouldn't need compensation, eh?

[nigelwright7557]

Originally posted by CBS240
Hi

What does the square wave look like? Is there a difference between loaded and unloaded? I suspect it has something to do with the two diodes on the emitter of one transistor in the LTP and not the other. How is DC output? It should balance fairly close to 0VDC without these diodes. The bases of Q1 & Q2 should be the same voltage, at 0VDC, in order to have balance in the LTP. You must strive for current balance in the LTP.

You only have 2 diode drops as the gate spreader on the outputs? VgsTH is 2-4V for these devices. Could there be crossover noise since the outputs are in cut-off? These devices need thermal compensation as well. Look at the transfer characteristic curve (Fig 7) in the datasheet. See how Vgs decreases vs Id for an increase in temperature? It appears these devices have a positive temperature coefficient below 2A. If you bias at 2A, I guess you wouldn't need compensation, eh?

If I unplug the speaker the signal is much more like a sine wave.

The 2 diodes on the LTP make the output close to zero volts, without them it can be close to a volt and the output transistors on one half run hot.

The 2 diodes used to bias the output rely more on negative feedback to get rid of crossover distortion. Any cutoff off period of both transistors will be minimal due to feedback compensating.

A square wave looks very rounded, I suspect due to the input filter.

What is odd it is only the negative half of the waveform with a problem.
On the previous smaller amp I built I just increased the drive to the output stage to get rid of a similar problem but that doesnt work this time. I am missing something somewhere.

[CBS240]

Hi

Yes, the input filter will round the edges of the square wave and should be disconnected for that test. I suspect Q1 is under-biased with respect to Q2. Does the output look like this without those 2 diodes in the LTP even if it does produce DC? If the AC looks good, that may be where the problem is. If R5 is 120R then 5mA should flow evenly through Q1 & Q2. Ignoring the base current of Q5, to have 0.6V across R3 with 2.5mA is .6V/.0025A=240R. If the gain of MJE350 is 100 at 15mA, then current in R3 is 2.5mA less 150uA, or 2.35mA so 0.6V/.00235A=255R. I guess 260R would be closest real value. I can't read what the value for R3 is in the drawing.

Also, it sounds like the outputs are underbiased as well. The gates of the outputs should need about 6-7V between them for conduction.

[nigelwright7557]

Originally posted by CBS240
Hi

Yes, the input filter will round the edges of the square wave and should be disconnected for that test. I suspect Q1 is under-biased with respect to Q2. Does the output look like this without those 2 diodes in the LTP even if it does produce DC? If the AC looks good, that may be where the problem is. If R5 is 120R then 5mA should flow evenly through Q1 & Q2. Ignoring the base current of Q5, to have 0.6V across R3 with 2.5mA is .6V/.0025A=240R. If the gain of MJE350 is 100 at 15mA, then current in R3 is 2.5mA less 150uA, or 2.35mA so 0.6V/.00235A=255R. I guess 260R would be closest real value. I can't read what the value for R3 is in the drawing.

Also, it sounds like the outputs are underbiased as well. The gates of the outputs should need about 6-7V between them for conduction.

R3 is 12K.

Had a look at the output of the VAS and it looks very good.
So the distortion is coming after the MOSFETS. I am not sure why feedback doesnt correct the distorted signal.

I currrently have 20mA from a constant current source going through the VAS stage.

I upped the bias to 4.5 volts and it looks slightly different but not a lot.

I will probably have to investigate a proper bias cct.

[unclejed613]

you should have more bias on the FET gates, and you should have a 10uf or more cap across the bias stack. it looks like your output wave might actually be capacitive coupling of the drive signal through the gate capacitance, whuch would account for it collapsing with a load.

also you should get rid of D2. it doesn't seem to do anything but decrease your rail voltage by 0.7V.

i think your problem with the + half running warmer than the - side has a lot to do with the outputs being underbiased. and once you have proper bias, you might find that D2 and D5 aren't needed. without the bias you have a "dead zone" that the input stage must deal with by "finding" a stable operating point outside of the "dead zone".