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Old 4th May 2008, 11:12 AM   #1
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Default best voltage follower, discrete opamp and whatnot

I've been trying to come up with the best circuit that will buffer the input from a source (CD player, for example) that interfaces to my integrated amp design. The search has led me in many directions and has revealed several solutions. I'm interested in showing them here and opening up for some discussion or debate on the merrits or preferences or even subjective experiences of others who may have already used such designs.

My original goal:
1) Create a high input impedance voltage follower to buffer from external source to my internal design.
2) Offset output voltage should be zero, preferably with no trim-pot required.
3) Output drive capability is minimal, but should be able to drive into, say, 1K or higher.
4) THD as low as possible (0.001% or lower in simulation).
5) Low noise (I'm not sure of how to best spec this one)
6) Should have slew rate quick enough to handle 1khz square wave, +/-1V, with edges of 10ns or more, without slew-rate limiting.
7) Being a minimalist, less parts is preferable to more parts (less stuff to break, less stuff to introduce distortion and noise).

I'm not sure how to evaluate the potential sound quality of any of the designs based solely on simulation results. Maybe someone can help there.

A quick list of possible design solutions:

1) Simple buffer with monolithic opamp, such as NE5534. Simple enough and simulates very nicely meeting most of my design criteria. I just wondered if going discrete is any better.

2) Discrete voltage follower. Probably using FET inputs to meet high-z requirement.

3) Discrete opamp.

I'll post this stuff separately, with PDF's and LTspice sources.


gene
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Old 4th May 2008, 11:17 AM   #2
gareth is offline gareth  Wales
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Hi,
Are you looking for zero phase shift at the outputs?
Thanks
Gareth
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Old 4th May 2008, 11:24 AM   #3
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First up is the discrete voltage follower using FET's. There's 2 circuits in this diagram, I was too lazy to cut out the left one so please concentrate on the right hand circuit.

This is very similar to the current feedback pair as described by Doug Self, except it uses the FET for input. In this configuration, the 1KHz THD is 0.000249% (run the sim, open up spice error log for details). Not bad. That's into a 1K load.

Problem is the output offset voltage is 1.5V, at least with these FET's. The self biased design will change bias current and output will vary by device, and I assume by temperature.

I like this design for its simplicity. It is possible to modify the drive capability by replacing the self-biasing current source with something more deterministic.

I don't like it because the offset voltage is sucky. By chaning the gate voltage, using trim-pot, it is possible to trim the output to zero but that's something I was trying to avoid.

Other stuff to consider here, what about PSRR?

As I recall, I messed around with various versions of this and it is possible to get the output to zero volts offset in a somewhat different configuration. Siliconix has a nice app note on this. Yes, it biases to near zero, but does not have the current drive capability AND very poor linearity.
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File Type: pdf fet_input_stage.pdf (35.8 KB, 415 views)
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Old 4th May 2008, 11:27 AM   #4
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here's the fet_input_stage ltspice file...I believe all the models needed are built-in or included in the schematic.
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File Type: zip fet_input_stage.zip (2.2 KB, 96 views)
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Old 4th May 2008, 11:41 AM   #5
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Here's another circuit, using FET's for the input and BJT for current drive on output, in a push-pull arrangement. Looking at the circuit, you will see there's a voltage source between the 2 input FET's. I haven't yet figured a good implimentation for that.

One really cool thing about this circuit is how linear it is, and how low the noise floor is. Try it out. The noise floor sits at -240dB (ltspice-ism, and I assume that means -240dBv). Also, check the error log to see THD is 0.00000%. LTspice can't even measure it, although you can see the harmonics in the FFT display.

Problem with this circuit is the output offset is too high, 2V or so, and I need to figure out how to design that input section correctly.

Here's the schematic...
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File Type: pdf fe_tests.pdf (28.3 KB, 207 views)
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Old 4th May 2008, 11:42 AM   #6
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and the simulation file. . .
Attached Files
File Type: zip fe_tests.zip (1.0 KB, 26 views)
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Old 4th May 2008, 11:52 AM   #7
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Last, for now, is the discrete op-amp. I found this really interesting. It has merrit on a lot of points, but has a whole lot more parts that those voltage followers in the last couple of posts.

This thing has output voltage offset in microvolt range. THD at 1khz is 0.000071%. It'll drive a lower impedance than I need (although drive capability is circuit adjustable). I think it is temperature stable. The noise floor is around -140dB.

I've tried to test PSRR on it, and it too looks good: 0.1V 1khz on +rail had around 100uV output ripple. That's something like 60dB - while not as good as commercial stuff, isn't too bad if I can keep the power planes quiet or use good power rail filtering.

On the down side, it has a whole bunch of parts. I don't know how much noise this thing will generate. And I don't know how it'll sound.

Here's the schematic. . .
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File Type: pdf myopamp.pdf (31.6 KB, 310 views)
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Old 4th May 2008, 11:52 AM   #8
Mooly is offline Mooly  United Kingdom
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Simulation is one thing, real world another You can do much much better than a 5534. To be honest you should not need to buffer a C.D. output, it's all been done in the player, unless it's an unusual one (valve output stage perhaps). Slew rate, have you ever seen a 1khz squarewave reproduced by a C.D. player. The 22.05 khz maximum upper frequency limit means the rise time is slow ( My maths is useless, I would have to sit down and work out the actual rise time). A 6 khz squarewave is actually triangular.
Regards Karl
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Old 4th May 2008, 11:53 AM   #9
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and the simulation file for the opamp. . .
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File Type: zip myopamp.zip (1.5 KB, 45 views)
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Old 4th May 2008, 11:55 AM   #10
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Quote:
Originally posted by gareth
Hi,
Are you looking for zero phase shift at the outputs?
Thanks
Gareth

For the input buffer, yes. Or at least something close to zero.
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