first full-discrete power amp design

[sparcnut]

I've been reading posts here for quite some time, and have made many audio circuits in the quest for perfect sound. I am a computer engineering senior (about to graduate) but have a hobby interest in audio. I have taken some electronics courses, but not as many as the EE majors here do.

Anyway, this is a full discrete power opamp design I'd like to hear comments on. I know people will laugh at my choice of ridiculous output devices, but this circuit was designed around parts I had on hand or could easily get. The MOSFETs are the biggest (current-wise) HEXFETs that IRF makes in TO-220, but have gate capacitance on the order of 5nF. The intended use, as drawn, is for *very* low distortion drive into potentially low-Z loads (<=4 ohms), although my ATH-A700s are 64 ohms. Since it uses a power MOSFET output stage with a bipolar predrive stage, it has very limited output swing (about +/-5v on 12v rails before onset of massive distortion), but this does not matter for my purposes as my normal levels are 100mVrms - 300mVrms. It does not have a spectacular slew rate either, but it is quite sufficient (I haven't measured it). The measured distortion performance at 100mVrms anywhere in the audio band rivals or bests that of an AP System Two 2722 (of course, that statement is a bit cheap as the AP is limited by the distortion performance of its ADC/DAC).

OLG is about 87dB but OLBW is something like 8-10KHz due to the 2-pole compensation. GBP is ~2MHz. It is unity gain stable with the values shown; the compensation is pretty light so it does not have a lot of phase margin. I see phase margin beyond that required for stability an indication of wasted OLG, so I try to minimize it. Bias current is set via the VBE multiplier to 20-100mA/ch. The 1K pot in the diff pair serves as heavy degeneration and DC offset adjustment. I have not had issues with thermal stability in this circuit; the bias multiplier does not thermally track the output devices. Component matching is not required but will certainly yield small performance improvements. The source degen resistors on the output are 1x0.25ohm but Multisim does not have such a low value so 4x1ohm are used for simulation.

I built a "big" variant of this circuit with a 2-transistor current mirror instead of the 4-transistor version shown here, without the cascode VAS and diode, and doubled up on output devices for roughly 15W/ch RMS into 8 ohms on +/-23v rails.

Distortion products on the "small" version are well below -120dbV at 100mVrms output with a 50ohm load (G=-1); on the "big" version at 8Vrms (G=-8) into 5 ohms they peak out around -80dbV. Distortion performance improves substantially with inverting configurations over non-inverting (about a 20dB difference), mostly because the current source on the input pair just isn't that perfect.

Both versions sound nothing short of spectacular, but I am always open to suggestions to improve the circuit. The cascode VAS may look somewhat useless at first glance (because there is a large Miller cap across it), but it increases OLG ~12dB and seems to make compensation easier. It also makes the + and - slew rates match much better by limiting the positive drive current to roughly Idss of the P-JFETS.


The schematic is available here (to get around the forum's 1000x1000 pixel limit): http://www.ele.uri.edu/~simoneau/amp.png

[Craig405]

That is the strangest amplifier circuit ive ever seen! i cant really see a point for some of the jfets (U6,U5), please explain a little more for me.
Im not knowledgable enough to design a decent hifi amp yet, id be intrigued as to how you went about desining/deciding on that implementation!

Interesting to see other comments

edit, and why is swing limited using bipolar driver? and congrats on getting it working and sounding nice btw.

[teemuk]

I believe the schematic has some errors: I suppose the output should be complementary (schematic depicts only P-channel MOSFETs), the feedback network values indicate unity gain?

[sparcnut]

craig405 - q5 and q6 (the P-JFETs in the 2nd stage) are used common gate as a cascode. As I said, they increase the gain of the stage by 12dB in simulation and they limit the peak current that the stage can source (making slewing more symmetric - of dubious benefit really). There are two in parallel because that particular JFET typically doesn't have a high enough Idss to pull against the N-JFET current sink (which may sink anywhere from 3-10mA because of device variations).

The reason for the magic 1n914 diode is because without it, the diff pair can't quite swing enough to cleanly turn off the VAS transistor (because of the current mirror). With it, the voltages present on the mirror's input and output should be almost identical, leading to a better-matched operating point for the input pair. In terms of component matching it would be better to have a diode-connected 2n3906 there but that's really splitting hairs.

As to the reason for limited swing: the output stage MOSFETs, which are used in the usual common-drain source follower mode, have a Vth of 4-5v. They need to be driven more than Vth to pass any current as well, but even ignoring that: the bipolar predrive stage has Vbe=0.7v, and the diode+cascode typically needs ~2v across it to really work (as does the current sink). 12-(4+0.7+2) = 5.3v pk-pk swing. In reality the JFETs can operate at lower voltages, but linearity is not as good if they swing that far.

As to the "strange" topology: overall it still follows the same topology many VFB opamps follow (diff pair - single-ended VAS - class-AB emitter/source follower). It's the way in which each stage is implemented which makes it a bit unique.

teemuk - The top MOSFET (U1 - IRF1404) is indeed N-channel. I had to import IRF's spice models for those devices, and I picked the wrong symbol for the schematic display. That's also the reason those devices and some others are marked U(n) not Q(n) as they should be. The feedback network is set up for unity gain just for testing in simulation; there's nothing special about it.

[peranders]

Since you have mosfets you must have -6 to -10 mV/deg C but the BJT Q17 has only -2 mV/deg C. Why don't you change this to a BS170 or some other small signal mosfet?

[sparcnut]

peranders - That's an interesting idea, I've never heard of a Vgs multiplier It's simple enough that I may just try it tonight. Both versions were built on pad-per-hole prototype board (my favorite method) so they're easy to change while still being "permanently" soldered together.

[gain]

hi sparknut. congrats on getting your amp working! and for trying something new. i'm a CS major too who wishes he could take more EE courses.

i'm certainly no expert in audio design, but i will say that i do believe this design could be greatly simplified. i have seen (and heard) many amplifiers that were much simpler than this produce a lot more power. for the tiny levels of output you desire, i would think you could do it just fine with 2 transistors for the LTP, one for the VA stage and 2 "power" transistors for the outputs for a total of 5 active devices. perhaps as many as 7 if you went with darlingtons for the OPS. as it stands now you've got 8 transistors just for the LTP!

again, congratulations on getting this baby to work!

[sparcnut]

gain - I know that the circuit uses a lot of transistors, but I think using more 10-cent parts to drop the closed-loop distortion by 30dB or more is well worth it. TO-92s are cheap and small. The limited output power is not an issue for me.

Also, if you were to simplify the input stage, you would find that the PSRR of the circuit would be pretty low. IIRC this circuit sim'ed at around 80dB PSRR (both + and -), but it may have changed a little after later modifications.

Here are some distortion simulations: 100mVrms and 1Vrms, 1KHz, unity gain (inverting). http://www.ele.uri.edu/~simoneau/amp_dist_.1vrms.png, http://www.ele.uri.edu/~simoneau/amp_dist_1vrms.png

Also, here is a real AP measurement of the "big" version driving 12.8Wrms into 5 ohms. This version has less OLG and components than the other one (see original text where I list the changes), to improve stability, but still performs pretty well. This is with input=1Vrms, gain=-8. http://www.ele.uri.edu/~simoneau/amp...virtground.PNG

The colors are not great but the data is there in the yellow trace. The cyan trace is the AP's own output. This was with the AP looking at the inverting input of the circuit, to effectively "notch" the high-level fundamental frequency out without actually using a notch filter. What is important is the level of each harmonic relative to the carrier, which is at +18dbV - the highest harmonic is the 3rd at about -80dbV. Remember that this is near full output power; lower output levels improve linearity.

[GK]

Hi

The two-pole compensation will have better power supply rejection if the resistor is connected to the same supply rail as the VAS emitter instead of ground.
In this case, to the positive rail.

Another thing you might want to try is Transitional Miller compensation (TMC). To implement this, connect the ground end of R15 to the amplifiers output instead. You might have to play with the component values a bit for best results (a THD reduction at 20kHz of 5 times is typical).

100pF for C5, 560pF for C11 and 1k for R15 would be a good starting point


Cheers,
Glen

[thanh]

Hi Sparcnut!
So haven't you built this schematic?

Can you post result of simulation with 20Khz?
I often simulate schematics. I think it is easy to have a low distiortion at low frequency than high frequency.
Thanks!