first full-discrete power amp design

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I've been reading posts here for quite some time, and have made many audio circuits in the quest for perfect sound. I am a computer engineering senior (about to graduate) but have a hobby interest in audio. I have taken some electronics courses, but not as many as the EE majors here do.

Anyway, this is a full discrete power opamp design I'd like to hear comments on. I know people will laugh at my choice of ridiculous output devices, but this circuit was designed around parts I had on hand or could easily get. The MOSFETs are the biggest (current-wise) HEXFETs that IRF makes in TO-220, but have gate capacitance on the order of 5nF. The intended use, as drawn, is for *very* low distortion drive into potentially low-Z loads (<=4 ohms), although my ATH-A700s are 64 ohms. Since it uses a power MOSFET output stage with a bipolar predrive stage, it has very limited output swing (about +/-5v on 12v rails before onset of massive distortion), but this does not matter for my purposes as my normal levels are 100mVrms - 300mVrms. It does not have a spectacular slew rate either, but it is quite sufficient (I haven't measured it). The measured distortion performance at 100mVrms anywhere in the audio band rivals or bests that of an AP System Two 2722 :D (of course, that statement is a bit cheap as the AP is limited by the distortion performance of its ADC/DAC).

OLG is about 87dB but OLBW is something like 8-10KHz due to the 2-pole compensation. GBP is ~2MHz. It is unity gain stable with the values shown; the compensation is pretty light so it does not have a lot of phase margin. I see phase margin beyond that required for stability an indication of wasted OLG, so I try to minimize it. Bias current is set via the VBE multiplier to 20-100mA/ch. The 1K pot in the diff pair serves as heavy degeneration and DC offset adjustment. I have not had issues with thermal stability in this circuit; the bias multiplier does not thermally track the output devices. Component matching is not required but will certainly yield small performance improvements. The source degen resistors on the output are 1x0.25ohm but Multisim does not have such a low value so 4x1ohm are used for simulation.

I built a "big" variant of this circuit with a 2-transistor current mirror instead of the 4-transistor version shown here, without the cascode VAS and diode, and doubled up on output devices for roughly 15W/ch RMS into 8 ohms on +/-23v rails.

Distortion products on the "small" version are well below -120dbV at 100mVrms output with a 50ohm load (G=-1); on the "big" version at 8Vrms (G=-8) into 5 ohms they peak out around -80dbV. Distortion performance improves substantially with inverting configurations over non-inverting (about a 20dB difference), mostly because the current source on the input pair just isn't that perfect.

Both versions sound nothing short of spectacular, but I am always open to suggestions to improve the circuit. The cascode VAS may look somewhat useless at first glance (because there is a large Miller cap across it), but it increases OLG ~12dB and seems to make compensation easier. It also makes the + and - slew rates match much better by limiting the positive drive current to roughly Idss of the P-JFETS.


The schematic is available here (to get around the forum's 1000x1000 pixel limit): http://www.ele.uri.edu/~simoneau/amp.png
 
That is the strangest amplifier circuit ive ever seen! i cant really see a point for some of the jfets (U6,U5), please explain a little more for me.
Im not knowledgable enough to design a decent hifi amp yet, id be intrigued as to how you went about desining/deciding on that implementation! :smash:

Interesting to see other comments :)

edit, and why is swing limited using bipolar driver? and congrats on getting it working and sounding nice btw.
 
craig405 - q5 and q6 (the P-JFETs in the 2nd stage) are used common gate as a cascode. As I said, they increase the gain of the stage by 12dB in simulation and they limit the peak current that the stage can source (making slewing more symmetric - of dubious benefit really). There are two in parallel because that particular JFET typically doesn't have a high enough Idss to pull against the N-JFET current sink (which may sink anywhere from 3-10mA because of device variations).

The reason for the magic 1n914 diode is because without it, the diff pair can't quite swing enough to cleanly turn off the VAS transistor (because of the current mirror). With it, the voltages present on the mirror's input and output should be almost identical, leading to a better-matched operating point for the input pair. In terms of component matching it would be better to have a diode-connected 2n3906 there but that's really splitting hairs.

As to the reason for limited swing: the output stage MOSFETs, which are used in the usual common-drain source follower mode, have a Vth of 4-5v. They need to be driven more than Vth to pass any current as well, but even ignoring that: the bipolar predrive stage has Vbe=0.7v, and the diode+cascode typically needs ~2v across it to really work (as does the current sink). 12-(4+0.7+2) = 5.3v pk-pk swing. In reality the JFETs can operate at lower voltages, but linearity is not as good if they swing that far.

As to the "strange" topology: overall it still follows the same topology many VFB opamps follow (diff pair - single-ended VAS - class-AB emitter/source follower). It's the way in which each stage is implemented which makes it a bit unique.

teemuk - The top MOSFET (U1 - IRF1404) is indeed N-channel. I had to import IRF's spice models for those devices, and I picked the wrong symbol for the schematic display. That's also the reason those devices and some others are marked U(n) not Q(n) as they should be. The feedback network is set up for unity gain just for testing in simulation; there's nothing special about it.
 
peranders - That's an interesting idea, I've never heard of a Vgs multiplier :D It's simple enough that I may just try it tonight. Both versions were built on pad-per-hole prototype board (my favorite method) so they're easy to change while still being "permanently" soldered together.
 
hi sparknut. congrats on getting your amp working! and for trying something new. i'm a CS major too who wishes he could take more EE courses.

i'm certainly no expert in audio design, but i will say that i do believe this design could be greatly simplified. i have seen (and heard) many amplifiers that were much simpler than this produce a lot more power. for the tiny levels of output you desire, i would think you could do it just fine with 2 transistors for the LTP, one for the VA stage and 2 "power" transistors for the outputs for a total of 5 active devices. perhaps as many as 7 if you went with darlingtons for the OPS. as it stands now you've got 8 transistors just for the LTP!

again, congratulations on getting this baby to work!
 
gain - I know that the circuit uses a lot of transistors, but I think using more 10-cent parts to drop the closed-loop distortion by 30dB or more is well worth it. TO-92s are cheap and small. The limited output power is not an issue for me.

Also, if you were to simplify the input stage, you would find that the PSRR of the circuit would be pretty low. IIRC this circuit sim'ed at around 80dB PSRR (both + and -), but it may have changed a little after later modifications.

Here are some distortion simulations: 100mVrms and 1Vrms, 1KHz, unity gain (inverting). http://www.ele.uri.edu/~simoneau/amp_dist_.1vrms.png, http://www.ele.uri.edu/~simoneau/amp_dist_1vrms.png

Also, here is a real AP measurement of the "big" version driving 12.8Wrms into 5 ohms. This version has less OLG and components than the other one (see original text where I list the changes), to improve stability, but still performs pretty well. This is with input=1Vrms, gain=-8. http://www.ele.uri.edu/~simoneau/amp_stuff/poweramp-1vrmsX8-5ohms-input_is_virtground.PNG

The colors are not great but the data is there in the yellow trace. The cyan trace is the AP's own output. This was with the AP looking at the inverting input of the circuit, to effectively "notch" the high-level fundamental frequency out without actually using a notch filter. What is important is the level of each harmonic relative to the carrier, which is at +18dbV - the highest harmonic is the 3rd at about -80dbV. Remember that this is near full output power; lower output levels improve linearity.
 

GK

Disabled Account
Joined 2006
Hi

The two-pole compensation will have better power supply rejection if the resistor is connected to the same supply rail as the VAS emitter instead of ground.
In this case, to the positive rail.

Another thing you might want to try is Transitional Miller compensation (TMC). To implement this, connect the ground end of R15 to the amplifiers output instead. You might have to play with the component values a bit for best results (a THD reduction at 20kHz of 5 times is typical).

100pF for C5, 560pF for C11 and 1k for R15 would be a good starting point ;)


Cheers,
Glen
 
G.Kleinschmidt - At first glance this looks interesting... here are some OLG simulations, with both 2-pole and TMC (using your values). I was not able to figure out how to sustain a higher initial breakpoint the same way the 2-pole version does. I need to have UGBW a hair under 2MHz for stability. Distortion performance is slightly worse with TMC than without; it needs more OLG to improve I think.

http://www.ele.uri.edu/~simoneau/amp_olg_2pole.png
http://www.ele.uri.edu/~simoneau/amp_olg_tmc.png
http://www.ele.uri.edu/~simoneau/amp_tmc_thd20.png

The peaks in the THD plots at 2Hz are due to the DC-feedback network needed to measure OLG with correct DC bias (simulated as an LC-filter with L=9.1H, C=10F). They can be ignored.

thanh - Yes, I have built this circuit - 2 channels exactly as shown in the schematic, and 2 more modified for less gain/more power.

THD20 simulations at G=-1 with Vout=100mVrms and 1Vrms:
http://www.ele.uri.edu/~simoneau/amp_thd20_.1vrms.png
http://www.ele.uri.edu/~simoneau/amp_thd20_1vrms.png
 
I can't guess where low distortion come from. From current mirror?

Sparcnut! Are you using converting configuration in your Real amp?

Audio amp rarely use this configuration because of offset voltage.

I haved view some book but I don't still know how to compensate a amp. The books often show OLG of stages and ... while I don't know how my amp is.
Ossilation is also important. I often do in such way to have low distiontion but my amp also become unstable. When amp is ossilate, it causes activating of protection circuit. And then, protection of the circuit will break sound. It is terrible.

Low noise is a important thing. Your schematic is simple and clearly. Is there any modification in your real amp?
 
For low distortion there are two parameters that matter: open-loop distortion, and the amount of negative feedback applied when going closed-loop. If the closed-loop gain is unity, then the amount of NFB applied is simply the same as the open-loop gain.

The output stage is a source of substantial (but not all) distortion. It must therefore be enclosed by heavy NFB. This is my reason for using a high-gain opamp topology in the first place. This design has >80dB OLG, and the open-loop bandwidth is much higher than normal opamps.

This opamp ends up having at least 10dB more OLG at 20KHz than nearly every other VFB opamp out there (CFB opamps are very different and much, much faster). That means there is potentially a >10dB HF distortion advantage in this design.

My output stage is very linear at low levels. The MOSFETs are set so that there is a minumum current flowing through both of them all the time. Even if the output is swinging near a rail, the opposite FET still carries the bias current. This current is also the idle current, and it prevents crossover distortion. The only significant nonlinearities should be large-signal distortion because the MOSFETs are square-law devices.

The other thing about this design is the input stage. I use those 8 transistors for good reason: first of all, a good current source is required for good PSRR. The 4-transistor current mirror greatly increases the gain of the first stage, but this gain cannot be used for global NFB without massive compensation (and the resulting loss of gain at high frequencies). Instead, very heavy degeneration is applied in the form of the 1K pot, which also serves as an offset adjustment. This reduces the gain of the input stage to something much more manageable. That extra gain is not wasted, though: it is local feedback, so it linearizes the input stage. Since the compensation is not involved here, the linearization continues to be useful far beyond the open-loop bandwidth of the rest of the amplifier. The current mirror also has the side effect of cancelling most of the even harmonic distortion in the input stage.

Finally, on the topic of oscillation. Making an opamp like this not oscillate is actually pretty simple. First off, the reason for oscillation: the circuit will oscillate at the frequency which has 180 degrees of open-loop phase shift, if the gain at that frequency is greater than unity (for unity gain stability; if that is not required then subtract OLG and CLG and use that value). This is because negative feedback has become positive feedback at that frequency. To keep it from happening, either the gain needs to be reduced, or the phase shift needs to be reduced. The phase shift is dependent on the speed of the devices (input and output, but outputs tend to be the slowest); it is somewhat fixed once you have decided on a topology.

This design's predrive stage (the 2N3904/2N3906 complementary buffer) provides a high AC drive current for the MOSFET gates to overcome the gate capacitance without loading the VAS, which would cause distortion. Biasing that stage is simple; since it sees a small capacitive load, a parallel R-C with a relatively large capacitance (the 100nF) will provide charge which can be dumped into the MOSFET gates on demand. Since these are MOSFETs, no DC drive current is required. The R value sets the idle current in the predriver, since the idle voltage is a bit more than 2*Vt of the output FETs. A couple mA here is plenty.

Now, the two-pole compensation: look at my OLG plot. Two-pole compensation enables me to keep high OLG through the audio band as long as possible, roll off the OLG at the edge of the audio band fast, then return to a first-order rolloff (and 90 degree phase shift) at around 1.8MHz. The phase margin in simulation is around 60 degrees, so the circuit seems pretty stable. The real circuit has closer to 30 degrees of phase margin with the same components - I blame parasitics/board layout.

As for inverting power amp configurations: The small (<<100mV) offset voltage after nulling is not a big problem for speakers, but it might be for headphones. There is a huge (>20dB) distortion advantage in inverting configurations, because the input stage will not carry high signal voltages. If offset voltages are a problem, I recommend a simple opamp DC servo fed into the + input of the amplifier, with a passive 1st-order LPF on the opamp output. I use such a configuration with this circuit for headphones. The opamp will not carry signal, so it does not need to be anything fancy. The passive LPF can have a relatively high breakpoint; mine has f3 = ~159Hz. The DC servo should have f3 very low - 1 to 5 Hz. The point of the passive LPF is to low-pass away high frequencies which may appear on the opamp's output due to low PSRR. At HF the DC servo should not affect the rest of the amplifier, since the passive LPF will short the + input to signal ground. The whole scheme seems to work perfectly in practice with a simple TL082.


Here are some pictures of both the "small" and "big" versions (plus the unfinished power supply for the "big" version). They may not look too beautiful, but they sure sound that way.
The "small" version is on the board mounted to the lid of the plastic case - it has 2 dual-TO220 heatsinks on it. The other board that goes in that box is a 3x2 input volume control/mixer (using digital pots and a dsPIC) + 2x bass shelf + crossfeed. A PCM2705 USB sound chip is on the board but not fully hooked up, I need to remember to order some USB connectors some time.
The "big" version is intended to mount inside an old 1U rack enclosure (with the heatsink sticking out the back), so looks a bit naked in the pictures. The 4xRCA and 1/8" jacks on it are supposed to be temporary ;)
http://www.ele.uri.edu/~simoneau/amp_pictures

BTW: if you're wondering what the green LEDs hanging off the input jacks are, they're for input overvoltage protection. The digital pots run off +/-2.5v and the green LEDs turn on at 1.8 ~ 2.1v.
 

GK

Disabled Account
Joined 2006
sparcnut said:
G.Kleinschmidt - At first glance this looks interesting... here are some OLG simulations, with both 2-pole and TMC (using your values). I was not able to figure out how to sustain a higher initial breakpoint the same way the 2-pole version does. I need to have UGBW a hair under 2MHz for stability. Distortion performance is slightly worse with TMC than without; it needs more OLG to improve I think.



Hmmm....... that's strange.

In a dominant pole (miller) compensated amplifier, OL gain just rises 6dB per decending octave from the unity gain crossover frequency until it reaches a plateau at some low frequency.
Your amp has plenty of OL gain throughout the audio band. You can make it higher, but you will only be increasing it at low frequencies. I'm at a loss ATM as to why the TMC mod didn't work.
I might sim the design myself to satisfy my own curiosity if I have the time later.

Cheers,
Glen
 
Thanks for your post. :)
How did you measure OLG?:)

About 1K pot, there are a lot of documents which also say that it linearizes the input stage but truth is often otherwise from simulation.

If I don't use current mirror at input stage, using degenerated resistor often will increase distortion. For me, they often increase noise because they will cause decreasing of CMRR.

I think that your amp uses 1K pot but still have got low distortion because current mirror has got a big gain. Sparcnut! If we don't use degeneration resistors, which method will we use to stabilize the amp?
:)

My output stage is very linear at low levels. The MOSFETs are set so that there is a minumum current flowing through both of them all the time. Even if the output is swinging near a rail, the opposite FET still carries the bias current. This current is also the idle current, and it prevents crossover distortion.
So is your output stage operate in class A? I think that there are about some ampere flow in output stage at lease if the stage is a class A stage.

About your 2-pole compensation, R15 is often connected to supply rail. Why is yours wired to ground?

Thanks!:)
 
thanh - To measure OLG, I simulated a non-inverting configuration with a feedback network which rejects AC but establishes a correct DC operating point. I used an inductor from the output to - input, and a capacitor from there to ground. The values I used are 9.1H and 10F (biggest ones present in the simulator). This also creates a resonant circuit at around 2Hz, but this is unimportant. Then a spice small-signal AC analysis can be used to find the OLG.

An alternative method, which can be used with a real circuit, is to set the amplifier up with G=-1. Apply signal and watch the voltage at the (-) input. At that input, there should be the fundamental plus distortion products - but the amplitude of the fundamental will be reduced by the OLG. You should still be able to see it on a scope if the input level is high enough.

About the 1K pot - I think it does degrade the noise performance of the circuit substantially, but the noise floor is still low enough for my 102db/mW 64ohm headphones. The real circuit has a white noise floor of -129dbV in a 1Hz band, plus some 1/f noise. These numbers are straight off the AP measurements. Not spectacular, but comparable to many soundcards.

Usually, adding input degeneration isn't such a good idea in a multistage GNFB amplifier because you are trading GNFB for local feedback, and thus losing feedback (and increasing distortion) in the other stages. However, this circuit has so much OLG without it that there is no way it would approach stability, so I just applied local feedback until I could make the circuit stable with a reasonably sized compensation cap (just 82pF if you use Miller compensation; the simulator thinks 33pF is enough but my scope says otherwise). You could leave the gain high and use a huge capacitor - 1000pF and up maybe - but I think that kind of load on the VAS may degrade linearity substantially. I have no simulations to back that statement up so take it with several pounds of salt. You would end up with high gain only near DC anyway; I think that having high gain out in the 5KHz-20KHz range is very important and should be one of your design goals.
This doesn't necessarily mean that you shouldn't still have an extremely high DC gain (because more gain, all other things equal, is better); it means that you shouldn't sacrifice linearity to do so because not all other things would be equal :D

I'm not sure how I would go about stabilizing it if I were to remove the input degeneration. I think the compensation loop would need to extend back to the input stage.

About the output stage... I'm not sure exactly what class to call it. Going by the descriptions of the classes, I would call it class A because both MOSFETs always carry signal. Going by what others call similar output stages, it might be class AB or B; without the gain curve I'm not completely sure which it would fall under (probably AB though).

I wired R15 to ground expecting better HF PSRR. The input in an inverting configuration is referenced to ground, and the output is referenced to ground, so I figured that tying a possible HF injection point to ground was a better idea than trying it to the + rail. I might be completely wrong about it though, and any half-decent decoupling job should make this a moot point.

AndrewT - The problem is common-mode distortion in the input stage. The distortion produced by this mechanism increases with increasing signal level. In a non-inverting configuration, the input level is always applied directly to both inputs; at higher gains the input level must be lower if you are not clipping, so I would expect this distortion to be most obvious at low gains. Higher power supply rails reduce CM distortion in simulations and in real life (by something like 3-6dB when going from 12v to 15v).

In an inverting configuration the input is a differential error voltage. Common-mode distortion should be eliminated. There is no common-mode signal, after all - only DC.

To say anything further, some simulations would be needed.
 
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