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Old 21st April 2008, 10:31 PM   #11
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Hi maxpou,

Have you checked OLG each time when switching from one CCS to another? What would happened if you lose the VAS loading resistor and use local feedback to control OLG?
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Old 22nd April 2008, 06:23 PM   #12
maxpou is offline maxpou  Canada
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Quote:
Originally posted by aparatusonitus
Hi maxpou,

Have you checked OLG each time when switching from one CCS to another? What would happened if you lose the VAS loading resistor and use local feedback to control OLG?
Hi aparatusonitus,
no i dont checked the OLG each time and if i lose the VAS loading unfortunatly i have high gain . i tried to decrease OLG with local feedback but it does not work. How do i succeed?
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Old 22nd April 2008, 08:29 PM   #13
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Hi maxpou,

What I would try is to lose VAS loading with 47k resistor and try two 100k resistors each connected from drain of lower J-fet to gate of upper J-fet (referring to positive side of VAS), same thing for negative side.

I wander why you chose to exclude output stage from global negative feedback...if you enclose output stage in feedback loop your THD numbers will definitely go down big time, output DC drift will be better control, output impedance will go down and so fort.
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Old 22nd April 2008, 09:33 PM   #14
maxpou is offline maxpou  Canada
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Quote:
Originally posted by aparatusonitus
Hi maxpou,

What I would try is to lose VAS loading with 47k resistor and try two 100k resistors each connected from drain of lower J-fet to gate of upper J-fet (referring to positive side of VAS), same thing for negative side.

I wander why you chose to exclude output stage from global negative feedback...if you enclose output stage in feedback loop your THD numbers will definitely go down big time, output DC drift will be better control, output impedance will go down and so fort.

Hi Apara,
i put my result if i try to put a local feedback in VAS with 100K and if i include my output stage in my negative feedback. I don't have a problem with my dc drift. Thank You! Maxpou
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File Type: pdf global and local feedback.pdf (85.6 KB, 153 views)
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Old 22nd April 2008, 10:57 PM   #15
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Hi maxpou,

If you are using it as a line amp, I would recommend you to lower your gain, so try to replace 220R resistor in FDB divider for one of 560R. Also, put something like 5~15pF(mica or polystyrene in parallel with 100k local feedback resistor). Next thing I would like you to try, if you can, is to replace 4V7 zeners for LM336-5V and replace 10k current sink resistor for J-fet CCS (use 2SK246 or BF256A/B/C with current program resistor in source)
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Old 25th April 2008, 04:24 AM   #16
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Quote:
Originally posted by aparatusonitus
Hi maxpou,

If you are using it as a line amp, I would recommend you to lower your gain, so try to replace 220R resistor in FDB divider for one of 560R. Also, put something like 5~15pF(mica or polystyrene in parallel with 100k local feedback resistor). Next thing I would like you to try, if you can, is to replace 4V7 zeners for LM336-5V and replace 10k current sink resistor for J-fet CCS (use 2SK246 or BF256A/B/C with current program resistor in source)
Hi apara,
thank you for your advises i think to built on my original schematic and listen, after i will changer a thing at a time and listen yet. Thank you Maxpou
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Old 25th April 2008, 09:29 AM   #17
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Comments about the schematics :

- There are some dots (junction) missing, careful if you use Eagle for layout...
- I tried a similar circuit some years ago (but with JFET input and the rest bipolar) and didn't really like the sound
- Don't forget to plot OL gain and phase to check for stability
- About the last one : if you don't include the output stage in the feedback you will get some DC offset at the output, also it is not clear if the output JFETs work in source follower or current source

Don't forget to report how it sounds, though
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Old 25th April 2008, 03:53 PM   #18
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Quote:
Originally posted by peufeu
Comments about the schematics :

- There are some dots (junction) missing, careful if you use Eagle for layout...
- I tried a similar circuit some years ago (but with JFET input and the rest bipolar) and didn't really like the sound
- Don't forget to plot OL gain and phase to check for stability
- About the last one : if you don't include the output stage in the feedback you will get some DC offset at the output, also it is not clear if the output JFETs work in source follower or current source

Don't forget to report how it sounds, though
Hi Peufeu,

- Sorry for forget junctions, i corrected my errors

- If you don't like the sound, maybe you have other schematic at propose to me or mods.

- How can i check the phase?

- I check my output DC with and without the output stage in feedback and i don't have the problem my DC is stable

- My output jfet work in source follower at Idss bias.

Thank you! Maxpou
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Old 25th April 2008, 04:52 PM   #19
peufeu is offline peufeu  France
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To check for stability you would plot the open loop gain's phase and magnitude.

You can do that with the loop open (you will need to set a precise DC offset in Spice to zero the output and send a small signal at the input).

Then you close the loop, and you can plot it again by dividing the output voltage by the error voltage at the input. This gves you the open loop gain.

But your design is a current-feedback amplifier, so how to apply this is slightly trickier.

A simpler thing to do is to plot V(out) from DC to say, 100 MHz, and look for indications of ringing or bad damping. Try simulating it with a bit of capacitance at the output, too, like the capacitance of the cable you will use.
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Old 25th April 2008, 07:47 PM   #20
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Hi Perfeu,
here the pics for 0.4V p-p at input and 2V p-p output at 10Khz with 3.9K//300pf. Thank you! Maxpou
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File Type: jpg p1020012.jpg (31.4 KB, 654 views)
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