Inexpensive JFET Preamp

[jonusgrumby]

Here's a JFET preamplifier I designed and built many years ago, and still use today. The JFETS are 2N5459 and 2N5462 which are still available and are inexpensive.

The input devices need to be matched to within 0.1 mA on idss. The other devices do not need to matched as closely, but try to keep them within 0.5 mA on idss. I bought 25 of each part and was able to come up with the devices I needed for a stereo preamplifier.

Even with careful matching, I would include C1. There is a little DCoffset present (50 mV or so).

If you need more or less gain alter the value of R15. In my preamp, I replaced R1 with a 25K potentiometer.

THD is less than .01% at 5 V RMS output, and .005% or less at 1 V RMS from 20 Hz to 25 KHz.

IMD measured .005% @ 5K/60Hz.

I've built several of these circuits on vector boards. I never laid out a pc board.

The even order harmonics dominate the distortion spectra. I am very pleased with how it sounds and its' performance overall.

Have fun.

[apassgear]

You didn't mention but that is a JC2 topology design by John Curl.

[jonusgrumby]

I admit there is some similarity, but I developed this myself. I only became of the JC-2 when I ordered back issues of Audio Amateur magazine.

Actually, I came up with this approach when I was reading about the circuit that Erno Borbley described in his 60 Watt MOSFET amplifier. Paralleling the output FET's and running their operating current through the drain resistor of the differential amplifier allowed me to direct couple and not reduce the gain of the 2nd stage too much. It is not exactly the same as the approach Borbley attributed to Lender, but it sparked my idea.

I used this topology in a power amplifier I designed in the late 1980's as well.

Mr. Curl used a bipolar transistor output stage in the JC-2.

[apassgear]

Originally posted by jonusgrumby
I admit there is some similarity, but I developed this myself. I only became of the JC-2 when I ordered back issues of Audio Amateur magazine.

Actually, I came up with this approach when I was reading about the circuit that Erno Borbley described in his 60 Watt MOSFET amplifier. Paralleling the output FET's and running their operating current through the drain resistor of the differential amplifier allowed me to direct couple and not reduce the gain of the 2nd stage too much. It is not exactly the same as the approach Borbley attributed to Lender, but it sparked my idea.

I used this topology in a power amplifier I designed in the late 1980's as well.

Mr. Curl used a bipolar transistor output stage in the JC-2.

Interesting to hear that Tom, its amazing how our mind works and I believe you.

This all JFET circuit looks very nice and sure enough it will work very well, congratulations and thanks for sharing it.

[Jonathan Bright]

Just exactly what some of us are looking for. Thank you. I've thought about the FORSSELL discrete etc and when I've done the sums I find the better quality FETs are too expensive and v.hard to get so this is good. Now, I am not up to speed on the maths of biasing etc but I was wondering is it possible to run a couple (or even 3 or 4) Fets in parallel in the input stages and gain some benefit in noise reduction in the same way that they have achieved with bipolars in the LM394 for instance? I recall them speaking of a "root2" decrease in noise for every doubling of the junctions I think.
If it is possible with Fets please can you put up an appropriately modification to your current offering for the theoretically/mathermatically challenged?
Thanks again, Jonathan.

[h_a]

Jonathan, noise is never decreased.

It is just that noise increases differently compared to the transconductance. As you wrote, by paralleling noise increases geometrically (root of sqared noise voltage densities), but the transconductance increases linearly (doubles).

If you don't need more transconductance, you can just use lower noise parts.

All the best, Hannes

[AndrewT]

Hi,
would this still make a suitable line stage/preamp, by just omitting the paralleling on the output?
Are there any stability issues if the gain is reduced to around +6 to +12db rather than +19db?

[h_a]

I don't know the transconductance of the 2N5462, but if it's too low you get a rather high output impedance (But you know that of course!).

Regarding stability, why not also reducing the load resistors to reduce gain (instead of increasing NFB)?

Have fun, Hannes

[Jonathan Bright]

Hi Hannes, that's just the problem. We either can't get/afford "low noise parts".....which is why I asked whether we could engineer a multiplicity of average parts to synthesise(?) an equivalent........Jonathan

[AndrewT]

Originally posted by jonusgrumby
The input devices need to be matched to within 0.1 mA on idss. The other devices do not need to matched as closely, but try to keep them within 0.5 mA on idss.

which input devices need matching.
The N to N channel and the P to P channel?
or
The non-inverting N to non-inverting P? to minimise input offset current/voltage.
or
all 4 input FETs?