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-   -   SRPP with FETS, what output stage? (http://www.diyaudio.com/forums/solid-state/114418-srpp-fets-what-output-stage.html)

davidallancole 28th December 2007 11:56 PM

SRPP with FETS, what output stage?
 
2 Attachment(s)
Hi everybody,

I got some LSK389C dual jfets today from Linear Systems because they will ship you samples for free. I wanted to throw them into a SRPP type stage because I think its cool looking.

Attached below is the picture of how I set it up. The resistors I used were 150 ohm. I matched the resistors within +-0.2 ohms on my meter. This gave a voltage at the probe point of 9.7 volts, which it should be ~8.1 volts based off a sim (not real world). So with some better matching resistors or a pot instead of a resistor in one place, it would come closer to the ~8.1 volts. I put in a 6.4mV signal and got a 750mV signal out for a total gain of 117. Not to shabby. From the sim these seem to be pretty linear setups right until they clip.

So what kind of solid state output stage could a guy (or girl I guess) use with this that would possibly, but not necessarily have some resemblance to a tube output stage? I found that this can't be dc coupled to the next stage, it must have a capacitor on the output.

Leolabs 29th December 2007 01:02 AM

How about JFET follower loaded with JFET current source???

AndrewT 29th December 2007 02:39 PM

Hi,
the top FET is set up as a CCS to feed the lower FET.
It seems odd to take the output from inside the CCS.
Or is that what srpp is all about?

davidallancole 29th December 2007 07:40 PM

Yep. Thats how the SRPP is set up.

http://www.tubecad.com/may2000/

dshortt9 29th December 2007 08:07 PM

You could try the Aikido with Jfet's. Bet it would be awesome.

http://www.tubecad.com/2005/July/blog0051.htm

davidallancole 30th December 2007 11:57 PM

2 Attachment(s)
Hi guys,

Thanks for the post on the Akido amp dshortt9. I have not read through it yet but took some of the ideas from the schematic and put them to use. I am not overly familiar with FET type transistors, so I used bipolars on the output.

I built it up with a emitter follower loaded with a constant current source. I will probably use a LED to bias the ccs transistor. Right before the onset of clipping from the current side of things, the THD is simming out to 2.81%. The diagram of how I have it set up is shown as well as the harmonic distribution. I think I will give this thing a wirl in building it up. It will take some time though.

What do you guys think?

Thanks for the help all.

davidallancole 31st December 2007 12:01 AM

2 Attachment(s)
Here is the spread

dshortt9 31st December 2007 02:01 AM

3% primarily 2nd is not bad at all. Close to what many SET amps do. No feedback.

davidallancole 31st December 2007 02:59 AM

Thats kind of what I was thinking. The input signal is 300mV to get this level. The voltage gain can be changed by lowering or increasing the resistance of R13 and R14. I find it interesting as well that if the current running through the ouput stage is increased by 1 amp, the THD increases to 4.5% but the harmonic distribution looks even better. Most of the harmonic energy is in the 2nd harmonic and it seems to only extend to the 5th harmonic, then it is almost gone. I shall build this this week hopefully and see how it sounds.

AndrewT 31st December 2007 08:46 AM

Hi,
why did you choose to connect the load (r25) to the negative supply rail?
Why not connect it to the positive supply rail?


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