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Old 30th December 2007, 08:33 AM   #21
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Here's the LTSpice schematic file. It has not been optimized much - just biased the Kulish predriver stage into linearity, biased the conventional CFP driver into linearity with comfortable current to drive the output stage, and bias the output stage to a comfortable quiescent current (in this case around 0.4-0.6 A). Input impedance at the base of the predriver stage simulates to over 1M, so it should easily work with a conventional Lin-Bailey-Self VAS biased to a few mA. Base stoppers are optional, but I just left them in as placeholders - they don't affect the distortion numbers much.
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File Type: txt kulish_ef_ab.txt (5.3 KB, 44 views)
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Old 30th December 2007, 08:53 AM   #22
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Klaus, the capacitor between the emitter and collector in your circuit is counter-intuitive - in fact, anti-thematic. In normal operation, the signals at the collector and emitter are inverted in phase, but the cap attempts to nullify that and make them swing together. I'm not sure that I grok this correctly - I'll simulate it later to try to understand it.
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Old 30th December 2007, 12:43 PM   #23
m2003br is offline m2003br  Brazil
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Hi, Linuxguru,

Very interesting work.
But, your Spice donīt have a better windowing? Hanning, perhaps?
Sure you get a more "normal" look for your FFT plots.

Cheers,

Marcos
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Old 30th December 2007, 06:26 PM   #24
KSTR is offline KSTR  Germany
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Hi,
Quote:
Originally posted by linuxguru
> try on a LTP failed...

In what manner did it fail? Hard to bias, or Spice fails to coverge quickly, or is it worse than a conventional LTP under similar bias conditions?
It was only a quick try, nothing elaborated, just two legs of the posted circuit biased with an ideal CSS to the same operation point as the SE circuit. The THD wasn't any good at all... need to try harder it seems (or made a stupid mistake, maybe).


Quote:
Klaus, the capacitor between the emitter and collector in your circuit is counter-intuitive - in fact, anti-thematic. In normal operation, the signals at the collector and emitter are inverted in phase, but the cap attempts to nullify that and make them swing together. I'm not sure that I grok this correctly - I'll simulate it later to try to understand it.
I found that by lucky chance so to say (not from thorough analysing). Looking at in .AC analysis is interesting, too.

For the fun of it I tried true cascoding (constant Vce for both Q's) which worked out (more workable voltage range, better THD), and again that crazy cap did good for THD20 (which settled at 12ppm, and 2ppm below 2kHz THD). Another funny thing: When I increase drive impedance to a few hunderd ohms or so LF THD rises but THD20 actually goes lower.

A thing I still don't get by intuition is the load characteristic. More load == less gain (that's clear), but way less distortion also (not clear)...

A really interessting matter, this Kulish approach... I look forward to sim/try a little more sophistcated circuits with it, a full grown voltage amplifier stage, to be used without overall feedback...

Your output stage looks fine and quite unusual, too... personally I tend to prefer (at the moment) true class A in bridge mode, with high local feedback autobias scheme, for its superb power supply characteristics.

Regards, Klaus
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Old 31st December 2007, 05:09 PM   #25
DRC is offline DRC  United Kingdom
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FWIW, I did a quick LTSpice sim of two LTP's - one using 2 kulish cells and the other a conventional LTP (as attached). I tried to keep the design parameters the same (or as near as i could ) for both circuits and tuned the kulish implimentation for minimum distortion. The results looked quite good :


conventional LTP
0.019244%

Kulish LTP
0.000296%

about 65 times better ...


PS the design parameters are from an element of a circuit i am currently developing.


/dave
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File Type: png draft4.png (6.0 KB, 939 views)
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Old 31st December 2007, 07:38 PM   #26
DRC is offline DRC  United Kingdom
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And the FFT ...
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Old 1st January 2008, 12:01 AM   #27
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Quote:
Originally posted by DRC
FWIW, I did a quick LTSpice sim of two LTP's - one using 2 kulish cells and the other a conventional LTP (as attached). I tried to keep the design parameters the same (or as near as i could ) for both circuits and tuned the kulish implimentation for minimum distortion. The results looked quite good :


conventional LTP
0.019244%

Kulish LTP
0.000296%

about 65 times better ...


PS the design parameters are from an element of a circuit i am currently developing.


/dave

I think that if you just use a straight CFP dif pair, depending on the
component values, the reduction in distortion compared to the plain
vanilla dif pair will be similar.

cheers

Terry
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Old 1st January 2008, 07:28 AM   #28
DorinD is offline DorinD  Romania
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Agree with Terry.
Also try to use Peufeu like config and the results will be better.
I just did a manual analysis of the Kulish stage and conclude it's like a Darlington config, using same tricks and little more to isolate first transistor but "energetically" or "economically" speaking is not a deal. Take any classical dual transistor stage and see you could obtain at least similar or better performances.

I think Kulish config could be a solution in small signal situation but not in VAS or driver stages. Such a current waste and so many transistors there could have a better use and greater global effect. Just my opinion...
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Old 1st January 2008, 12:13 PM   #29
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The Kulish is far more linear than just about any other combination of two transistors, including the Sziklai - it's easy enough to simulate and verify this. It's also possible to tweak the harmonic response of the Kulish by playing around with the resistor ratios and the load.

Meanwhile, here is a more complete Class-AB amplifier design, loosely derived from Symasym, but with a Kulish predriver stage. It's only an outline for LTSpice simulation - there's room for a lot of circuit elaboration/improvement later.
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File Type: png kulish_ef_full.png (33.3 KB, 585 views)
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Old 1st January 2008, 12:16 PM   #30
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Here's the FFT plot for approx. 10V amplitude at the out node (distortion is mostly H2 and around -95 dB):
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