PGP (Pretty Good Poweramp)

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Your amplifier

Edmond and Ovidiu,

This is quite an amplifier you have built and very impressive performance you have achieved. I have still not fully absorbed your fairly complex circuits, but do have some initial observations and questions.

First, combining HEC with NDFL is quite an interesting approach, and I have not seen it anywhere else.

If I understand correctly, you are achieving 0.0001% THD20 at full power into 4 ohms in a measurement bandwidth of 80 kHz. That is very impressive. I think that the 0.0006% I achieved was into 8 ohms (although that was in a 200 kHz BW).

I see you are using a 2.5 uH output coil. This is a bit of a surprize, based on other discussions on the thread. I think that John Curl agrees that 0.5 uH is essentially inaudible, but not 2.5 uH. What are your thoughts on this? Why were you not able to go down to 0.5 uH?

I'm also a little surprized to see that you have a fairly large 10 ohms across the coil, and this gives a bit of an under-damped square wave into the capacitive load at 20 kHz. I would have expected to see a resistor here of no greater than 2.5 ohms.

I was fairly surprized to see 470 ohm gate stopper resistors on the output transistors. This would seem to limit the bandwidth of the output stage a bit. I've usually been under the impression you can safely go down to 200 ohms or less with these lateral devices.

Am I correct in understanding that you have each of the three output pairs biased at 150 mA, for a total idle bias of 450 mA? If so, this helps a lot in getting the output stage distortion down.

It was unclear to me why you chose to synchronously trim both R20 and R81 in the output EC circuit for minimum distortion, rather than, for example, putting a single resistor trim in the path to the common node of R63 and R65.

I have not yet fully understood your input stage bootstrapping circuit. It looks like their rails are modulated with a unity-gain copy of the amplifier's output voltage, so that part or all of these stages floats with the output signal. Could you elaborate on this a bit. This kind of feedback usually scares me a little bit.

Why did you not choose to use a dc servo for offset control? The use of an electrolytic in the shunt path of the NFB loop seems a bit of a no-no.

I'm confused by the THD measurement made by the Amber 5500, and the first scope photo shown in your distortion measurements section, showing the 0.0001% residual. Was the using just the Amber in a conventional way. I did not think the Amber (or virtually any other THD analyzer, unaided) was capable of getting down to 0.0001% and showing such a well-defined distortion. You stated that the distortion shown includes that of the Amber oscillator, but implied that it is largely that of the amplifier. I'm obviously confused here.

You've achieved some remarkable performance here. I only wonder if you would have been able to obtain it with a bit less complex front end. That is quite a tour de force!

Good job,

Bob
 
Re: Your amplifier

Bob,

Before anything else, let me thank you for the taking the time and looking at our amp. I will try below and answer as much as possible of your questions. I'm sure Edmond will jump in as well.

If I understand correctly, you are achieving 0.0001% THD20 at full power into 4 ohms in a measurement bandwidth of 80 kHz.

This is correct.

I see you are using a 2.5 uH output coil. This is a bit of a surprize, based on other discussions on the thread. I think that John Curl agrees that 0.5 uH is essentially inaudible, but not 2.5 uH. What are your thoughts on this? Why were you not able to go down to 0.5 uH?

The discussion on the audibility of the output coil was one of the most intriguing I've read here. I still fail to understand why a 2.5uH onboard coil could be audible when the cable to the speakers has an inductance of the same order of magnitude. As of less than 2.5uH, the answer is on the web site. Quote: "The output Zobel network is mandatory for the whole amp stability. For the same reasons, the output coil shoud not be under 2uH air core".

I'm also a little surprized to see that you have a fairly large 10 ohms across the coil, and this gives a bit of an under-damped square wave into the capacitive load at 20 kHz. I would have expected to see a resistor here of no greater than 2.5 ohms.

Honestly, we didn't tried anything less than 10ohm. We may try that ASAP and report back.

I was fairly surprized to see 470 ohm gate stopper resistors on the output transistors. This would seem to limit the bandwidth of the output stage a bit. I've usually been under the impression you can safely go down to 200 ohms or less with these lateral devices.

We have tried 220ohm (my original expectation was identical to yours), unfortunately the OPS was not stable in open loop. The output was oscillating at around 5MHz with an amplitude of about 300mV. One of the issues related to lateral MOSFETs is the presence of a relative large capacitance (measured 420pF) between the output node (before the Zobel) and ground. This capacitance is defined by the heat pad between the MOSFET source and the heatsink (connected to ground). An OPS with vertical MOSFETs would not have this capacitance (the case heat plate is connected to the drain rather than to the source as in laterals). Certainly, this capacitance is not helping the stability of the OPS. We are looking into replacing the Berquist SilPads with 0.08" thick aluminum oxide insulators (having only 10% of the current parasitic capacitance). There are some mechanical issues in using those insulators with our PCB, so this is work in progress. As soon as we'll have some data we will report back.

Am I correct in understanding that you have each of the three output pairs biased at 150 mA, for a total idle bias of 450 mA? If so, this helps a lot in getting the output stage distortion down.

You are correct.

It was unclear to me why you chose to synchronously trim both R20 and R81 in the output EC circuit for minimum distortion, rather than, for example, putting a single resistor trim in the path to the common node of R63 and R65.

You are correct, that would be possible. Originally, when this OPS was on the breadboard, we thought that a THD fair minimum could be reached by using fixed resistors (that is, the component dispersion should not account for any significant THD variance). Based on the same expectation, we did not include a THD adjustment trimpot on the PCB. After building four OPS board we found out the hard way that this is not true. Trimming the Hawkwind balance, on each board, was mandatory to achieve the ultimate performance, so the only option without modifying the PCB layout was to adjust the two resistor simultaneously. If the OPS will get another major revision, then probably we'll place an onboard trimpot exactly as you mentioned.

I have not yet fully understood your input stage bootstrapping circuit. It looks like their rails are modulated with a unity-gain copy of the amplifier's output voltage, so that part or all of these stages floats with the output signal. Could you elaborate on this a bit. This kind of feedback usually scares me a little bit.

Well, you are not alone :) It took Edmond quite some time to persuade me this is a good way to go and, as usual, the experiment decided that this is an excellent way to fight the evil Early voltage issues. We would love to hear on any pertinent criticism of this approach. As much as the MPSU looks complicated, it is in fact simpler than cascoding all devices in the IPS!

Why did you not choose to use a dc servo for offset control? The use of an electrolytic in the shunt path of the NFB loop seems a bit of a no-no.

We debated this quite a bit. We concluded that a servo offset control is not coming for free and based on our preliminary measurements, a good quality non-polarised high voltage electrolytic seemed to be good enough. This is indeed another point that could be the subject to a future revision if we could get some good reasons (that could be quantified through some measurements) to switch to a DC servo.

I'm confused by the THD measurement made by the Amber 5500, and the first scope photo shown in your distortion measurements section, showing the 0.0001% residual. Was the using just the Amber in a conventional way. I did not think the Amber (or virtually any other THD analyzer, unaided) was capable of getting down to 0.0001% and showing such a well-defined distortion. You stated that the distortion shown includes that of the Amber oscillator, but implied that it is largely that of the amplifier.

You are entirely correct again. The scope photo you mentioned is showing (lower trace) the amp output with the fundamental removed by the Amber 5500 instrument. By no means is that the image of 0.0001% THD20! It was included only to show that while the second harmonic is mainly due to the Amber 5500 internal oscillator distortions, there is a 3rd harmonic component (the small ridge) that is entirely the amp contribution. Otherwise said, in that photo, the amp 3rd harmonic distortions are hidden somewhere in that small ridge. However, as subsequent photos show, the spectral analysis revealed that the amp itself has the 2nd harmonic distortion dominant, and that the 3rd harmonic is about 10dB lower. Therefore, in the Amber 5500 output photo, the second harmonic component is due to the input signal and a little contribution from the amp, while the third harmonic is purely the amp contribution. If you think it will bring more clarity we could easily include in the Measurements page photos with the Amber 5500 output (with the fundamental removed) and the associated spectra.

If you have any further questions or comments we would be happy to address them.
 
Re: Your amplifier

Bob Cordell said:
Edmond and Ovidiu,

This is quite an amplifier you have built and very impressive performance you have achieved. I have still not fully absorbed your fairly complex circuits, but do have some initial observations and questions.

[snip]

I have not yet fully understood your input stage bootstrapping circuit. It looks like their rails are modulated with a unity-gain copy of the amplifier's output voltage, so that part or all of these stages floats with the output signal. Could you elaborate on this a bit. This kind of feedback usually scares me a little bit.

[snip]

Why did you not choose to use a dc servo for offset control? The use of an electrolytic in the shunt path of the NFB loop seems a bit of a no-no.

[snip]

Good job, Bob

Hi Bob,

First, thank you for your appreciating words.
Although most of the questions has already been answered by Odvidiu, I like to add a few more remarks:
As for bootstrapping the power supply lines of the input stage, probably you mean a unity-gain copy of the amplifier's input voltage. Just a typo I suppose.
Why it "scares you a little bit" ? Because of nobody else has done this before?
Regarding a dc servo, well, you can also do it that way, provided that you are using an ultra low distortion op-amp and an additional power supply etc. Besides, some electrolytic cap's are not that bad. Our approach was also based on the extensive measurement results of Cyril Bateman (Capacitor Sound?, EW, 2002-2003)
As for output coils, wasn't that poisoning discussion closed? Please, stop it, now and forever!

Cheers, Edmond.
 

GK

Disabled Account
Joined 2006
Re: Re: Re: PGP

Edmond Stuart said:
Yes and no. It's true that we could also have set Ft at 2MHz. In that case the THD was even three times lower (~0.3ppm), but we opted for a better stability margin (i.e handling of higher capacitive loads). Therefor we set Ft at 700kHz.

No, it is not an order of magnitude greater. If it was, it was impossible to get THD20=6ppm. I guess that Bobs open loop EC-OPS produces only two times more distortion than our EC-OPS.



G'day Edmond.

Hmmm.......
Bob's design managed adequate stability at 2MHz with only a 0.5uH output inductor.
With regards to output stage open loop THD, perhaps Bob could alaborate a bit further here.
In the last paragraph of page 11 in his amp paper he specifies the THD as "less that 0.1%" - this would be a rather modest statement if it was really only ~0.016%. He also did not trim for the lowest THD - just used 5% resistors in the EC circuit.
6ppm THD-20 was done in the 80's with this non-optimized EC output stage, with 80's components and a front end circuit whose VAS linearity can be improved by an order of magintude with Hawksford cascoding and modern ultra low Cob high fT BJT's.



Edmond Stuart said:
I don't think you can't hit the 1ppm mark without NDFL or whatever trick, unless you are willing to heavily sacrifice the stability.


EC on the output stage for sure, but NDFL? I disagree.


Cheers,
Glen
 
Re: Re: Re: Re: PGP

G.Kleinschmidt said:


Bob's design managed adequate stability at 2MHz with only a 0.5uH output inductor. <snip> He also did not trim for the lowest THD - just used 5% resistors in the EC circuit.<snip>

6ppm THD-20 was done in the 80's with this non-optimized EC output stage, with 80's components and a front end circuit whose VAS linearity can be improved by an order of magintude with Hawksford cascoding and modern ultra low Cob high fT BJT's.


Glen,

1. We found experimentally that trimming the OPS for the ultimate THD20 number comes to the price of stability margin and I have no doubts that a theoretical analysis can easily confirm this fact. After all, the EC can be (ideally) viewed as a NFB loop wrapped around an amp that has the open gain defined/increased by a PFB loop, and the sweet spot is around the equilibrium point of these two antagonic mechanisms. Which equilibrium could or not be unconditionally stable. But these aspects were already beaten to death in other threads. Bob's ability to use only 0.5uH could be most likely because at that time it was not possible to reach the same level of open loop THD20 in the OPS.

2. Although I have built Bob's front end (I think there's a picture on the web site), I do not have enough data to speak about it's performance in detail. All I can say is that although the difference between 6ppm and 1ppm may not seem huge, in fact it is. And that even with our 2007 EC OPS, Bob's front end topology (also built with new devices) would not enable breaking the 1ppm barrier. Otherwise, you are correct in your evaluation on the new technologies/devices impact.
 

GK

Disabled Account
Joined 2006
Re: Re: Re: Re: Re: PGP

syn08 said:



Glen,

1. We found experimentally that trimming the OPS for the ultimate THD20 number comes to the price of stability margin and I have no doubts that a theoretical analysis can easily confirm this fact. After all, the EC can be (ideally) viewed as a NFB loop wrapped around an amp that has the open gain defined/increased by a PFB loop, and the sweet spot is around the equilibrium point of these two antagonic mechanisms. Which equilibrium could or not be unconditionally stable. But these aspects were already beaten to death in other threads. Bob's ability to use only 0.5uH could be most likely because at that time it was not possible to reach the same level of open loop THD20 in the OPS.

2. Although I have built Bob's front end (I think there's a picture on the web site), I do not have enough data to speak about it's performance in detail. All I can say is that although the difference between 6ppm and 1ppm may not seem huge, in fact it is. And that even with our 2007 EC OPS, Bob's front end topology (also built with new devices) would not enable breaking the 1ppm barrier. Otherwise, you are correct in your evaluation on the new technologies/devices impact.



I agree that optimizing the EC circuit for the best THD reduction comes at the cost of phase margin, but I think that your design is limited in this respect a bit (and also in terms of the allowable closed loop bandwidth) by the bandwidth limitation imposed by the large 470 ohm gate stopper resistors used in your OPS.
Have you tried the alternate scheme with a low value gate stopper combined with an RC to ground?.

Cheers,
Glen
 
Re: Re: Re: Re: Re: Re: PGP

G.Kleinschmidt said:

Have you tried the alternate scheme with a low value gate stopper combined with an RC to ground?.
n

Yes. Unfortunately it did not help for lateral MOSFETs. The OPS was still unstable with 220 ohm stoppers. Now it is possible that a gate network that would push Ft at 2MHz may exist, but I'm running short of ideas here. Also the simulation models for lateral MOSFETs are very poor. So poor that our Chief Simulator Edmond was unable to get any significant results on the EC OPS.

I'm not sure if the next project will still use laterals but if so we will invest some time in measuring and extracting some good models for the laterals.
 
Re: Re: Re: Re: PGP

G.Kleinschmidt said:
G'day Edmond.

Hmmm.......
Bob's design managed adequate stability at 2MHz with only a 0.5uH output inductor.
With regards to output stage open loop THD, perhaps Bob could alaborate a bit further here.
In the last paragraph of page 11 in his amp paper he specifies the THD as "less that 0.1%" - this would be a rather modest statement if it was really only ~0.016%. He also did not trim for the lowest THD - just used 5% resistors in the EC circuit.
6ppm THD-20 was done in the 80's with this non-optimized EC output stage, with 80's components and a front end circuit whose VAS linearity can be improved by an order of magintude with Hawksford cascoding and modern ultra low Cob high fT BJT's.


EC on the output stage for sure, but NDFL? I disagree.


Cheers, Glen

Hi Glen,

Regarding 0.1% versus ~0.016%, why you are ignoring my simple math?
Anyhow, let's optimize Bob's amp (I hope you don't mind Bob :)), using modern components in the EC-OPS, using an ideal front-end and trimming the EC balance. Guess what my sim say? THD20 = 2.7ppm. Spicing the same OPS with Bob's front-end reveals a THD20 of 4ppm. So, I think the best you can reach in real life is 3ppm.

>He also did not trim for the lowest THD - just used 5% resistors in the EC circuit.
If you read a little bit further, you'll discover why.
"While use of closer-tolerance resistor would improve the correction at lower frequencies, where it is unnecessary, their use would make a smaller improvement at 20kHz because performance there is beginning to be limited by the speed of the error correction loop."

Why the speed of the EC loop is limited, that is, has been deliberately limited, you can read here:
http://www.diyaudio.com/forums/showthread.php?postid=1323328#post1323328

In case I haven't convinced you, I should say just built an optimized Cordell amp, or at least, spice such an amp.

Cheers, Edmond.
 

GK

Disabled Account
Joined 2006
Re: Re: Re: Re: Re: PGP

Edmond Stuart said:


Hi Glen,

Regarding 0.1% versus ~0.016%, why you are ignoring my simple math?
Anyhow, let's optimize Bob's amp (I hope you don't mind Bob :)), using modern components in the EC-OPS, using an ideal front-end and trimming the EC balance. Guess what my sim say? THD20 = 2.7ppm. Spicing the same OPS with Bob's front-end reveals a THD20 of 4ppm. So, I think the best you can reach in real life is 3ppm.

>He also did not trim for the lowest THD - just used 5% resistors in the EC circuit.
If you read a little bit further, you'll discover why.
"While use of closer-tolerance resistor would improve the correction at lower frequencies, where it is unnecessary, their use would make a smaller improvement at 20kHz because performance there is beginning to be limited by the speed of the error correction loop."

Why the speed of the EC loop is limited, that is, has been deliberately limited, you can read here:
http://www.diyaudio.com/forums/showthread.php?postid=1323328#post1323328

In case I haven't convinced you, I should say just built an optimized Cordell amp, or at least, spice such an amp.

Cheers, Edmond.


I take it that your VMOS models are a lot more reliable that your lateral models then?

I won't build a Cordell amp because I don't like MOSFETs and I like to play with fully symmetrical front ends and I also prefer lots of heat.
But 3ppm is getting pretty close to 1ppm, nu? Crank the bias up for class A and then what? OK, class A is cheating. So how about we build a class AB output stage with lots in parallel of RET’s for a starting open loop THD an order of magnitude better than what those icky MOSFETs give us and then apply EC to that?

BTW, my current fully symmetrical TMC amp design has 20 pairs of MLJ3281/MJL1302 running 6.25A bias (+/-65V rails) with EC for 300W into 4 ohms (ordering the same pair of 1500x220x75mm heatsinks as for my other amp).
Do you think I will need a NDFL to hit 1ppm THD-20 with this? :D

Cheers,
Glen
 
Re: Re: Your amplifier

syn08 said:
Bob,

Before anything else, let me thank you for the taking the time and looking at our amp. I will try below and answer as much as possible of your questions. I'm sure Edmond will jump in as well.

If I understand correctly, you are achieving 0.0001% THD20 at full power into 4 ohms in a measurement bandwidth of 80 kHz.

This is correct.

I see you are using a 2.5 uH output coil. This is a bit of a surprize, based on other discussions on the thread. I think that John Curl agrees that 0.5 uH is essentially inaudible, but not 2.5 uH. What are your thoughts on this? Why were you not able to go down to 0.5 uH?

The discussion on the audibility of the output coil was one of the most intriguing I've read here. I still fail to understand why a 2.5uH onboard coil could be audible when the cable to the speakers has an inductance of the same order of magnitude. As of less than 2.5uH, the answer is on the web site. Quote: "The output Zobel network is mandatory for the whole amp stability. For the same reasons, the output coil shoud not be under 2uH air core".

I'm also a little surprized to see that you have a fairly large 10 ohms across the coil, and this gives a bit of an under-damped square wave into the capacitive load at 20 kHz. I would have expected to see a resistor here of no greater than 2.5 ohms.

Honestly, we didn't tried anything less than 10ohm. We may try that ASAP and report back.

I was fairly surprized to see 470 ohm gate stopper resistors on the output transistors. This would seem to limit the bandwidth of the output stage a bit. I've usually been under the impression you can safely go down to 200 ohms or less with these lateral devices.

We have tried 220ohm (my original expectation was identical to yours), unfortunately the OPS was not stable in open loop. The output was oscillating at around 5MHz with an amplitude of about 300mV. One of the issues related to lateral MOSFETs is the presence of a relative large capacitance (measured 420pF) between the output node (before the Zobel) and ground. This capacitance is defined by the heat pad between the MOSFET source and the heatsink (connected to ground). An OPS with vertical MOSFETs would not have this capacitance (the case heat plate is connected to the drain rather than to the source as in laterals). Certainly, this capacitance is not helping the stability of the OPS. We are looking into replacing the Berquist SilPads with 0.08" thick aluminum oxide insulators (having only 10% of the current parasitic capacitance). There are some mechanical issues in using those insulators with our PCB, so this is work in progress. As soon as we'll have some data we will report back.

Am I correct in understanding that you have each of the three output pairs biased at 150 mA, for a total idle bias of 450 mA? If so, this helps a lot in getting the output stage distortion down.

You are correct.

It was unclear to me why you chose to synchronously trim both R20 and R81 in the output EC circuit for minimum distortion, rather than, for example, putting a single resistor trim in the path to the common node of R63 and R65.

You are correct, that would be possible. Originally, when this OPS was on the breadboard, we thought that a THD fair minimum could be reached by using fixed resistors (that is, the component dispersion should not account for any significant THD variance). Based on the same expectation, we did not include a THD adjustment trimpot on the PCB. After building four OPS board we found out the hard way that this is not true. Trimming the Hawkwind balance, on each board, was mandatory to achieve the ultimate performance, so the only option without modifying the PCB layout was to adjust the two resistor simultaneously. If the OPS will get another major revision, then probably we'll place an onboard trimpot exactly as you mentioned.

I have not yet fully understood your input stage bootstrapping circuit. It looks like their rails are modulated with a unity-gain copy of the amplifier's output voltage, so that part or all of these stages floats with the output signal. Could you elaborate on this a bit. This kind of feedback usually scares me a little bit.

Well, you are not alone :) It took Edmond quite some time to persuade me this is a good way to go and, as usual, the experiment decided that this is an excellent way to fight the evil Early voltage issues. We would love to hear on any pertinent criticism of this approach. As much as the MPSU looks complicated, it is in fact simpler than cascoding all devices in the IPS!

Why did you not choose to use a dc servo for offset control? The use of an electrolytic in the shunt path of the NFB loop seems a bit of a no-no.

We debated this quite a bit. We concluded that a servo offset control is not coming for free and based on our preliminary measurements, a good quality non-polarised high voltage electrolytic seemed to be good enough. This is indeed another point that could be the subject to a future revision if we could get some good reasons (that could be quantified through some measurements) to switch to a DC servo.

I'm confused by the THD measurement made by the Amber 5500, and the first scope photo shown in your distortion measurements section, showing the 0.0001% residual. Was the using just the Amber in a conventional way. I did not think the Amber (or virtually any other THD analyzer, unaided) was capable of getting down to 0.0001% and showing such a well-defined distortion. You stated that the distortion shown includes that of the Amber oscillator, but implied that it is largely that of the amplifier.

You are entirely correct again. The scope photo you mentioned is showing (lower trace) the amp output with the fundamental removed by the Amber 5500 instrument. By no means is that the image of 0.0001% THD20! It was included only to show that while the second harmonic is mainly due to the Amber 5500 internal oscillator distortions, there is a 3rd harmonic component (the small ridge) that is entirely the amp contribution. Otherwise said, in that photo, the amp 3rd harmonic distortions are hidden somewhere in that small ridge. However, as subsequent photos show, the spectral analysis revealed that the amp itself has the 2nd harmonic distortion dominant, and that the 3rd harmonic is about 10dB lower. Therefore, in the Amber 5500 output photo, the second harmonic component is due to the input signal and a little contribution from the amp, while the third harmonic is purely the amp contribution. If you think it will bring more clarity we could easily include in the Measurements page photos with the Amber 5500 output (with the fundamental removed) and the associated spectra.

If you have any further questions or comments we would be happy to address them.


Hi Ovidiu,

Thank you for these detailed answers. I appreciate it.

I'm still having trouble with the distortion measurements, and this may be an area for further work on your part. It is very difficult to get confidence in a 0.0001% number when that number comes from an Amber 5500. I must admit that the spectral subtraction used in the spectrum analyzer is not something I trust a lot. Maybe there are some additional sanity checks you can do on the Amber measurement as well. For example, in the photo we saw of the Amber residual, what level of THD was the Amber reading?
Also, what does the residual look like and read if the Amber is connected back-to-back? Another thing to try is to show the distortion residual and its value for several loading conditions on your amplifier, such as no-load, 16 ohms, 8 ohms, 4 ohms. Any distortion changes with loading can be assumed to come from your amplifier.

One way to attack the THD analyzer problem is to use a Distortion Magnifier circuit as described in my original EC amplifier paper. That was the only way I was able to get confident distortion measurements down that low. It is a fairly simple circuit and gives amazing results, even when built with 5534 op amps. Noise from the amplifier under test is also a big problem in such low distortion measurements, and the DM does nothing for that. But that is handled nicely by looking at the distortion residual with the spectrum analyzer.

Cheers,
Bob
 
Re: PGP

G.Kleinschmidt said:
I take it that your VMOS models are a lot more reliable that your lateral models then?

I won't build a Cordell amp because I don't like MOSFETs and I like to play with fully symmetrical front ends and I also prefer lots of heat.
But 3ppm is getting pretty close to 1ppm, nu? Crank the bias up for class A and then what? OK, class A is cheating. So how about we build a class AB output stage with lots in parallel of RET’s for a starting open loop THD an order of magnitude better than what those icky MOSFETs give us and then apply EC to that?

BTW, my current fully symmetrical TMC amp design has 20 pairs of MLJ3281/MJL1302 running 6.25A bias (+/-65V rails) with EC for 300W into 4 ohms (ordering the same pair of 1500x220x75mm heatsinks as for my other amp).
Do you think I will need a NDFL to hit 1ppm THD-20 with this? :D

Cheers,
Glen

Hi Glen,

Indeed, class A is cheating. Also, you are using RET's, a different kettle of fish. I'm pretty sure you will hit 1ppm with your setup without NDFL. But aren't comparing apples and oranges?

BTW, why you don't like NDFL so much? Does it stink or just a matter of cold water fear?

Cheers, Edmond.
 
Re: Re: Re: Your amplifier

Bob Cordell said:


I'm still having trouble with the distortion measurements, and this may be an area for further work on your part. It is very difficult to get confidence in a 0.0001% number when that number comes from an Amber 5500.

I must admit that the spectral subtraction used in the spectrum analyzer is not something I trust a lot. Maybe there are some additional sanity checks you can do on the Amber measurement as well. For example, in the photo we saw of the Amber residual, what level of THD was the Amber reading?

Also, what does the residual look like and read if the Amber is connected back-to-back?

Another thing to try is to show the distortion residual and its value for several loading conditions on your amplifier, such as no-load, 16 ohms, 8 ohms, 4 ohms. Any distortion changes with loading can be assumed to come from your amplifier.

One way to attack the THD analyzer problem is to use a Distortion Magnifier circuit as described in my original EC amplifier paper.


Hi Bob,

I slightly edited you message above only for the purpose of answering to each paragraph's suggestion/question.

1. I'm not sure if you ever had a chance to use an Amber 5500. If not, you may want to take a look on our web site, under "Equipment" where key performance metrics are listed. The Amber 5500 is a fine piece of equipment in the same class with Audio Precision (less the amazing software that AP comes with). The Amber 5500 hardware and firmware were designed following pretty close the HP8903B audio analyzer architecture.

2. Neither do I like spectrum substraction. But then to avoid this, we would need a dynamic range in the analyzer of at least 130-140dB, which I doubt it can be achieved with today's technology. One of the best A/D converters that exist today (the TI's PCM4222) is spec'd at 124dB and no need to mention how these numbers are defined... Before purchasing the HP analyzer I was closely looking into a Lynx sound card, but then I realized that while having certain advantages WRT the hardware performance (but not to the level it would allow standalone measurements of our amp), it lacks the complex spectra analysis/operations and synthesis features that a dedicated analyzer has. I also got an HP document (Product Note 3562A-4) dedicated to nonlinear harmonic distortion measurements and the spectra substraction method (and other tips, like using synthetized comb filters to improve the S/N ratio) are clearly recommended for low level THD measurements.

If I recall correctly, while displaying the waveform in the photo, the Amber 5500 was displaying a THD20 of 7 +/2 ppm (fluctuating in time).

3. This is what I was suggesting in my other message to include as a new photo. There are some technical difficulties to capture that on the same scale, but I'll do my best and follow up on this. The issue is that the Amber 5500 was in autoranging and to conserve the scale I have to identify the three internal stage gains (PGA, PGB, PGC). It is doable but it will take a little. The gain for each stage was already calibrated and set manually for the purpose of using the Amber 5500 as a notch filter in the spectra measurements.

4. This is an excellent idea and I'll do this set of measurements ASAP. So far I haven't tried over 16ohms load. All that I know is that switching from 4 to 8 ohm load pretty much halves the THD20 (based on the same spectra substraction method). Unfortunately, most of the 8ohm results are beyond our measurement resolution and floor noise, and I have no reason to believe the situation would change any better for 16ohm or higher.

5. Bob, I have (quite some time ago) downloaded from the AES library and read your paper(s) in which you describe and/or mentioned your distortion magnifier. While I fully understand the principle, I would love to receive the detailed schematics and any further documentation you may have about. I am willing to build this circuit (and perhaps enhance it by using the latest generation of opamps). I am sure it could be a great enhancement in THD measurements today, as it was 20 years ago...
 

GK

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Re: Re: PGP

Edmond Stuart said:


Hi Glen,

Indeed, class A is cheating. Also, you are using RET's, a different kettle of fish. I'm pretty sure you will hit 1ppm with your setup without NDFL. But aren't comparing apples and oranges?

BTW, why you don't like NDFL so much? Does it stink or just a matter of cold water fear?

Cheers, Edmond.


Edmond,

I don't have a problem with NDFL. It's just that you started an argument with me about it. :clown:

Seriously though, are you guys contemplating experimenting with a RET EC OPS in the future? That would be a very worthwhile experiment after you've gone are far as you think you can go with the laterals or maybe Vfets.

Cheers,
Glen
 
Re: Re: PGP

Edmond Stuart said:


Hi Glen,

Regarding 0.1% versus ~0.016%, why you are ignoring my simple math?
Anyhow, let's optimize Bob's amp (I hope you don't mind Bob :)), using modern components in the EC-OPS, using an ideal front-end and trimming the EC balance. Guess what my sim say? THD20 = 2.7ppm. Spicing the same OPS with Bob's front-end reveals a THD20 of 4ppm. So, I think the best you can reach in real life is 3ppm.

>He also did not trim for the lowest THD - just used 5% resistors in the EC circuit.
If you read a little bit further, you'll discover why.
"While use of closer-tolerance resistor would improve the correction at lower frequencies, where it is unnecessary, their use would make a smaller improvement at 20kHz because performance there is beginning to be limited by the speed of the error correction loop."

Why the speed of the EC loop is limited, that is, has been deliberately limited, you can read here:
http://www.diyaudio.com/forums/showthread.php?postid=1323328#post1323328

In case I haven't convinced you, I should say just built an optimized Cordell amp, or at least, spice such an amp.

Cheers, Edmond.


Edmond Stuart said:


Hi Glen,

Indeed, class A is cheating. Also, you are using RET's, a different kettle of fish. I'm pretty sure you will hit 1ppm with your setup without NDFL. But aren't comparing apples and oranges?

BTW, why you don't like NDFL so much? Does it stink or just a matter of cold water fear?

Cheers, Edmond.


Hi Edmond,

I am flattered that you based some of your excellent amplifier design on my EC work, and don't mind at all your discussing optimizing my amp. Indeed, I think it is very interesting to make comparisons between the two, making accomodations to set them on a level playing field. That way we advance our understanding.

Without taking anything away from your design, I would probably do some things differently, and do believe that the design I published can be improved in several ways to move it closer to that 1ppm target. To be honest, back in 1984 I was thrilled just to break the 0.001% barrier.

There are many straightforward ways to improve my input/VAS, based on minor circuit enhancements and newer transistor technology, while still retaining the JFET input stage that I prefer.

As far as the output stage and EC goes, the stable bandwidth I was able to achieve with a 0.5 uH inductor may not be something that can be achieved with laterals. In the circuit, the verticals I used are probably 10 times as fast as the laterals you use that have 470 gate stopper resistors. Indeed, the special stabilizing technique I used may not work with laterals. We all agree that Speed is King in EC output stages. I am frankly surprized that you did as well as you did in the EC output stage with the slow laterals with high gate stopper resistor values.

I did achieve that stability with all settings of an EC optimization pot, so being off-optimum was not an issue. I did observe, under various different conditions of EC compensation, that stability was a function of the trimpot setting. The compensation I ended up using was unconditionally stable for all trim pot settings, however.

I do believe that the 20 khz THD of my EC output stage alone was approximately 0.06%. I think that was into an 8 ohm load. This could probably be improved upon. For the EC output stage distortions you quoted, where they at lower frequencies or were they at 20 kHz? Your stated number of 0.008% THD for your output stage alone, if at 20 kHz, is truly amazing.

Cheers,
Bob
 
Re: Re: Re: PGP

G.Kleinschmidt said:

Seriously though, are you guys contemplating experimenting with a RET EC OPS in the future? That would be a very worthwhile experiment after you've gone are far as you think you can go with the laterals or maybe Vfets.

Glen,

I personally have absolutely no sympathy re: lateral MOSFETs. Although I worked with, I designed some and have a patent regarding their manufacturing technology from the early 90's, I consider them obsolete today. The decision to use them in this project was strictly related to our inability to design a transparent protection circuit. If any of you guys have any good ideas on how such a circuit (basically an I/V converter) could be implemented, we would love to hear more about. With an efficient and transparent protection circuit, we would dump laterals at light speed. But then we'll have the dilema of BJTs vs. MOSFETs... My personal preference? BJTs, but only because vertical MOSFETs are today barely optimized for linear applications (with the notable exception of Toshiba).
 
Re: Re: Re: PGP

Bob Cordell said:
Hi Edmond,

.............
Without taking anything away from your design, I would probably do some things differently,

No problem, different minds, different approaches :)

and do believe that the design I published can be improved in several ways to move it closer to that 1ppm target. To be honest, back in 1984 I was thrilled just to break the 0.001% barrier.

I can imagine that, it was an absolute milestone in the early eighties.

..............
I do believe that the 20 khz THD of my EC output stage alone was approximately 0.06%. I think that was into an 8 ohm load.

And I do believe it was less, otherwise how would you explain a closed loop distortion (at 20kHz) of only 6ppm? But does it really matter?

This could probably be improved upon. For the EC output stage distortions you quoted, where they at lower frequencies or were they at 20 kHz?

At 20kHz.

Your stated number of 0.008% THD for your output stage alone, if at 20 kHz, is truly amazing.

Thanks! BTW, Ovidiu did it. I've only designed the front end.

Cheers,
Bob [/B]

Hi Bob,

Regarding more question about the output stage, I'm not the right person to give the answers, only Ovidiu knows the finesses.


Cheers, Edmond.
 
Hi Glen,

One more thing. If you are using a fully symmetrical front end, beware of the fighting VAS issue. Without a common mode control loop (CMCL), the slightest mismatch can ruin the performance.

As for the NDFL stage, a like to point out that this is a 'natural' consequence of incorporating a CMCL. Let me explain why. As you know, a couple of month ago I dropped here a CMCL version of your 12W amp. Theoretically, that thing should work, but in practice not. The point is that a CMCL can't balance the top and bottom LTP as well as both VASes at the same time (unless one uses closely matched trannies for LTP's, I-mirrors etc).

To overcome this problem I split the control over input bias and VAS bias by combining the two output signals of the I-mirrors into a second stage. Now this simple second stage governs the VAS bias (by means of one zener diode) together with the CMCL without affecting the input stage.

Could you imagine how great the temptation was to use this second stage also for NDFL, by simply adding a few passive components?

Cheers, Edmond.

PS: In a couple of days I'll spice NDFL plus a RET-OPS.
 
Re: Re: Re: Your amplifier

Bob Cordell said:

I must admit that the spectral subtraction used in the spectrum analyzer is not something I trust a lot.

Bob,

I realize I should add a little more insight on the "spectral substraction" technique and the open loop EC OPS THD20.

As it is, HP3562A is a dual channel FFT processor/analyzer. Substracting spectra is not a simple scalar substraction that is, substracting various spectral components amplitudes. The equipment effectively substracts complex FFT transforms which are measured synchronously through the two input channels. This is what we did - channel A was measuring the amp output while channel B was measuring the amp input. Both inputs were sampled synchronously and averaged over 128 measurements. After scaling according to each channel gain (that was separately determined) and normalizing to the output level, the two complex FFTs were substracted and displayed on the instrument CRT. All these operations were handled by the 3562A internal math/FFT operation features, so no external "spreadsheet math" was involved. Of course, we did some sanity checks (like measuring the same output through both channels and substracting, to get the differential noise floor (which was, BTW, around -160dB) and a few others.

Regarding the 0.008% THD in the open loop EC OPS. Yes, this is at 20KHz. Only one comment here: the Amber 5500 output signal is max 10Veff. In order to measure the open loop THD20 at full power, we are using a high voltage OPA445 opamp set at a gain of 5 in a non-inverting configuration. Of course, the OPA445 opamp contribution to the total THD20 could not be neglected. By using the same spectra substraction method as above (and this time comfirmed by the Amber 5500 numbers) we succesfully removed the OPA445 contribution. Also, the Amber 5500 THD20 contribution to the open loop THD20 was very small.

As mentioned on the web site, we built and evaluated four EC OPS boards with lateral MOSFETs. I still have here one available that is at an open loop THD20 of 90ppm and I am willing to do (time permits) any open loop mesurements that you deem as interesting. Unfortunately the fourth board was blown by a wiring mistake in the experimental stages.

Thanks again for the helpful comments!
 
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