PGP (Pretty Good Poweramp)

[syn08]

Site: home.tiscali.nl/audio
NA Mirror: www.synaesthesia.ca

[GK]

Hi.
A very nice design indeed! - good to see it finally completed.
Just one niggle:

The roots of this design can be found in a sticky thread at www.diyaudio.com. Somewhere around page 65, a new symmetrical design was published, in an attempt to solve the well known VAS bias instability that usually plagues such a design. The solution was there to add diamond style current sources, defining a constant voltage drop at the input of the emitter follower that isolates the input stage to the VAS. This solution was heavily criticized as being suboptimal, mainly because the input stage voltage gain was limited by the relatively small resistor (load) required to set the VAS bias.

Several improvements were suggested. Edmond published his approach, built around what was eventually defined as Common Mode Current Loop (CMCL) to stabilize the VAS bias (also avoiding the “fighting VAS”, a potential issue in fully symmetrical designs) and a NDFL (also see the references in this article) approach to improve the frequency response of the negative feedback loop over the classic one or two pole compensation.

Ovidiu was lurking around and, after breadboarding the original circuit (with mediocre results, given the project scope), was interested in Edmond’s approach. He breadboarded Edmond’s design, integrated with the already existing Error Correction (EC) based Output Power Stage (OPS) and reported back some issues regarding the thermal stability of the circuit. Which triggered several full redesigns and ultimately to the circuit presented here

The circuit I presented was actually devised to enable the trouble free use of current mirrors to provide push-pull drive to the VAS miller compensation capacitance in a circuit with a fully symmetrical LTP input. Despite the heavy criticism it actually works quite well (~10ppm THD-20 in the basic 12W prototype built). I really don’t think that it can be fairly compared to a NDFL circuit with biasing servo loops and 10+ times the component count.

Cheers,
Glen

[peranders]

A nice work indeed!

[Edmond Stuart]

Originally posted by G.Kleinschmidt
Hi.
A very nice design indeed! - good to see it finally completed.
Just one niggle:

The circuit I presented was actually devised to enable the trouble free use of current mirrors to provide push-pull drive to the VAS miller compensation capacitance in a circuit with a fully symmetrical LTP input. Despite the heavy criticism it actually works quite well (~10ppm THD-20 in the basic 12W prototype built). I really don’t think that it can be fairly compared to a NDFL circuit with biasing servo loops and 10+ times the component count.

Cheers,
Glen

Hi Glen,

First, don't feel offended, at least not by us. We only mentioned your amp because it just triggered the whole story. So be glad. Without your input, much chance that history went a different way and our project was never born.

Second, the actual number of trannies in the front-end don't differ that much. In your 12W amp 28 and in our amp 34 (not counting the trannies in the +/-24V PSU and clipping indicator)
Admittedly, the circuit is complex, but who cares about the cost of some additional small signal trannies.

Last but no least, there is no free lunch. You will always need more components in an attempt to reduce the distortion considerably.

BTW, the THD-20 of the front-end (simulated) is < 50ppb, that's why we need so many trannies.

Cheers, Edmond.

[Giaime]

Very very interesting, my best compliments

[GK]

Originally posted by Edmond Stuart


Hi Glen,

First, don't feel offended, at least not by us. We only mentioned your amp because it just triggered the whole story. So be glad. Without your input, much chance that history went a different way and our project was never born.

Second, the actual number of trannies in the front-end don't differ that much. In your 12W amp 28 and in our amp 34 (not counting the trannies in the +/-24V PSU and clipping indicator)
Admittedly, the circuit is complex, but who cares about the cost of some additional small signal trannies.

Last but no least, there is no free lunch. You will always need more components in an attempt to reduce the distortion considerably.

BTW, the THD-20 of the front-end (simulated) is < 50ppb, that's why we need so many trannies.

Cheers, Edmond.

G'day Edmond

I agree that a handful of cheap transistors isn’t something to worry about. I just don’t think that the performance of the circuit is particularly mediocre for what it is. Throw in EC and NDFL and you can of course expect at least an order of magnitude reduction in THD. I don’t think that you can discount the trannie count of your modulated PSU though, as it is integral to the performance of the design due to the front-end’s low PSRR

50ppb THD for the front end sure is impressive and quite an achievement – congratulations! But a serious question – since the THD performance of just about any well designed class AB power amplifier is dominantly governed by the output stage THD, in the whole scheme of things, does it really matter that the front end THD be thousands of times smaller? Isn’t the real factor at play here the significantly extend NFB factor out to 20kHz and beyond enabled by the NDFL?

Cheers,
Glen

[andy_c]

Originally posted by syn08
Site: home.tiscali.nl/audio
NA Mirror: www.synaesthesia.ca

Excellent work, guys!

Congratulations

[syn08]

Originally posted by G.Kleinschmidt

I don’t think that you can discount the trannie count of your modulated PSU though, as it is integral to the performance of the design due to the front-end’s low PSRR

Isn’t the real factor at play here the significantly extend NFB factor out to 20kHz and beyond enabled by the NDFL?

One of the early designs that we experimented had as "modulator" nothing but a simple resistive divider from the output to the IPS +/- 24V power supply. We decided eventually that a higher PSRR is worth some extra complexity, otherwise from a distortion performance perspective that resistive divider was good enough. We tried a simple serial regulator which was working perfectly fine (after we got rid of the noisy zeners) but was running rather hot. Then we choosed to avoid bulky heatsinks on the front end PCB and in general to avoid as much as possible thermal gradients across the PCB (due to previous thermal issues that we had). Hence we got the two serial regulators MPSU, also greatly improving the PSRR.

While in principle I agree with you regarding the THD20, at these levels it is though unlikely you could simply divide the OPS open loop THD by the loop gain. If I recall correctly, the loop gain at 20KHz is about 60dB. If you divide the 80ppm (the THD 20 of the open loop OPS) by 1000 you would think you'll get a THD20 of 80ppb, which is simply not happening in the real life. The measured values are one order of magnitude higher. Also, while the simulations are predicting that the 3rd harmonic should be dominant, on the bench we measured the 3rd harmonic as at least 10dB lower than the 2nd, at par with the 4th.

And BTW, this amp has much more than high loop gain and low THD20. See the pulse response and the comments about the non slewing characteristic and the low TIM and DIM.

[GK]

Originally posted by syn08
While in principle I agree with you regarding the THD20, at these levels it is though unlikely you could simply divide the OPS open loop THD to the loop gain. If I recall correctly, the loop gain at 20KHz is about 60dB. If you divide the 80ppm (the THD 20 of the open loop OPS) by 1000 you would think you'll get a THD20 of 80ppb, which is simply not happening in the real life. The measured values are one order of magnitude higher.

Hi
That's an interesting result. 80ppm THD-20 for the class AB output stage is quite impressive though. But this leads to some further pondering. If the 80ppm THD-20 output stage was simply added to a much simpler, conventional (non-NDFL) front end compensated for a gain crossover of 2MHz for a 20kHz negative feedback factor of 40dB, would the THD result be largely the same?
My previous comments WRT front end THD were more concerned with its relationship to the OPS THD.
Suppose that your 80ppm THD-20 OPS was combined with a non-NDFL, 80ppm THD-20 front end compensated for a 40dB 20kHz negative feedback factor as described above, and that the THD reduction was commensurate with the loop gain.
So we have 80ppm (front end) + 80ppm (OPS) divided by 100, giving a THD-20 of 1.6ppm. Suppose that we could make the front end infinitely linear – the THD could only be reduced by one half to 0.8ppm (0ppm+80ppm/100).

Originally posted by syn08
And BTW, this amp has much more than high loop gain and low THD20. See the pulse response and the comments about the non slewing characteristic and the low TIM and DIM. [/B]

Yes, I agree. Despite theoretical disputes what matters in the end is how the circuit performs. I can’t cite an example of something better

Cheers,
Glen

[syn08]

Originally posted by G.Kleinschmidt

Suppose that your 80ppm THD-20 OPS was combined with a non-NDFL, 80ppm THD-20 front end compensated for a 40dB 20kHz negative feedback factor as described above, and that the THD reduction was commensurate with the loop gain.
So we have 80ppm (front end) + 80ppm (OPS) divided by 100, giving a THD-20 of 1.6ppm. Suppose that we could make the front end infinitely linear – the THD could only be reduced by one half to 0.8ppm (0ppm+80ppm/100).

Glen,

I think you are oversimplifying a little... From a statistical perspective, adding the squares of the THD numbers would be correct, but this is again only a statistical approach. At very low levels, a realization (read: measurement) of this stochastic process could be largely different! It all depends on the phase relationship of the harmonics produced by the front end vs. the harmonics produced by the OPS. So the correct approach is to add the complex FFTs rather than the THD squared numbers.

But then I agree that the EC OPS in conjunction with a "standard" front end will still deliver impressive performance. But that's precisely why there's a barrier at 1ppm. You can't break it by conventional methods. And you know how these things are going, over a certain level, every 10% improvement may double the complexity/cost.