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Old 10th November 2007, 10:32 PM   #61
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Using Q8 results in all forms of possible and impossible oscillations. I will not use it.
With the shown current source, that is more stiff against voltage changes, the regulator works good.
Rüdiger
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Old 11th November 2007, 03:47 AM   #62
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Rüdiger,
do you have any JFETs with higher Idss, like 2N4391?
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Old 11th November 2007, 09:15 AM   #63
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Quote:
Originally posted by Lumba Ogir
Rüdiger,
do you have any JFETs with higher Idss, like 2N4391?

nope.
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Old 30th January 2008, 02:54 PM   #64
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I build quite some variations from the above ciircuits and decided now to take the open loop route and trade maximum ripple rejection against low noise and better high frequency behaviour as well as smooth transient response. This design won't work too well without a preregulator of some kind, but, regarding ripple rejection, not so bad one might pense on the other hand when looking at the special 'feedthrough' for X2. Negative version for -24VDC. Q2 is 2sc2910, which I haven't a model for.

If my sim results make sense, then the attenuation is -78dB in the audioband raising to -40dB at 10Mhz. The high freq behaviour is very dependent on what you choose as ESR for the output cap in sim.

J1 must be operated at zero tempco.
Does this makes sense for you?

Rüdiger
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Old 4th February 2008, 06:43 PM   #65
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I did the numbers wrong, the plot reads as attached

It's clear that this lies beneath the noise floor of anything I can think of, at least in the audio range.

How would one maintain excellent performance in physical implementation?

Since a shunt reg cuts the current loop between the load and the psu by employing a new ground return at the reg's output, one should strieve for for most quiet return. Would you think that all grounds (v-ref etc.) meet at this point or should they get a dedicated starground away from the load?

Rüdiger
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Old 4th February 2008, 06:44 PM   #66
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Here is my latest incarnation:
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Old 5th February 2008, 11:13 AM   #67
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Rüdiger, I think you should stop somewhere and start to build a prototype on vero board or something. You can simulate in eternity without getting anywhere. You have many unknown parameters which you don't have in the simulations.
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Old 5th February 2008, 11:23 AM   #68
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Per-Anders,
I *did* build it, and it works, however, I can't do much testing.

I pushed the regulated rail with both a 300mV and a 3Vpp sine wave at various frequencies up the Mhz-range, and while I saw no response on my scope with 300mV, I saw a tiny wiggle at 3Vpp (@5mV/div), even at small sinked currents (around 40mA).

I don't think it's too bad.

I shall tweak step response, since there is a little ringing. The sim tells it might tweaked out with good caps (much µF and low ESR).

Note that I performed the sim with an IRF610 for X2 and Q2 with 2SA1206, since I don't have models for 2SK982 and 2SA1208.

Rüdiger

EDIT: and I freely admit that it's a pain to set up the v-ref properly and get the right output voltage. I would simply place a LED in J1's source *if* I had devices with large Vgs that could be matched for it with zero tc
Rüdiger
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Old 25th February 2008, 07:30 PM   #69
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I'm just out on ideas for a good, low noise and reaonable simple voltage reference between say 20 - 40 Volts.

I want to avoid using plain ordinary zeners. So far I'm using a fet-ccs-resistor string (really a pain to spot the zero temco for a desired output voltage!) for the first stage of a phono amp, and a TL431 for the second stage reg (not shwon). Due to the high gain of the triple cfp/darlington output transistor arrangement, self noise is a concern as well as any fed-through noise of the already regulated line (a guess, because the fet-resistor seems not to perform less noisy then the TL431).

Is there anything else I can choose for a relativly high voltage vref?

Rüdiger
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