Hi
In working with a single ended differential VAS topology, I built a mirror that worked quite well. I suppose it could be referred to as a swap Thompson mirror. Anyway, it worked well up to 250-300KHz reflecting a gain of 1X, with a realitivily small phase shift. Thought I might would share it with the forum.
If one chooses to use a boosted, regulated supply with a constant power diff VAS, this circuit could be cascoded with a BJT or Mosfet as shown. It takes an assymetrical current to drive, but if regulated, shouldn't be a problem. Of course, I'm sure there is "just too many damn transistors" to generate much interest here. 
If one chooses to use 'matched transistor arrays', the degeneration could be less accordingly. I used P-channel mosfets for Q1, Q2 and had good results as well. Since the sources are driven with dependent current sources, Vgs matching isn't so critical.
Take it for what you will, I shall continue to sip on my rum and juice:......................
In working with a single ended differential VAS topology, I built a mirror that worked quite well. I suppose it could be referred to as a swap Thompson mirror. Anyway, it worked well up to 250-300KHz reflecting a gain of 1X, with a realitivily small phase shift. Thought I might would share it with the forum.
If one chooses to use a boosted, regulated supply with a constant power diff VAS, this circuit could be cascoded with a BJT or Mosfet as shown. It takes an assymetrical current to drive, but if regulated, shouldn't be a problem. Of course, I'm sure there is "just too many damn transistors" to generate much interest here. If one chooses to use 'matched transistor arrays', the degeneration could be less accordingly. I used P-channel mosfets for Q1, Q2 and had good results as well. Since the sources are driven with dependent current sources, Vgs matching isn't so critical. Take it for what you will, I shall continue to sip on my rum and juice
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Sorry for the lack of better description.
The dependent current sources represent the collectors of the differential VAS transisitors. These are driven by the input stage. Q1 & 2 are the cascode for these. Resistor R, is the same value as the resistor on the gate of the N-fet. This makes the votage swing roughly the same for the differential's cascode output, collector/drain of Q2, and the negative side on Q4, giving a more symetrical clipping. (the mos devices already have a reverse bias DS diode in them.) The current source at the top is the tail resistor or CCS. The arrows are the bias current that drives the Vbe multiplier and output drivers, that being the EF output stage. If there is a higher voltage(a few mA) for this stage than the output stage, it doesn't really matter to sacrifice a few extra volts to cascode with. Am I making any sense?
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