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Old 11th July 2007, 12:50 PM   #11
x-pro is offline x-pro  United Kingdom
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Quote:
Originally posted by AndrewT
What am I misunderstanding?
That most of the current from Q7, Q8 CCS (~5mA) goes through Q5, Q6 CCS (~3.3mA) and only about 1.7 mA shared between R6 and R7

0.85mA x 18K = 15.3V

Cheers

Alex
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Old 11th July 2007, 12:55 PM   #12
suzyj is offline suzyj  Australia-Aboriginal
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You've forgotten Q5, which sources 3.4mA into Q7 (via the zener). The balance goes via the diff pair (800uA each side). This results in 14V across R6 & R7.

The topology is a good one. I've built a really good amp already using this topology (see http://www.littlefishbicycles.com/poweramp/). It appears to be simply the complete lack of thermal tracking in the intermediate stages that's biting me.
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Old 11th July 2007, 01:50 PM   #13
jcx is offline jcx  United States
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working with what you have in hand I would make a few tweaks on the board before just changing devices

loose the gnd between R17,18 if anything needs to track its the refs for these ccs

add trim pot to R19 or 20 to be able to balance mje tail curents so that the Q11-14 pairs are operating a precise balance themselves, less important but possibly trimming the MJE degeneration R could also prevent this stage' imbalnace from forcing the previous Q11-14 from operating with a noticable inbalance

you could cut your board traces and add series collector R to Q11-14 to operate the Qs at the minimum power sensitivity bias point (dropping equal V in Q Vce and total collector R)
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Old 11th July 2007, 03:16 PM   #14
Bensen is offline Bensen  Belgium
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No Bonsai,

I haven't found the time yet to build it. But one day this definitely will happen.

Can you give me a link to your circuit?

Ben
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Old 11th July 2007, 04:17 PM   #15
Elvee is online now Elvee  Belgium
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Quote:
Originally posted by jcx

you could cut your board traces and add series collector R to Q11-14 to operate the Qs at the minimum power sensitivity bias point (dropping equal V in Q Vce and total collector R)

I'd go along with this suggestion, perhaps with the addition of 100pF C's in //, not to alter the HF behavior.

Another aspect that might contribute to the problem is the "non-perfect" differential driver stage: the degeneration resistors with the tail resistor form a T attenuator that might prevent these stages from differentially cancelling the distorsion from the previous stage.

I'd also think of using "creatively" the collector currents from Q15 and 17, instead of simply dumping them to the GND. I've no precise idea yet, but I think it's worth some moments of reflection.
Cheers

LV
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Old 11th July 2007, 04:45 PM   #16
AndrewT is offline AndrewT  Scotland
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Hi,
I see the current subtraction from CCS Q5 & 6 now.
thanks.
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Old 11th July 2007, 09:17 PM   #17
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Default VAS Distortion

In taking another look at the fully differential VAS, I think I know what is happening. In order to operate correctly a 4-transistor VAS needs to maintain each VAS device in its linear region. Any deviation from that point will result in distortion. This means that the voltages presented by the second differential stage must be exactly matched to the Vbe characteristics of the four VAS devices. This is not easily achieved.

I would consider a more conventional VAS stage consisting of a pair of cascoded devices as illustrated in the attachment. Setting the idle current in this topology is substantially easier. The use of a voltage reference between the devices in the cascoded pair guarantees a fixed bias voltage within the pair. The only critical setting in this topology is to ensure that quiescent Vbe across Q13 and Q17 is set to approx 600 mV. During operation you should see less than 1 mVPP voltage swing across these points.

I have found this topology relatively insensitive to device selection and/or PVT variations.
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Old 12th July 2007, 01:07 AM   #18
GK is offline GK  Australia
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Default Re: VAS Distortion

Quote:
Originally posted by Elvee
I'd also think of using "creatively" the collector currents from Q15 and 17, instead of simply dumping them to the GND. I've no precise idea yet, but I think it's worth some moments of reflection.
Cheers

LV

Here's a topology modification I think Suzy's amp would lend itself to nicely:
Add another identical power output stage, driven from the collectors of Q15 and Q17. Add a opamp based DC servo to steer the common mode output voltage and apply differential feedback. Bingo - A truly symmetrical amplifier with a bridged output, differential inputs, less THD due to more complete even order harmonic cancellation and double the slew rate.
Even the 100W version, with 2 pairs of output MOSFETs would benefit from being built this way, as each pair of MOSFETs could be driven from opposite legs of the differential VAS, further improving HF performance due to the fact that the MOSFET input capacitance is now shared between both legs of the VAS.



Quote:
Originally posted by analog_guy
In taking another look at the fully differential VAS, I think I know what is happening. In order to operate correctly a 4-transistor VAS needs to maintain each VAS device in its linear region. Any deviation from that point will result in distortion. This means that the voltages presented by the second differential stage must be exactly matched to the Vbe characteristics of the four VAS devices. This is not easily achieved.

I would consider a more conventional VAS stage consisting of a pair of cascoded devices as illustrated in the attachment. Setting the idle current in this topology is substantially easier. The use of a voltage reference between the devices in the cascoded pair guarantees a fixed bias voltage within the pair. The only critical setting in this topology is to ensure that quiescent Vbe across Q13 and Q17 is set to approx 600 mV. During operation you should see less than 1 mVPP voltage swing across these points.

I have found this topology relatively insensitive to device selection and/or PVT variations.

Or just go the whole hog and do what I did (Which is esentially a AEM6000 on steroids, but without the JFET input stage):

http://users.picknowl.com.au/~glenk/MAIN.HTM


Cheers,
Glen
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Old 12th July 2007, 02:12 AM   #19
PB2 is offline PB2  United States
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Default Re: VAS thermal tracking and distortion

Quote:
Originally posted by suzyj
Here's a really good example of "the simulations don't tell you everything".

A while ago, I knocked up a pair of MOSFET amps that do 140W into 8 ohms, with lovely low THD (measured 0.0013% at 1KHz). They were based on David Tilbrook's AEM6000 design, which I think is about as good a topology as you'll find for a medium-power MOSFET amp.

I was fairly conservative, and used MJE340/350 transistors for the intermediate stages, similar to Tilbrook's original.

Anyway, I knocked out a 50W (one pair of MOSFETs) version recently. Because the voltages are a little lower, I figured I could use MMBTA06/56 SOT-23 transistors for the second stage. They're faster than the MJE340/350s, and considerably smaller. All good stuff.

Simulations bore my reasoning out. With a little optimisation, I was able to go well under 0.001% THD at 1KHz, 50W into 8 ohms. All good stuff. The power dissipation of all the transistors is well within the limits for the devices.

The schematic I settled on is here.

Next step was to do a layout, get some boards made, and build a couple up to try. I didn't skimp. I used quality MELF resistors, mica and poly capacitors, and a pretty good layout. One of the boards is is shown here.

Anyway, over the last couple of weeks, after a lot of delays due to doing other stuff, I finally fired one up and had a play with it.

The results are nothing short of shocking. Yes, it'll put 50W into 8 ohms, but the THD is around 0.1%. After much hair pulling, I found that the operating conditions were highly dependent on the temperature that these SOT-23 transistors were at. After much stuffing around, I found I could improve the THD to about 0.05% by putting a layer of thermally conductive goo over the whole second stage.

What a mess. Clearly these transistors need to track with one another thermally, or else all the advantages of running a balanced amplifier go totally out the window.

There's nothing that can be done to make this amplifier really useable in its current incarnation. I think I'll chalk this amp up to experience and go back to the drawing board.

From what I understand of what you say here it seems to be a logical conclusion that if you used the same devices (MJE340/350) as in your other amp, the distortion should be low/similar? And this would be because they have more thermal capacity and therefore are not thermally modulated by the operating point?
Just want to make sure that I'm following.

Have you considered an effective way to thermally couple and or heat sink the smaller devices. By this I mean something better than a layer of thermal goo?

Did you match devices by the way? I do notice that you use a good amount of emitter degeneration which should reduce the need, still?

I wonder if you might have gotten some counterfeit parts that are just way off?

Nice work, by the way!

Pete B.
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Old 12th July 2007, 03:12 AM   #20
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Suzy

Off the top of my head, changing R33 and R34 to CCS might be
worth trying.

Since they (CCS) should track each other well, an arrangement
not unlike glens IP stage with mirrors would be the way to go.

On your CCT, VAS operating point is very dependant on it's
common mode voltage. Using CCS will free it from this and should
lower distortion of Q15/16 and Q17/18 a lot. This will allow them
to work as true degenerated dif pairs.

On the down side, changing these R's to CCS will probably have
an impact on stability.

cheers

Terry
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