Triple Emitter-Follower as OPS for the Aikido - diyAudio
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Old 4th June 2007, 05:18 PM   #1
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Default Triple Emitter-Follower as OPS for the Aikido

Hi,
I'm working towards an hybrid amplifier where the VAS will be the Aikido, where the OPS is some Emitter-Follower variation.
Unfortunately my decisions vary with my mood about the
  • Double Emitter-Follower
  • Triple-Emitter Follower
I'm simulating with PSPICE, and I'm planning to work with the ONSemi TermalTrak BJT's, biased เ la Douglas Self, so I shall have 2 or 3 paralleled devices, respectively.
The triple Emitter-Follower
Click the image to open in full size.
when compared to the double Emitter-Follower (the CS/CM is there to have higher input inpedance; it provides also a better independence amonf BIAS and SYM settings)
Click the image to open in full size.
seems to be the best suited:[list=1][*]it has lower distortion (but quite always: this will be part of my question)
Click the image to open in full size.[*]it has a flatter (apart being obviously higher) DF
Click the image to open in full size.[/list=1]
Unfortunately at the simulator the Triple E-F takes a long time (>1s) to stabilize its BIAS (while the Double E-F is istantaneous).
And the distortion at low signals grows doubtfully.
I don't understand if the two phenomena are related or not.
More: I don't know if what I see at the simulator has something to do with reality or not.
Someone (clever than me) can help me to clarify this point ?
Thanks
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Old 5th June 2007, 02:06 AM   #2
CBS240 is offline CBS240  United States
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Hi

Every circuit has it's pros and cons, it just depends on what pros you need and which cons you can live with. As for the triple, the obvious pro is current gain(higher input impeadance) and DF. But aside from the bias issues, there is a larger phase shift as there is 3 pn junctions to turn on/off instead of 2. This may require more compensation for stability, eating away at OL bandwidth. Also there is 1.8V drop from VAS to the output instead of 1.2V. This could be an issue if the VAS rails are the same voltage as the output rails making the VAS more likely to saturate. Of course there are faster pwr transistors these days, but IMO if your VAS can drive the double, there is no need for a triple. Then again, for a sub-woofer amp, the triple may be better since it is really slow anyway. Choices, choices.........




What does the Aikido circuit look like?
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Old 5th June 2007, 03:03 AM   #3
lineup is offline lineup  Sweden
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teodorom.
I have only some tubes stuff in my downloads/files of you.
form earlier


Friends:
Correct me if I am wrong:
But is not both versions above double stages
Or maybe I am confusing with Triple Darlington vs. Darlington output


Mr Leach, see his website 'Leach low-tim' amplifier.
Uses triple darlington folloers, as I recall it.
He gives reasons for this, in his comments.

A 'triple darlington' is:
one driver to - next driver which - drives Output transitor( or parlleled Output)
All this in a 3-step-stages follower config.

As I said, to explore triple darlington, see Leach audio website
and read his thinkings about his output stage.


If this topic as meant to deal with:
paralleling 3 vs. paralleling 2
transistors

... I have to beg, if you can Excuse me.


Regards
lineup
Lineup Audio Corporation Limited
http://lineup.awardspace.com/
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Old 5th June 2007, 05:13 AM   #4
taj is offline taj
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Quote:
Originally posted by lineup

Friends:
Correct me if I am wrong:
But is not both versions above double stages
Or maybe I am confusing with Triple Darlington vs. Darlington output
Lineup,

You are right, but look closer! The first example has 2 series driver stages (a' la Leach), and the second example has only one driver stage. The number of parallel output pairs is probably there just to distract you.

..Todd
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Old 5th June 2007, 06:47 AM   #5
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Teodoro,
Aloia uses a similar circuit in his "GY-50" ("tripletta", aka triple darlington).

http://www.audiokit.it/ITAENG/KitEle...Y50/Gysch1.gif

Unfortunately your schematic is pretty small and I can't read it.
Can you post a better picture?

BTW are you using Microcap?

Cheers

Andrea

BTW I use the Aikido to drive a diamond power buffer (as usual credits to Mtlin12 http://www.diyaudio.com/forums/showt...573#post816573 )

Cheers

Andrea
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Old 5th June 2007, 01:49 PM   #6
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Default Interesting topology ...

Thanks Andrea,
the Diamond Buffer seems an interesting topology that needs further investigation. A first simulation gave me flat response and a DF=12 flat down to 1Hz ! It is not too much clear to me how to control the BIAS and the SYMmetry.
A first trial told me that R9 and R12 control the BIAS: however, to get reasonable BIAS current, 10R seems a value too low.
I need to check carefully (using the Douglas Self "wingspread" methodology) what is the appropriate BIAS: the above results were obtained with R9=R12=200R. The BIAS current is then approx 60mA.
It seems to me that there is room for improvement by adding more NJLs (so adding more diodes and then lowering R9 and R12).
With this topology BIAS setting is again istantaneous.
My questions however still remain unaswered:[list=1][*]Is the BIAS setting slowsness an artifact of the simulator ?[*]If no, the high distortion at low levels is related to that ?[/list=1]
Thanks again
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Old 5th June 2007, 02:18 PM   #7
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Hi Teodoro,
you're right about the 10 ohm value being too small.
IIRC I used 68 ohm.

I also increased a little the current in the first stage.

Matched transistors will help keeping offset low.

Turn on and turn off are completely quiet (no thumps whatsoever)
The response is very flat in both amplitude and phase to >100kHz

How did you simulate high distortion at low levels?

BTW I also had to add a 220pF cap between B and C of the pre-drivers to kill a oscillation.

More details here: http://www.audiofaidate.it/forum/top...?TOPIC_ID=2018



Hope it helps

Andrea
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Old 5th June 2007, 09:55 PM   #8
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Default PSPICE "measurements"

I "measured" the distortion using PSPICE.
I let the circuit stabilize disregardng first 2s. Then I run the simulation for 0.2s with a 0.001ms resolution.
I could try to be more precice, but the simulation would take too much time.
In this way, taking "measurements" at 0.1V, 1.1V, 2.1V, ..., 24.1V, then at 0.1V, 0.2V, ..., 1.1V takes a whole night.
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