lumanauw said:
Sure, but I want also to make clear each and everyone deserves my respect as to what likes to listen and how. This is an intensely personal experience where one size cannot possibly fit all.
What I do not accept is someone trying on non-objective grounds to impose an objectively inferior technology as the "correct" or "better" way for everyone else.
Rodolfo
Nelson Pass said:
Excuse me, I don't recall making those arguments.
Nelson,
I picked from that remark from yours for it did hint to the line of argument I focused on.
If you do not adhere to the camp of subjectivists who posit there are unmeasurable performance parameters that make for a perceptible (for the better) difference, then just fine, it certainly makes sense with an individual both long experienced and sporting a keen intellect in matters electronic.
Rodolfo
JPV said:
Hi JPV,
I agree that the Oliver paper is somewhat confusing. He derives some formulas but does not reach a clear conclusion about the optimum bias in my view. If you've read Self's writings on this subject, he reaches some much more specific conclusions. Namely, for several emitter resistor values, he specifies an optimum bias. But he bases that on the variation in the slope of Vout vs. Vin for the EF stage. This in turn depends on the load used. Oliver's approach seems more general, as looking at the output impedance variation removes the load as a variable. If you're using LTSpice and have some good models for the output stage transistors, you can duplicate Oliver's approach numerically by using the undocumented LTSpice d() function that takes the derivative. By applying a DC-swept current source to the output and computing the derivative of Vout with respect to the applied current, you can get a graph of the variation of incremental DC output resistance with current. You'll find that the bias that optimizes the output resistance variation also agrees with Self's optimum bias values. So it's just two different ways of looking at the same thing. This was discussed a while back in this thread. See my web page for the updated models of the MJL3281A and MJL1302A.
With FETs, you won't see an optimum bias. Rather, the output impedance variation gets less and less bad as the bias is increased. But if error correction is used, I suspect the situation would change dramatically for the better. I have not verified this in sim, but there are models of Bob's error correction amp output stage in that particular thread that could be used to easily check this.
I think the results of such an analysis would be much more interesting and informative than Nelson's persistent, yet subtle threadjacking attempts.
serengetiplains said:
Measuring amplifier performance parameters alone narrows the analysis to only one part of the system. A few posts back I suggested a much more realistic comparison setup involves at least loudspeakers and listening environment, taking sound presure field comparison with the original program or test signal as performance evaluation.
While this type of test obviously contaminates the amplifier evaluation with foreign distortions, it is much closer to check what is actually expected from an amplifier to perform, i.e. reproduce music.
Rodolfo
PS. If you want an incomplete list of further tests currently not being performed, I should begin with THD across the full range with varying magnitude and phase reactive loads.
andy_c said:
This simulation approach you suggest is a very good idea. One could also do something similar in the lab by back-feeding the output of an amplifier with another amplifier through an 8-ohm resistor. The signal used could be a standard 60:6000 Hz IM signal, and the amplitude variation on the 6000 Hz component could be checked. This would be most useful as an experiment on an open-loop output stage terminated at its input, as in your diagram in your earlier post. This is similar in some ways to the Interface Intermodulation (IIM) test proposed by Otala.
I believe that an even better test for looking specifically at the crossover distortion is to back-feed the amplifier with a 19+20 kHz twin tone and view the voltage there on a spectrum analyzer. That can potentially be a very sensitive test, since the nominal value of the stimulous signal will have been attenuated strongly by the low output impedance of the output stage, making for very good dynamic range in the test. This test makes sense either with an open-loop output stage or with a complete amplifier.
I've also looked at the net output impedance as a function of current using a simple Excel spreadsheet for the calculations.
I have not read the Oliver paper, but should probably go read it. Someone else here I think said that Oliver pointed out a concern about how small the optimim voltage was across RE in consideration of thermal changes that could drive it away from the optimum. I share that same concern. Given the thermal junction variations in the course of playing program material, being at the so-called optimum most of the time is probably an elusive thing. A mere 5C short term junction temperature change will mess things up by about 13 mV, a good percentage of the total optimum value. It would be awful, on a short-term basis, to be left with virtually NO bias, due to dynamic thermal mis-tracking.
Bob
Bob Cordell said:
Bob, you are absolutely correct in your assumption. A Sunday or two ago when the RE voltage was tossed around, you may recall that, I played around with bias on an old KSA50 in my workshop.
It was a particularly warm day (41 degrees centigrade). My oscillating airconditioner caused variations in RE between 13mV and 18mV when passing the air over the the open amplifier.
Hence my question to John, at what ambient temperature would one set the bias.
If your thermal compensation is correct then the current will increase when the transistors are cold and decrease when they get hot.
Kind regards
Nico
TO Nico
Normally if the thermal compensation works 100%, the current should not change with T°.
If the transistor gets hot the compensation will decreases the Vbe to keep the collector current at its cold value but if mistracking then !!!
TO andy_c and Bob Cordell
In my reply of a few days ago I summarised my understanding and interpretation of Oliver'paper on output impedance variation with ic ,Rc and Io where ic is the variational part of the collector current and Io is the bias current Rc is the emitter resistor.
It looks like a large Io will decrease the peak variation of Rout with ic ( so the distortion) for RcIo optimal ie 13<RcIo<26mV.
But a large Io will increase the window of currect where Rout is varying. When ic decreases, Rout starts to vary under ic<4 x Io.
My question is then : Am I right? and Many transistors in // should allow to keep each transistor at low Io ( narrow window) and small peak of Rout because // . It should also be interesting to have your comments on Oliver's diodes.
The stability of Io with T° is paramount. If a burst of power is followed by low level signal and T° tracking is lagging, then RcIo will be not optimal and a distortion burst will be created. Is this not a cause of so called solid state sound. The diodes in the thermatrack Motorola transistor should be efficient but how to test this in a transient way?
andy-c, I thank you for the info. I am in the process of studying a Home theatre system for my home. I intend to use S. Linkwitz open baffles concept because it make a lot of sense. I will need more than 20 amplifiers for this and I have to make them.
I am back to study electronics and my next move will be spice ( LTspice). I will definitely follow your advice. I am reading Self's book. I find him ( and Spice ) the Tycho Brahe of audio amplifiers but I want also to read the Kepler one !!! I feel that people like you and Cordell will help me
Normally if the thermal compensation works 100%, the current should not change with T°.
If the transistor gets hot the compensation will decreases the Vbe to keep the collector current at its cold value but if mistracking then !!!
TO andy_c and Bob Cordell
In my reply of a few days ago I summarised my understanding and interpretation of Oliver'paper on output impedance variation with ic ,Rc and Io where ic is the variational part of the collector current and Io is the bias current Rc is the emitter resistor.
It looks like a large Io will decrease the peak variation of Rout with ic ( so the distortion) for RcIo optimal ie 13<RcIo<26mV.
But a large Io will increase the window of currect where Rout is varying. When ic decreases, Rout starts to vary under ic<4 x Io.
My question is then : Am I right? and Many transistors in // should allow to keep each transistor at low Io ( narrow window) and small peak of Rout because // . It should also be interesting to have your comments on Oliver's diodes.
The stability of Io with T° is paramount. If a burst of power is followed by low level signal and T° tracking is lagging, then RcIo will be not optimal and a distortion burst will be created. Is this not a cause of so called solid state sound. The diodes in the thermatrack Motorola transistor should be efficient but how to test this in a transient way?
andy-c, I thank you for the info. I am in the process of studying a Home theatre system for my home. I intend to use S. Linkwitz open baffles concept because it make a lot of sense. I will need more than 20 amplifiers for this and I have to make them.
I am back to study electronics and my next move will be spice ( LTspice). I will definitely follow your advice. I am reading Self's book. I find him ( and Spice ) the Tycho Brahe of audio amplifiers but I want also to read the Kepler one !!! I feel that people like you and Cordell will help me
JPV said:TO Nico
Normally if the thermal compensation works 100%, the current should not change with T°.
If the transistor gets hot the compensation will decreases the Vbe to keep the collector current at its cold value but if mistracking then !!!
This may be true for a computer simulation.
JPV said:TO Nico
Normally if the thermal compensation works 100%, the current should not change with T°.
If the transistor gets hot the compensation will decreases the Vbe to keep the collector current at its cold value but if mistracking then !!!
TO andy_c and Bob Cordell
In my reply of a few days ago I summarised my understanding and interpretation of Oliver'paper on output impedance variation with ic ,Rc and Io where ic is the variational part of the collector current and Io is the bias current Rc is the emitter resistor.
It looks like a large Io will decrease the peak variation of Rout with ic ( so the distortion) for RcIo optimal ie 13<RcIo<26mV.
But a large Io will increase the window of currect where Rout is varying. When ic decreases, Rout starts to vary under ic<4 x Io.
My question is then : Am I right? and Many transistors in // should allow to keep each transistor at low Io ( narrow window) and small peak of Rout because // . It should also be interesting to have your comments on Oliver's diodes.
The stability of Io with T° is paramount. If a burst of power is followed by low level signal and T° tracking is lagging, then RcIo will be not optimal and a distortion burst will be created. Is this not a cause of so called solid state sound. The diodes in the thermatrack Motorola transistor should be efficient but how to test this in a transient way?
andy-c, I thank you for the info. I am in the process of studying a Home theatre system for my home. I intend to use S. Linkwitz open baffles concept because it make a lot of sense. I will need more than 20 amplifiers for this and I have to make them.
I am back to study electronics and my next move will be spice ( LTspice). I will definitely follow your advice. I am reading Self's book. I find him ( and Spice ) the Tycho Brahe of audio amplifiers but I want also to read the Kepler one !!! I feel that people like you and Cordell will help me
Regarding the thermal tracking, what you have described is slightly over-simplified. This is because there are at least three time constants at work: that of the heat sink, measured in minutes, that of the device package, measured in seconds, and that of the die, measured in milliseconds. Usually the thermal sensing junction will be attached to the heat sink. If it is set to neither over-compensate or under-compensate, it will properly correct for the heat sink variation over the long term. The only remaining relative delta T to be at work is then the delta T between heat sink and package and package to die. In this situation, the devices will run hotter with added signal dissipation, but will presumably settle down to the right value after a couple seconds. Sometimes people will set the overall heat-sink-related correction loop to be slightly over-compensated to correct for some of this. This can result in momentary under-bias after higher dissipation intervals. It is easy to see that, with three time constants at work, there is no perfect compromize in a dynamic sense. This is the problem.
I covered some of this briefly in my MOSFET amplifier paper on my web site at www.cordellaudio.com. There I showed bias current as a function of time after a high-power audio signal interval was terminated for both a bipolar design and a MOSFET design.
Some have attempted to mitigate this dynamic thermal tracking problem by attaching the sensing junction to a power transistor case, while another possible improvement would be the use of the ThermalTrak transistors.
Many transistor pairs in parallel, each with its own RE, and with that RE set near the optimum voltage drop, will definitely improve matters, since the amount of impedance that can vary as the stage goes through crossover will be much smaller. With that as a given, higher total bias current, while adjusting RE to keep the optimum voltage across it, will further reduce distortion, but at the expense of thermal bias stability.
Bob
Some practical results of Bob's example : Six mosfets in parallel, error correction, all devices on common copper prism ( both " error and temperature transistors at prism - not only one, like Bob recoment ) : bias setting by ambient temp 20 °C - 250 mA . Ten seconds full power ( 100 W ), current rise at value cca 260 mA, but very quickly fall at 250 mA. By long time loading on half power, temerature at all prism rise on cca 60°C. Quinscent current fall down only 5 %. Distance between power and sensing transistor is 20 mm, power transistors aren't insulated from prism, sensing transistors at TO 126ML case. By my opinion it all is excelent result...
Hi andy_c
I looked at your thread and have seen your graphs.
This is great. It seems that a simulation ( yours), a calculation ( Oliver) and tests ( Self) are showing the same trend.
My question is about your graph: why is the trend at high current not R=0,22 because hib ( 1/gm) is then very low?
Seeing this in linear scale is also surprising. What I said on narrow window doesn't make sense.
Mr Cordell
I understand of course the thermal dynamic problem. I though I showed my concern. A question is : is the thermal lag effect creating a lot of "transient distortion" ? What is the weigth of this effect in the overall aural perception?
Mr Pass
I have VERY good burgundy in my cellar in Brussels. If you ever PASS by you are welcome
JPV
I looked at your thread and have seen your graphs.
This is great. It seems that a simulation ( yours), a calculation ( Oliver) and tests ( Self) are showing the same trend.
My question is about your graph: why is the trend at high current not R=0,22 because hib ( 1/gm) is then very low?
Seeing this in linear scale is also surprising. What I said on narrow window doesn't make sense.
Mr Cordell
I understand of course the thermal dynamic problem. I though I showed my concern. A question is : is the thermal lag effect creating a lot of "transient distortion" ? What is the weigth of this effect in the overall aural perception?
Mr Pass
I have VERY good burgundy in my cellar in Brussels. If you ever PASS by you are welcome
JPV