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Old 9th January 2007, 06:14 PM   #531
JPV is offline JPV  Belgium
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TO Nico

Normally if the thermal compensation works 100%, the current should not change with T.
If the transistor gets hot the compensation will decreases the Vbe to keep the collector current at its cold value but if mistracking then !!!

TO andy_c and Bob Cordell

In my reply of a few days ago I summarised my understanding and interpretation of Oliver'paper on output impedance variation with ic ,Rc and Io where ic is the variational part of the collector current and Io is the bias current Rc is the emitter resistor.
It looks like a large Io will decrease the peak variation of Rout with ic ( so the distortion) for RcIo optimal ie 13<RcIo<26mV.
But a large Io will increase the window of currect where Rout is varying. When ic decreases, Rout starts to vary under ic<4 x Io.

My question is then : Am I right? and Many transistors in // should allow to keep each transistor at low Io ( narrow window) and small peak of Rout because // . It should also be interesting to have your comments on Oliver's diodes.
The stability of Io with T is paramount. If a burst of power is followed by low level signal and T tracking is lagging, then RcIo will be not optimal and a distortion burst will be created. Is this not a cause of so called solid state sound. The diodes in the thermatrack Motorola transistor should be efficient but how to test this in a transient way?

andy-c, I thank you for the info. I am in the process of studying a Home theatre system for my home. I intend to use S. Linkwitz open baffles concept because it make a lot of sense. I will need more than 20 amplifiers for this and I have to make them.
I am back to study electronics and my next move will be spice ( LTspice). I will definitely follow your advice. I am reading Self's book. I find him ( and Spice ) the Tycho Brahe of audio amplifiers but I want also to read the Kepler one !!! I feel that people like you and Cordell will help me
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Old 9th January 2007, 06:51 PM   #532
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Quote:
Originally posted by JPV
TO Nico

Normally if the thermal compensation works 100%, the current should not change with T.
If the transistor gets hot the compensation will decreases the Vbe to keep the collector current at its cold value but if mistracking then !!!

This may be true for a computer simulation.
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Old 9th January 2007, 07:04 PM   #533
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Quote:
Originally posted by JPV
TO Nico

Normally if the thermal compensation works 100%, the current should not change with T.
If the transistor gets hot the compensation will decreases the Vbe to keep the collector current at its cold value but if mistracking then !!!

TO andy_c and Bob Cordell

In my reply of a few days ago I summarised my understanding and interpretation of Oliver'paper on output impedance variation with ic ,Rc and Io where ic is the variational part of the collector current and Io is the bias current Rc is the emitter resistor.
It looks like a large Io will decrease the peak variation of Rout with ic ( so the distortion) for RcIo optimal ie 13<RcIo<26mV.
But a large Io will increase the window of currect where Rout is varying. When ic decreases, Rout starts to vary under ic<4 x Io.

My question is then : Am I right? and Many transistors in // should allow to keep each transistor at low Io ( narrow window) and small peak of Rout because // . It should also be interesting to have your comments on Oliver's diodes.
The stability of Io with T is paramount. If a burst of power is followed by low level signal and T tracking is lagging, then RcIo will be not optimal and a distortion burst will be created. Is this not a cause of so called solid state sound. The diodes in the thermatrack Motorola transistor should be efficient but how to test this in a transient way?

andy-c, I thank you for the info. I am in the process of studying a Home theatre system for my home. I intend to use S. Linkwitz open baffles concept because it make a lot of sense. I will need more than 20 amplifiers for this and I have to make them.
I am back to study electronics and my next move will be spice ( LTspice). I will definitely follow your advice. I am reading Self's book. I find him ( and Spice ) the Tycho Brahe of audio amplifiers but I want also to read the Kepler one !!! I feel that people like you and Cordell will help me

Regarding the thermal tracking, what you have described is slightly over-simplified. This is because there are at least three time constants at work: that of the heat sink, measured in minutes, that of the device package, measured in seconds, and that of the die, measured in milliseconds. Usually the thermal sensing junction will be attached to the heat sink. If it is set to neither over-compensate or under-compensate, it will properly correct for the heat sink variation over the long term. The only remaining relative delta T to be at work is then the delta T between heat sink and package and package to die. In this situation, the devices will run hotter with added signal dissipation, but will presumably settle down to the right value after a couple seconds. Sometimes people will set the overall heat-sink-related correction loop to be slightly over-compensated to correct for some of this. This can result in momentary under-bias after higher dissipation intervals. It is easy to see that, with three time constants at work, there is no perfect compromize in a dynamic sense. This is the problem.

I covered some of this briefly in my MOSFET amplifier paper on my web site at www.cordellaudio.com. There I showed bias current as a function of time after a high-power audio signal interval was terminated for both a bipolar design and a MOSFET design.

Some have attempted to mitigate this dynamic thermal tracking problem by attaching the sensing junction to a power transistor case, while another possible improvement would be the use of the ThermalTrak transistors.

Many transistor pairs in parallel, each with its own RE, and with that RE set near the optimum voltage drop, will definitely improve matters, since the amount of impedance that can vary as the stage goes through crossover will be much smaller. With that as a given, higher total bias current, while adjusting RE to keep the optimum voltage across it, will further reduce distortion, but at the expense of thermal bias stability.

Bob
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Old 9th January 2007, 07:41 PM   #534
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Some practical results of Bob's example : Six mosfets in parallel, error correction, all devices on common copper prism ( both " error and temperature transistors at prism - not only one, like Bob recoment ) : bias setting by ambient temp 20 C - 250 mA . Ten seconds full power ( 100 W ), current rise at value cca 260 mA, but very quickly fall at 250 mA. By long time loading on half power, temerature at all prism rise on cca 60C. Quinscent current fall down only 5 %. Distance between power and sensing transistor is 20 mm, power transistors aren't insulated from prism, sensing transistors at TO 126ML case. By my opinion it all is excelent result...
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Old 9th January 2007, 08:15 PM   #535
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Quote:
Originally posted by andy_c
I think the results of such an analysis would be much more interesting and informative than Nelson's persistent, yet subtle threadjacking attempts.
I will spare you my further involvement.

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Old 9th January 2007, 08:34 PM   #536
MikeW is offline MikeW  United States
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Quote:
Originally posted by andy_c


Hi JPV,

I agree that the Oliver paper is somewhat confusing. He derives some formulas but does not reach a clear conclusion about the optimum bias in my view. If you've read Self's writings on this subject, he reaches some much more specific conclusions. Namely, for several emitter resistor values, he specifies an optimum bias. But he bases that on the variation in the slope of Vout vs. Vin for the EF stage. This in turn depends on the load used. Oliver's approach seems more general, as looking at the output impedance variation removes the load as a variable. If you're using LTSpice and have some good models for the output stage transistors, you can duplicate Oliver's approach numerically by using the undocumented LTSpice d() function that takes the derivative. By applying a DC-swept current source to the output and computing the derivative of Vout with respect to the applied current, you can get a graph of the variation of incremental DC output resistance with current. You'll find that the bias that optimizes the output resistance variation also agrees with Self's optimum bias values. So it's just two different ways of looking at the same thing. This was discussed a while back in this thread. See my web page for the updated models of the MJL3281A and MJL1302A.

With FETs, you won't see an optimum bias. Rather, the output impedance variation gets less and less bad as the bias is increased. But if error correction is used, I suspect the situation would change dramatically for the better. I have not verified this in sim, but there are models of Bob's error correction amp output stage in that particular thread that could be used to easily check this.

I think the results of such an analysis would be much more interesting and informative than Nelson's persistent, yet subtle threadjacking attempts.
I do not see a Douglas Self section in this forum. Maybe you should build something and listen instead of modeling? Listen to Mr. Pass maybe you will learn something.
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Old 9th January 2007, 08:51 PM   #537
moamps is offline moamps  Croatia
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Quote:
Originally posted by andy_c
I think the results of such an analysis would be much more interesting and informative than Nelson's persistent, yet subtle threadjacking attempts.
Andy, with all due respect, this was totally uncalled for.

Regards,
Milan
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Old 9th January 2007, 09:30 PM   #538
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Quote:
Originally posted by andy_c


..........................
I think the results of such an analysis would be much more interesting and informative than Nelson's persistent, yet subtle threadjacking attempts.

hahahaha.................

you really show him where his place is!!!!




(that must be in connection with fact that English is your native......)
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Old 9th January 2007, 10:05 PM   #539
andy_c is offline andy_c  United States
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Quote:
Originally posted by Nelson Pass
I will spare you my further involvement.
Nelson, I apologize for my comment. I was out of line.
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Old 9th January 2007, 10:48 PM   #540
JPV is offline JPV  Belgium
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Hi andy_c

I looked at your thread and have seen your graphs.
This is great. It seems that a simulation ( yours), a calculation ( Oliver) and tests ( Self) are showing the same trend.

My question is about your graph: why is the trend at high current not R=0,22 because hib ( 1/gm) is then very low?
Seeing this in linear scale is also surprising. What I said on narrow window doesn't make sense.

Mr Cordell

I understand of course the thermal dynamic problem. I though I showed my concern. A question is : is the thermal lag effect creating a lot of "transient distortion" ? What is the weigth of this effect in the overall aural perception?


Mr Pass

I have VERY good burgundy in my cellar in Brussels. If you ever PASS by you are welcome

JPV
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