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Old 25th February 2009, 04:38 PM   #101
AndrewT is offline AndrewT  Scotland
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10mA through a V rated k170/j74 is no problem IF YOU KEEP A SENSIBLE LIMIT ON PD of each FET.

i.e. Vds must be low. Do you need to consider changing the voltage coming from a cascode?

Output currents affect the voltage drop over the BJT emitter resistors.
This in turn sets the FET currents. It is the FET currents that should be matched. But the schematic does not show appropriate resistors to do this setting up, hence the distortion adjustment.

It seems my explanation was not appreciated, you missed the message contained therein.
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Old 26th February 2009, 02:21 AM   #102
HKC is offline HKC  Hong Kong
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Quote:
Originally posted by gk7
2nd try.

I have slightly increased the drain resistors and made the collector resistor of one BJT adjustable (12.5 - 32 Ohms) to adjust the output stage for equal currents through both BJTs.
Resistor brand: Vishay-Dale CMF-55-143 (good ? not good ?)
Currents: approx. 10mA for each FET (more ? less ?)
approx. 27mA for each BJT (they will dissipate 0.45W each, should be ok with small heatsinks).
Please comment, especially on the current through the FETs ...

I use a 1K trim pot to replace R2 or R3 to adjust the offset voltage at the output.
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Old 26th February 2009, 07:54 AM   #103
gk7 is offline gk7
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Quote:
Originally posted by AndrewT
10mA through a V rated k170/j74 is no problem IF YOU KEEP A SENSIBLE LIMIT ON PD of each FET.

i.e. Vds must be low. Do you need to consider changing the voltage coming from a cascode?

Output currents affect the voltage drop over the BJT emitter resistors.
This in turn sets the FET currents. It is the FET currents that should be matched. But the schematic does not show appropriate resistors to do this setting up, hence the distortion adjustment.

It seems my explanation was not appreciated, you missed the message contained therein.

Hi Andrew,

your input certainly was appreciated but I think your explanaition has some flaws.

Let me explain how this circuit works:

The FETs are complementary differential pairs. One could feed them
by a current source for each pair connected to their sources to
set their current, like it is done in most other circuits of this type.
But because the sources of the upper FETs are
at a (small) positive and the lower ones at a (small) negative voltage,
a simple resistor will do. The value of this resistor sets the current
through it. This was first used by John Curl and is one
of the points that make this circuit so elegant.
This resistor is the pot R1 (50 Ohms) in my schematic. This is where
the current through the FETs is adjusted.
The current through the FETs defines the voltage across the drain resistors
(R1, R2). This voltage in conjunction with the emitter resistors of the
BJTs (R4, R5) sets the current through the output stage.
For 10mA through each FET and an estimated 0.6V base-emitter voltage for
the BJTs it would be approx. (10mA * 113 Ohm - 0.6V)/20 Ohm = 26.5 mA
The BJTs work like constant current sources to each other, this is why
this type of circuit is a transconductance amplifier (converts input voltage to output current).
If the two halves of the circuit are not perfectly identical (which is
likely because unfortunately no perfect complementary devices exist)
one could adjust the current through the output stages in two ways:
Adjust one drain resitor and thus the voltage the corresponding BJT sees
on itīs gate (this is what HKC did) or adjust the emitter resistor of
one BJT (like in my schematic).
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Old 26th February 2009, 07:58 AM   #104
gk7 is offline gk7
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"the voltage the corresponding BJT sees
on itīs gate" should read "the voltage the corresponding BJT sees
on itīs base" of course. Sorry for the typo.
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Old 26th February 2009, 08:40 AM   #105
gk7 is offline gk7
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Default another typo

"The current through the FETs defines the voltage across the drain resistors (R1, R2)." - it should read R2 and R3
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Old 26th February 2009, 02:00 PM   #106
gk7 is offline gk7
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Default more corrections / additions

The approximation for the current of the output stage is not
really exact. It would be ok if we would not have a folded
cascode. With the folded cascode the current for the right
device of of a FET pair goes through the emitter resistor too.
For low FET currents and high currents through the bipolars
the approximation would probably be close enough, but to
be close to the original circuit I would want relatively high
current for the FETs. Maybe I will have to increase the
drain resistors further (or the FET current to approx. 12mA)
to have enough current through the BJTs (25 mA per device).
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Old 26th February 2009, 04:34 PM   #107
AndrewT is offline AndrewT  Scotland
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Hi,
the 50r sets the total current through the FETs.
There is no way to check how much of that current goes either side of the FET LTPs.

If IMD = intermodulation distortion adjustment then it shows that the designer has recognised the need to balance the currents in the two halves of the LTP.
It also appears that having been aware that the currents needed to be balanced, he did not want to insert extra resistors in his circuit to enable monitoring of the effectiveness of the balance.

You seem to have completely missed this point.
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Old 27th February 2009, 07:42 AM   #108
gk7 is offline gk7
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Quote:
Originally posted by AndrewT
Hi,
the 50r sets the total current through the FETs.
There is no way to check how much of that current goes either side of the FET LTPs.

If IMD = intermodulation distortion adjustment then it shows that the designer has recognised the need to balance the currents in the two halves of the LTP.
It also appears that having been aware that the currents needed to be balanced, he did not want to insert extra resistors in his circuit to enable monitoring of the effectiveness of the balance.

You seem to have completely missed this point.

Do you refer to the same part numbers as I do ? I have attached the schematic again.
Yes the 50R pot (R1) sets the current through the complementary differential FETs, nothing else. If you donīt believe me, Erno Borbely has an excellent description of this circuit on his website you might want to read.
The "IM Balance" in the other circuit is a later addition of Tom Colangelo to John Curls original circuit. If "IM Balance" really means "IMD Adjustment" like you interpret it - Iīm not sure. Certainly it adjust the current of one half of the BJT output stage not the current through the FETs. (Which is set by the current source located between their sources).
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Old 27th February 2009, 09:48 AM   #109
AndrewT is offline AndrewT  Scotland
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I do believe you.

But, you are looking at the circuit from the wrong direction.

The voltage across R2= Q5Vbe+ V{r4//[r8+r9]}
The quiescent current in Q5 directly affects the quiescent currents in Q1 & Q2.

The ratio of R2 : r4//[r8+r9] affects the balance of currents in Q1 & Q2.
It is this balance that cannot be measured with the existing circuit. I think that's why the designer is using the IMD adjustment.
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Old 27th February 2009, 10:36 AM   #110
gk7 is offline gk7
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Quote:
Originally posted by AndrewT
I do believe you.

But, you are looking at the circuit from the wrong direction.

The voltage across R2= Q5Vbe+ V{r4//[r8+r9]}
The quiescent current in Q5 directly affects the quiescent currents in Q1 & Q2.

The ratio of R2 : r4//[r8+r9] affects the balance of currents in Q1 & Q2.
It is this balance that cannot be measured with the existing circuit. I think that's why the designer is using the IMD adjustment.
You mentioned an article (from D. Self I believe) where he describes how this would have an influence on intermodulation distortion.
Do you have a link to this article ?
BTW John Curl, who designed the original circuit, does not use that adjustment, but the line modules of my ML-1 (sealed in epoxy so we will never know for sure what is actually in them) have a second pot. I just guessed that it might have a similar purpose like in the ML-2 frontend (which is a John Curl design modified by Tom Colangelo).

Yor equation R2= Q5Vbe+ V{r4//[r8+r9]} is certainly correct, but I still believe that its the other way round: The quiescent current in Q1 directly affects the quiescent current in Q5. (The voltage through R2 is set by the current source of the LTPs and with both inputs of a differential amplifier at 0 V (no signal condition) the currents through both halves should be equal, no ?)
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