Spice simulation

Hello, just woke up.

That looks like a legitimate class AB amp distortion profile. To get rid of that slant, you can measure the voltage across caps in the simulation which show large LF drift, and replace them with voltage sources. Another way is to make the coupling caps 1GF; I prefer this when I can remember to do it. But before all this you should use the Hann windowing. It's not that the Hann window is less accurate than Rectangular (LTSpice default), it's that the Rectangular window is horribly inaccurate for audio. So anyone still reluctant to window their FFT, take note.

The Hann window should clear up the noise floor, but if the drift is large enough the slant will still overcome the harmonics. In this case replace coupling caps and any caps that can cause signal drift with 1GF values.

Hope this helps.
 
What I found last night was I needed to do a lot more periods to get the resolution I am expecting. At least 1000 cycles. That helped a lot. I compared several windows. I am most familiar with Hamming. I looked at Hann, and Blackman as well. They all changed the slope but the actual harmonics stayed within half a dB, so the measurements were not effected much. In SoundEasy measurement system, no window is preferable, in TrueRta, Hamming is preferable. This suggests it is quite dependent of the code. I prefer the resolution on square window, it was the slope that I know is not real that had me worried. Straight lines in a log plot are a warning! You are right in the Hann giving the most believable looking trace.

It took a bit to get all the config screens matched up so your suggested parameters worked. Changing the screen is a lot quicker than changing the config boxes. Neat trick, plus it documents on the drawing how it was tested.

This particular circuit has no coupling caps. One Miller comp and one in the feedback to set the LF. (not the original Erno design). I'll see if the feedback cap is the problem source.
 
sho-nuff
Changing the LF cutoff in the feedback removed the slope. 100uF to 100F. I would never have guessed that. I can cut the cycles down to about 100 and still get enough points in the low side to be believable, or at least what I expect from using old analog analyzers back in the day.

My biggest impediment now is lack of models for modern transistors. Some things I guess are only possible on the bench.
 
results
 

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It is almost always the signal DC coupling caps, as they always have the longest time constant in a power amp.

You need 1000 cycles because that is how long it takes for the DC drift to mature into a recognizable signal by the FFT.

Are you using my Ampsim2.asc file? Just copy the directives and circuit nodes (Vin, Vout) to the right places in your schematic, and there will be no need for filling in dialogues, it just works out of the box.

http://www.diyaudio.com/forums/software-tools/101810-spice-simulation-23.html#post2932189

Furthemore, this post makes it pretty clear what FFT windows you have to choose from, and which will be most accurate. The Rectangular window gives good resolution, but with reasonable simulator settings it's not an improvement, you don't need to see in between the harmonics.

http://www.diyaudio.com/forums/soft...ettings-inconsistent-results.html#post2938143

Attached is the FFT for my current simulation. This one has more DC drift than usual. Must fix that somehow.
 

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Amplifier stability and Bode plots.

I am using LTSpice. It is rather handy as it already gives both voltage and phase in the AC analysis. What I am interested in is playing with different compensation methods in an amplifier. Let's take a traditional long tail pair differential input. Feedback is returned to the negative side. My assumption is that I should be looking at the difference in phase between the signal at the positive node and comparing that to the negative node. I want as little deviation as possible. ( a perfect amplifier returning a perfect copy and no need for correction) I need less that 40 degrees by the time the gain has fallen off to one. When I have done this, sometimes the simulation of a square wave shows instability. Is either my logic or understanding of stability in error?
 
Looking at "loopgain2.asc" in the Examples directory in your LTSpice folder will give you a method for plotting open-loop phase margin. Most people prefer a phase margin of 80 degrees, or an open-loop unity phase of 100 degrees. (I've heard of the 40 degree figure, but I think it is either a mistake or it was taken out of context)

Smaller phase margins tend to cause overshoot in the square wave response, and more risk of anomalous oscillation. However the phase margin changes with loading, so you will need to look at phase margin with a number of different loads.

If you want a masterful example of stability compensation, look at Symasym.
 
Amplifier stability and Bode plots.

I am using LTSpice. It is rather handy as it already gives both voltage and phase in the AC analysis. What I am interested in is playing with different compensation methods in an amplifier. Let's take a traditional long tail pair differential input. Feedback is returned to the negative side. My assumption is that I should be looking at the difference in phase between the signal at the positive node and comparing that to the negative node. I want as little deviation as possible. ( a perfect amplifier returning a perfect copy and no need for correction) I need less that 40 degrees by the time the gain has fallen off to one. When I have done this, sometimes the simulation of a square wave shows instability. Is either my logic or understanding of stability in error?

Closing a big loop can make the Bode plot appear stable, maybe it isn't.
You should only ever blindly close small local loops of one pole or less.
If there could be more than one pole, it might oscillate.

The easy way to break a loop (and you might have loops inside loops to
test for stability too), maybe not the right or best way, is put 999MegH
simulated inductor into the feedback path. This cuts off all but DC.

Now you can see the output, and tell if amplitude is below unity before
phase rolls completely around. And you probably want some 60 or more
degrees of safety margin... But more will needlessly hurt performance.

I've seen the right way to do this, but still have no understanding of it.
My inductor is a cheat, and will make low frequency appear to roll phase.
Just remember that low roll it isn't really there, you can ignore it...

-----

I am comping an input pair with a capacitively coupled positive feedback
from the opposite collector, called "neutralization". This is a trick to make
Miller capacitance dissapear, so that your dominant pole somewhere else
is acting alone, and not rolling phase cumulatively with the input pair...

In each transistor there is parasitic capacitance from collector to base.
You add an external cap (almost same amount) from base to the other
side of the LTP's collector. Not too much, else you make another fine
oscillator....

I am not a fan of setting the dominant pole's corner just above 1KHz,
and then test for distortion at 1KHz, the sim fakes too low distortion.
Well, its real, bit only for low frequencies... Your distorion is inverse
to how much open loop gain you can afford to throw away in closing.
You have worse distortion than you might imagine at the high end,
cause the open loop gain is rolling away at -6 or -12dB while there
are still more than 4 octaves to be covered.

Mind you, this plot is inverting, so 180 is straight up...
 

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Reason gain went up is that you changed the configuration of the output stage
from A+B to class AB. The big transistors used to be OFF through zero crossing.
The crossing was driven at known current in Class A by BD139/140 exclusively.
Now there is 30dB more crossing (and open loop) gain, but nothing to prevent
thermal run-away.

I am a thankful the finals added gain changed the stability picture so little.
Was a bit concerned that once those outputs conduct, it might be different.
Can see now, I had nothing to worry about. We still need look at condition
where only one side is On, and the other Off. Try a DC offset or something...

Distortion should sim less with AB's added gain and smooth crossing. But you
can't bias a hot output that way without adding parts to watchdog the current.
Emitter resistors at the very least....

I put back to class A+B and observe the open gain hasn't changed at all.
I'm not saying it distorts less in this class, definitely not. Just saying the
open loop gain change you observed, had nothing to do with my 999H being
different (gainwise) than your 100K + 1u + E (Voltage Dependant Voltage).
 

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Looking at "loopgain2.asc" in the Examples directory in your LTSpice folder will give you a method for plotting open-loop phase margin. Most people prefer a phase margin of 80 degrees, or an open-loop unity phase of 100 degrees. (I've heard of the 40 degree figure, but I think it is either a mistake or it was taken out of context)

Smaller phase margins tend to cause overshoot in the square wave response, and more risk of anomalous oscillation. However the phase margin changes with loading, so you will need to look at phase margin with a number of different loads.

If you want a masterful example of stability compensation, look at Symasym.

Even 60 degrees of phase margin is OK, IF it is real (meaning SPICE is really capturing and modeling properly all of the sources of excess phase in the real world). Chapeter 4 in my book "Designing Audio Power Amplifiers" covers a lot of this and has a useful plot, 4.10, that shows gain peaking and overshoot as a function of phase margin for a typical arrangement.

Very importantly, gain margin must also be good in order to achieve an amplifier with robust stability. One should have at least 6 dB of gain margin, meaning that the loop gain has fallen to -6dB by the time the phase reaches 180 degrees. Sometimes a designer will inadvertantly do something to a circuit to improve phase margin that only lessens gain margin, and this can be dangerous.

Cheers,
Bob
 
You're right Ken, my mistake. I thought something was off...

It seems nice to have textbook geometric response curves. While marginal phase margins can offer extra bandwidth and low HF distortion, they generally result in overshoot or ringing, even if very slight. This quality is known as phase-linearity, AKA constant group delay. You can add this to the long list of potential design objectives... Few people talk about it though.

I wonder if more than 6db gain margin is needed. After all, under heavy loading, gain can change more than 6db. BJTs can be a lot faster, especially outputs, at higher currents, and more at risk for oscillation.
 
In conflict of poles, wonder why so many aim for the slowest make it even slower?
If you instead speed one up, the other automagically becomes dominant. There is
much to be said for an open loop gain that can truly cover the whole audio range.

Compensation by a stOOpid slug that kicks in at 1K or worse, this is gonna ruin
any chance for a similar low closed loop distortion at 20KHz. Won't see the prob
in .FOUR passes run at 1KHz, as this is below the usual slug's knee anyway.
 
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