Re: Simulators
Hi Edmond and glad to meet you
Of course the simulators aren't uselles. Moreover this evidence their existence from alone. Personally me, i have occupied for 1 to 2 years with these and as i wrote in my post i use these in some measurements to avoid the tiring replacement of resistors untill i have success in my project. My philosophy it is that: For so small size projects such as the audio devices which is the subject of this forum why we need an extensive spice simulation? On the other hand, in big projects such aerodynamics the simulation it is needfull because the cost of materials used is very big for making experiments. For a small thing such an amplifier we can draw the theoretical scheme, we can compute approximatelly the values of resistors and thus the currents, we can make a prototype board and with the aid of an oscilloscope we can finally to finish our project by testing it by changing the values of few resistors and maybe one or two caps. We don't have to discover a new thing. All the topologies are shared in all of people. A big changing can be done only if someone factory of semiconductors discovers a new material with better capabilities from the silicon doppings. Personally i am with you who read books and books and i test everything new because my big curiosity. But i have an objection; a thread started for a discussion and oppinions about a concret subject, it becames (as usually happens in this forum) in exchanges of data between the members - also me am not excluded from such situations - and the debate that placed in the begining J. Curl has lost its mean between so much pages inluding endless lists of spice elements data exchanged via the vast majority of posts. You can understand my place? I had a little long time to read the forum because other obligations and surprisingly i read this thread as permanent with a subject about it i have a view. What can i firstread into this babel of posts?
I ask the comprehension of all the obvious educated persons in this thread
With respect to you and your knoweledge
Fotios Anagnostou
Edmond Stuart said:
Hi Edmond and glad to meet you
Of course the simulators aren't uselles. Moreover this evidence their existence from alone. Personally me, i have occupied for 1 to 2 years with these and as i wrote in my post i use these in some measurements to avoid the tiring replacement of resistors untill i have success in my project. My philosophy it is that: For so small size projects such as the audio devices which is the subject of this forum why we need an extensive spice simulation? On the other hand, in big projects such aerodynamics the simulation it is needfull because the cost of materials used is very big for making experiments. For a small thing such an amplifier we can draw the theoretical scheme, we can compute approximatelly the values of resistors and thus the currents, we can make a prototype board and with the aid of an oscilloscope we can finally to finish our project by testing it by changing the values of few resistors and maybe one or two caps. We don't have to discover a new thing. All the topologies are shared in all of people. A big changing can be done only if someone factory of semiconductors discovers a new material with better capabilities from the silicon doppings. Personally i am with you who read books and books and i test everything new because my big curiosity. But i have an objection; a thread started for a discussion and oppinions about a concret subject, it becames (as usually happens in this forum) in exchanges of data between the members - also me am not excluded from such situations - and the debate that placed in the begining J. Curl has lost its mean between so much pages inluding endless lists of spice elements data exchanged via the vast majority of posts. You can understand my place? I had a little long time to read the forum because other obligations and surprisingly i read this thread as permanent with a subject about it i have a view. What can i firstread into this babel of posts?
I ask the comprehension of all the obvious educated persons in this thread
With respect to you and your knoweledge
Fotios Anagnostou
anatech said:
Having almost forgotten about this, I finally emailed Ron Mancini, of Texas Instruments, who did an article for EDN about spice models, which is here: http://www.edn.com/article/CA633459.html , giving him the basic idea, and the link for this thread, and asking him whom I should contact, to encourage that this be done, etc etc.
I will let you know, if I receive a reply.
Re: Re: Simulators
Hi Fotios,
Let me try to explain the history of how this thread came about.
A few months ago, several members of the forum found that many of the threads they were participating in kept getting derailed by discussion of various SPICE topics. The idea came up of having a sticky thread devoted to SPICE tips and tricks, SPICE model development, requests for models and general SPICE help. This idea was brought up to one of the moderators, who agreed to make a sticky thread. One (or maybe more) of the moderators removed some SPICE-specific posts from several different threads that were going on at the time, and combined them to form the beginning of this thread. John's post ended up appearing first, so it looks like he started the thread, rather than what really happened.
One unfortunate side effect of this is that the first post sets the tone of the thread, making it look like it was intended as a debate about SPICE. But that was not the reason for this thread's existence at all. Basically the thread begins with an off-topic post - not exactly what someone not familiar with the situation would expect!
fotios said:
Hi Fotios,
Let me try to explain the history of how this thread came about.
A few months ago, several members of the forum found that many of the threads they were participating in kept getting derailed by discussion of various SPICE topics. The idea came up of having a sticky thread devoted to SPICE tips and tricks, SPICE model development, requests for models and general SPICE help. This idea was brought up to one of the moderators, who agreed to make a sticky thread. One (or maybe more) of the moderators removed some SPICE-specific posts from several different threads that were going on at the time, and combined them to form the beginning of this thread. John's post ended up appearing first, so it looks like he started the thread, rather than what really happened.
One unfortunate side effect of this is that the first post sets the tone of the thread, making it look like it was intended as a debate about SPICE. But that was not the reason for this thread's existence at all. Basically the thread begins with an off-topic post - not exactly what someone not familiar with the situation would expect!
off topic
Hi Fotios,
With all respect, but I disagree with you on several points:
Not all amplifiers are that small. Take for example our PGP amp, some 233 components, auxiliary circuits not counted.
There are new thing to discover. Again, take our our PGP amp: a new nested differential feedback loop (NDFL), a common mode control loop (CMCL) and a nested feedback clamp. All new, never published before. We had to test these new ideas by simulating them first. I dare to say that without a simulator, it was almost impossible to design the PGP amp.
Furthermore, some important details, like the phase and gain margin of a Miller loop, are not easily assessed with hardware. Here, a simulator comes at rescue.
And finally, it's highly recommended to capture the schematic and generate a net-list for the PCB artwork. So, it's quite logical to use the already captured schematic also for simulation. Admittedly, not all design errors will be revealed in this way, but gross errors will certainly be detected, saving you a redesign of the PCB.
BTW, opposed to designing with a solder iron and oscilloscope, designing with a simulator is an art in his own right. You have to develop a feeling when the simulator is lying, about the Early effect for example. So, what to do? Simply eliminate this effect by means of a cascode or bootstrapping.
Cheers, Edmond.
To all, sorry to be off topic.
fotios said:
Hi Fotios,
With all respect, but I disagree with you on several points:
Not all amplifiers are that small. Take for example our PGP amp, some 233 components, auxiliary circuits not counted.
There are new thing to discover. Again, take our our PGP amp: a new nested differential feedback loop (NDFL), a common mode control loop (CMCL) and a nested feedback clamp. All new, never published before. We had to test these new ideas by simulating them first. I dare to say that without a simulator, it was almost impossible to design the PGP amp.
Furthermore, some important details, like the phase and gain margin of a Miller loop, are not easily assessed with hardware. Here, a simulator comes at rescue.
And finally, it's highly recommended to capture the schematic and generate a net-list for the PCB artwork. So, it's quite logical to use the already captured schematic also for simulation. Admittedly, not all design errors will be revealed in this way, but gross errors will certainly be detected, saving you a redesign of the PCB.
BTW, opposed to designing with a solder iron and oscilloscope, designing with a simulator is an art in his own right. You have to develop a feeling when the simulator is lying, about the Early effect for example. So, what to do? Simply eliminate this effect by means of a cascode or bootstrapping.
Cheers, Edmond.
To all, sorry to be off topic.
Re: off topic
Hi Edmond,
I agree completely. The performance of new and sometimes more complex designs would be difficult to evaluate (and optimize) without SPICE. I even find it valuable for smaller designs, especially in cases where the circuit topology is a bit unusual. Although you rightly point out that we have to be careful about what we trust from SPICE and do not trust from it, it can also be very valuable in evaluating the local stability of circuits, especially when we want to insert some speculative wiring inductances.
SPICE is no substitute for building a prototype, measuring it and listening to it, but few if any here have ever suggested that. It is a very valuable tool in a tool box with numerous tools.
Cheers,
Bob
Edmond Stuart said:
Hi Edmond,
I agree completely. The performance of new and sometimes more complex designs would be difficult to evaluate (and optimize) without SPICE. I even find it valuable for smaller designs, especially in cases where the circuit topology is a bit unusual. Although you rightly point out that we have to be careful about what we trust from SPICE and do not trust from it, it can also be very valuable in evaluating the local stability of circuits, especially when we want to insert some speculative wiring inductances.
SPICE is no substitute for building a prototype, measuring it and listening to it, but few if any here have ever suggested that. It is a very valuable tool in a tool box with numerous tools.
Cheers,
Bob
Re: Re: off topic
To be more comprehensible, how much accurate can be a spice simulation for this circuit:
http://www.diyaudio.com/forums/attachment.php?s=&postid=1151427&stamp=1173212907
And below it is the spice model of it ready for you:
http://www.diyaudio.com/forums/attachment.php?s=&postid=1156551&stamp=1173773152
Edmond Stuart said:
Bob Cordell said:
To be more comprehensible, how much accurate can be a spice simulation for this circuit:
http://www.diyaudio.com/forums/attachment.php?s=&postid=1151427&stamp=1173212907
And below it is the spice model of it ready for you:
http://www.diyaudio.com/forums/attachment.php?s=&postid=1156551&stamp=1173773152
Re: Re: Re: off topic
Simulating what?
Don't let the number of trannies fool you. It's essentially a classic circuit, already analyzed to death. Even the THD (if that's what you are looking for) can be estimated by simply inspecting the schematic and having some previous data regarding the open loop THD vs. the output stage bias, for a particular set of output devices.
I think you just hit one of the simulation major traps. Relying on simulations without having some understanding of the circuit functionality is a pretty safe recipe for disaster. Simulation is a tool for the already illuminated - it may deliver (more or less precise) what you are looking for but it won't tell you straight what to look for.
fotios said:
Simulating what?
Don't let the number of trannies fool you. It's essentially a classic circuit, already analyzed to death. Even the THD (if that's what you are looking for) can be estimated by simply inspecting the schematic and having some previous data regarding the open loop THD vs. the output stage bias, for a particular set of output devices.
I think you just hit one of the simulation major traps. Relying on simulations without having some understanding of the circuit functionality is a pretty safe recipe for disaster. Simulation is a tool for the already illuminated - it may deliver (more or less precise) what you are looking for but it won't tell you straight what to look for.
Re: Re: Re: Re: off topic
The concrete circuit it is not of Hi-End classs, as i suppose that you are thinking so i am thinking for it. It is obviously armed for hard working in P.A. applications. On the contrary of your statement that it is for death, it is checked in practice and it works just fine.
In the spice model that i quote, the only that i try to estimate it is the values of static currents (because their correct values are very significant for the exploitation of the plentiful dynamics which offers this amplification arrangement) so don't be harry in your conclusions. You can calculate very easy their values with the aid of voltage drop markers in the different locations. For this purpose the spice gives by 90% correct results for practical use (because the 1% MF resistors used and only for this). Also i don't use the time domain analysis of simulator to estimate something. The only diagram which i take it is the output power level under different loads (and this is indicated satisfactory by simulation because the output load it is supposed clear resistive) so i can set the values of the output VI limitter circuit resistors summing network to place a limit down to 2 Ohms for activating it. Concretely i modify the values of resistors so the current calculated via the voltage drop accross each emitter resistor, does not exceed the 1,5A per output device so it remains into the SOA given from Motorola.
Because as i suspect you are Mosfet fun, by debate this bipolar implementation with any Mosfet (i bet anything you thing that you can get easy from me by eliminating the obstacle of distance of our places) maybe you revise your thoughts for this "paleolithic" amplification circuit "with its one foot already into the grave". In a previous thread i gave a complette documentation with curves from DSO. You can search it in the forum or in my web page. I refer only that its rise time vary between 1,3ìsec up to 100W/8Ù and 2,3ìsec up to 350W/8Ù with the Miller pole strongly compensated (limitting thus its bandwidth up to 100KHz). My experience showed me that the big power projects of class AB can beat easy each Mosfet or class A project due to its dynamics. This project it is not a toy of 2X100W.
This project also it is not a copy (a CLONE as you like to say in this forum) of the design of anyone. It is the result of my research for many years and the implementation of different topologies in one design for my concrette demands.
Finally this project because the extremely high supply voltage used (up to 170Vpp) i suggested in my thread only in skill full persons because any accidental shorting during setup can causes a big BANG! with catastrophic results so in the devices as in the PCB.
I ask your forgiveness if this reply it is off topic of the concrete thread
Fotios Anagnostou
syn08 said:
The concrete circuit it is not of Hi-End classs, as i suppose that you are thinking so i am thinking for it. It is obviously armed for hard working in P.A. applications. On the contrary of your statement that it is for death, it is checked in practice and it works just fine.
In the spice model that i quote, the only that i try to estimate it is the values of static currents (because their correct values are very significant for the exploitation of the plentiful dynamics which offers this amplification arrangement) so don't be harry in your conclusions. You can calculate very easy their values with the aid of voltage drop markers in the different locations. For this purpose the spice gives by 90% correct results for practical use (because the 1% MF resistors used and only for this). Also i don't use the time domain analysis of simulator to estimate something. The only diagram which i take it is the output power level under different loads (and this is indicated satisfactory by simulation because the output load it is supposed clear resistive) so i can set the values of the output VI limitter circuit resistors summing network to place a limit down to 2 Ohms for activating it. Concretely i modify the values of resistors so the current calculated via the voltage drop accross each emitter resistor, does not exceed the 1,5A per output device so it remains into the SOA given from Motorola.
Because as i suspect you are Mosfet fun, by debate this bipolar implementation with any Mosfet (i bet anything you thing that you can get easy from me by eliminating the obstacle of distance of our places) maybe you revise your thoughts for this "paleolithic" amplification circuit "with its one foot already into the grave". In a previous thread i gave a complette documentation with curves from DSO. You can search it in the forum or in my web page. I refer only that its rise time vary between 1,3ìsec up to 100W/8Ù and 2,3ìsec up to 350W/8Ù with the Miller pole strongly compensated (limitting thus its bandwidth up to 100KHz). My experience showed me that the big power projects of class AB can beat easy each Mosfet or class A project due to its dynamics. This project it is not a toy of 2X100W.
This project also it is not a copy (a CLONE as you like to say in this forum) of the design of anyone. It is the result of my research for many years and the implementation of different topologies in one design for my concrette demands.
Finally this project because the extremely high supply voltage used (up to 170Vpp) i suggested in my thread only in skill full persons because any accidental shorting during setup can causes a big BANG! with catastrophic results so in the devices as in the PCB.
I ask your forgiveness if this reply it is off topic of the concrete thread
Fotios Anagnostou
Re: Re: Re: Re: off topic
Hi syn08
I ask your forgiveness if i misinterpreted your phrase "already analyzed to death". I translated it as "already analyzed FOR death". I don't know English very well. If the sense of your phrasing it is indeed as i supposed, then my previous reply it is in effect.
However, many times a person state his phrase in a wrong way. So, i can suppose also that the sense of your phrase it is "already analyzed UP TO death" or "already analyzed UNTIL death". You can see that only and only one wrong word can cause a whole debate, and you can't reproach me if this is true.
In our country, we are very careful when we speak or when we write because the complexity of our language and the decuple lot of words which contains from each other language, which drive many times in ambiguous meanings. Be careful to not involved with a Greek lawyer or law!!!
From the other hand (in Greek language we say the same as "from the other side" always and this is correct; what relation has a hand with the phrasing of a phrase?) i think also that my post #507 it is not out of the topic because indeed presents a spice simulation process named "Initial Voltages Guess" if i remembered well from my EDSpice simulator.
With each respect to you, but unhesitating also for each debate with you.
Fotios Anagnostou
syn08 said:
Hi syn08
I ask your forgiveness if i misinterpreted your phrase "already analyzed to death". I translated it as "already analyzed FOR death". I don't know English very well. If the sense of your phrasing it is indeed as i supposed, then my previous reply it is in effect.
However, many times a person state his phrase in a wrong way. So, i can suppose also that the sense of your phrase it is "already analyzed UP TO death" or "already analyzed UNTIL death". You can see that only and only one wrong word can cause a whole debate, and you can't reproach me if this is true.
In our country, we are very careful when we speak or when we write because the complexity of our language and the decuple lot of words which contains from each other language, which drive many times in ambiguous meanings. Be careful to not involved with a Greek lawyer or law!!!
From the other hand (in Greek language we say the same as "from the other side" always and this is correct; what relation has a hand with the phrasing of a phrase?) i think also that my post #507 it is not out of the topic because indeed presents a spice simulation process named "Initial Voltages Guess" if i remembered well from my EDSpice simulator.
With each respect to you, but unhesitating also for each debate with you.
Fotios Anagnostou
Re: Re: Re: Re: off topic
Hi again syn08
What means "trannies"? Transistors? Please i ask from you when reply to me or to other person which does not have lived in your countries (included USA) don't use "slang" words because we don't understand and we only suppose many times wrong the sense of phrase.
Anyway, i am not crazy with the number of "trannies". I am crazy only with a safe margin of 20% further from that gives the semiconductor constructors in their datasheets, and most crazy to lowering the output impedance of the amplifier. Moreover if i had placed this project in production for sale, this would be only for small quantity. How much it is the cost for 4 trannies more and for a heatsink further by 3 cm? Only 5 Euros. So, why not?
Fotios
syn08 said:
Hi again syn08
What means "trannies"? Transistors? Please i ask from you when reply to me or to other person which does not have lived in your countries (included USA) don't use "slang" words because we don't understand and we only suppose many times wrong the sense of phrase.
Anyway, i am not crazy with the number of "trannies". I am crazy only with a safe margin of 20% further from that gives the semiconductor constructors in their datasheets, and most crazy to lowering the output impedance of the amplifier. Moreover if i had placed this project in production for sale, this would be only for small quantity. How much it is the cost for 4 trannies more and for a heatsink further by 3 cm? Only 5 Euros. So, why not?
Fotios
Re: Re: Re: Re: Re: off topic
"Analyzed to death" = Analyzed and re-analyzed all over until nothing new is to be revealed and basic information (like the bias) can be quickly calculated without any Spice help.
Example: Assume beta very large, so that IB~0 and IC~IE. The IQ3=Vbe/R3~3mA. IC4~Vcc/R11=3.7mA. Assuming the circuit is balanced, then IQ1=IQ2=IQ3/2~1.5mA IQ5=IQ1, IQ2=IQ6, etc... Same as above, IQ8~3.7mA and IQ~Vbe/R18~20mA. IQ9~IQ12 and IQ11=(Vbe+R22*IQ12)/R21~2mA Q7 is normally off. It would take much more time to draw the schematic in the capture software than to directly write this bias estimate. The same with the AC analysis, C13 defines the dominant pole, and the impedance at C13 terminals (giving the time constant, which is related to the pole frequency by f=1/(2*PI*Tau) is a textbook exercise as well.
Trannies = transistors in jargon (not "slang"). The number of trannies in parallel do not influence the amp architecture, it is only an implementation detail.
I am having fun with MOSFETs but I'm not necessary a MOSFET fan.
Anyway, your english is much better than my greek. Good luck.
fotios said:
"Analyzed to death" = Analyzed and re-analyzed all over until nothing new is to be revealed and basic information (like the bias) can be quickly calculated without any Spice help.
Example: Assume beta very large, so that IB~0 and IC~IE. The IQ3=Vbe/R3~3mA. IC4~Vcc/R11=3.7mA. Assuming the circuit is balanced, then IQ1=IQ2=IQ3/2~1.5mA IQ5=IQ1, IQ2=IQ6, etc... Same as above, IQ8~3.7mA and IQ~Vbe/R18~20mA. IQ9~IQ12 and IQ11=(Vbe+R22*IQ12)/R21~2mA Q7 is normally off. It would take much more time to draw the schematic in the capture software than to directly write this bias estimate. The same with the AC analysis, C13 defines the dominant pole, and the impedance at C13 terminals (giving the time constant, which is related to the pole frequency by f=1/(2*PI*Tau) is a textbook exercise as well.
Trannies = transistors in jargon (not "slang"). The number of trannies in parallel do not influence the amp architecture, it is only an implementation detail.
I am having fun with MOSFETs but I'm not necessary a MOSFET fan.
Anyway, your english is much better than my greek. Good luck.
Re: Re: Re: Re: Re: Re: off topic
You may don't believe that in reality i use the Spice engine for making those calculations. Of course and i make the same as you. Moreover the two currents of IcQ3 and IcQ9 defines the rise time and this can be done only by experimenting. For this architecture, the IcQ9 must be about 20mA for uniformity of signal during the negative swing in comparisson with the positive swing. This is in effect with any type of VAS transistor and any Supply level. It is de facto. For the IcQ3 there is the need of experimenting when the supply level is to be changed in conjuction with the type of transistors used in the small stages. Also may be notted that for the experiments used only square signal for a clear viewing of the variations of rise time and thus the bandwidth (frequency response). In the given circuit with the 2N5401 and the supply of +/-82V it is enough a current of 3mA to achived an acceptable average rise time of 1,8ìsec (with the Miller pole fully compensated wich is also the upper frequency pole of whole the amplifier). More current it does not offers nothing furthermore except the overheating of the LTP transistors and thus the increasing of Johnson noise. In the second case with the MPSA56 in the small signal stage and with a supply of +/-60V from my experiments proved that the corresponding current of IcQ3 must increased in 6mA to achived the same rise time as previous. Sincerelly i tried many times to simulate this condition, but the results of simulator was very different from the measurements with real instruments. From this event and after i understood the problem of Spice which is that it supposes the transistors as ideal according to the models that includes. In the real world we are not in position to find two transistors with the same beta without enough search. And the beta it is only one of the endless parameters of a spice model of a semiconductor. And be it so we can find transistors with the same parameters as the models included in the spice engine; there is any simulator with so much accuracy to calculate differences between 1,8 to 2,0 ìsec?
Anyway, i hope to have explained my position that i expressed in my first post. Furthermore thank you very much for the lesson about the jargon language. Indeed there is in the dictionary.
And again sory for the misinterpreting and the spelling errors.
Glad to meet you and good luck also to you.
Cheers
Fotios
syn08 said:
You may don't believe that in reality i use the Spice engine for making those calculations. Of course and i make the same as you. Moreover the two currents of IcQ3 and IcQ9 defines the rise time and this can be done only by experimenting. For this architecture, the IcQ9 must be about 20mA for uniformity of signal during the negative swing in comparisson with the positive swing. This is in effect with any type of VAS transistor and any Supply level. It is de facto. For the IcQ3 there is the need of experimenting when the supply level is to be changed in conjuction with the type of transistors used in the small stages. Also may be notted that for the experiments used only square signal for a clear viewing of the variations of rise time and thus the bandwidth (frequency response). In the given circuit with the 2N5401 and the supply of +/-82V it is enough a current of 3mA to achived an acceptable average rise time of 1,8ìsec (with the Miller pole fully compensated wich is also the upper frequency pole of whole the amplifier). More current it does not offers nothing furthermore except the overheating of the LTP transistors and thus the increasing of Johnson noise. In the second case with the MPSA56 in the small signal stage and with a supply of +/-60V from my experiments proved that the corresponding current of IcQ3 must increased in 6mA to achived the same rise time as previous. Sincerelly i tried many times to simulate this condition, but the results of simulator was very different from the measurements with real instruments. From this event and after i understood the problem of Spice which is that it supposes the transistors as ideal according to the models that includes. In the real world we are not in position to find two transistors with the same beta without enough search. And the beta it is only one of the endless parameters of a spice model of a semiconductor. And be it so we can find transistors with the same parameters as the models included in the spice engine; there is any simulator with so much accuracy to calculate differences between 1,8 to 2,0 ìsec?
Anyway, i hope to have explained my position that i expressed in my first post. Furthermore thank you very much for the lesson about the jargon language. Indeed there is in the dictionary.
And again sory for the misinterpreting and the spelling errors.
Glad to meet you and good luck also to you.
Cheers
Fotios
It seems to me that most of the people "contributing" to this thread are forgetting what a simulation means.
Me (I’m considering myself as being “pro” that methodology) I don’t consider the world that comes out from a simulation as being a faithful representation of the reality, so I keep the results with (some) suspicion, but I keep and I use them as a mean to get the result in a faster, safer, less costly way. My professors at University (Theoretical Physics) taught me how to evaluate first the results by hand, providing an order of magnitude, but then let me find more trustworthy results using calculators, or even computer programs.
So, please, stop discussing about the validity of the (simulation) approach !
Simulators are as good as the models they use (garbage in, garbage out).
I remember when I first tried to use Circuit Maker: it was impossible to get the correct biasing. Then I discovered why: the embedded 1N4148 model was fake, since it gave 850mV of voltage drop (this remind me what happened to me, in the real world, many, many years ago, when I used germanium diodes instead of silicium diodes ...).
So, please stop asking for and then using models whose validity is suspicious ! and then criticise the results ...
Me I’d liked to start some cooperation leading to some “machine” that, starting from experimental data, could give reliable models. Me, I could provide the mathematics, you, the community, could contribute with better knowledge (than me) about the model parameters, better measurements and so on.
Is it possible to turn all that noise into music ?
Thanks
Me (I’m considering myself as being “pro” that methodology) I don’t consider the world that comes out from a simulation as being a faithful representation of the reality, so I keep the results with (some) suspicion, but I keep and I use them as a mean to get the result in a faster, safer, less costly way. My professors at University (Theoretical Physics) taught me how to evaluate first the results by hand, providing an order of magnitude, but then let me find more trustworthy results using calculators, or even computer programs.
So, please, stop discussing about the validity of the (simulation) approach !
Simulators are as good as the models they use (garbage in, garbage out).
I remember when I first tried to use Circuit Maker: it was impossible to get the correct biasing. Then I discovered why: the embedded 1N4148 model was fake, since it gave 850mV of voltage drop (this remind me what happened to me, in the real world, many, many years ago, when I used germanium diodes instead of silicium diodes ...).
So, please stop asking for and then using models whose validity is suspicious ! and then criticise the results ...
Me I’d liked to start some cooperation leading to some “machine” that, starting from experimental data, could give reliable models. Me, I could provide the mathematics, you, the community, could contribute with better knowledge (than me) about the model parameters, better measurements and so on.
Is it possible to turn all that noise into music ?
Thanks
john curl said:
There are circuit topologies for which using some Spice help in design and analysis is saving time and effort. Some people prefer not to use such topologies, precisely because it's difficult to predict the circuit behaviour by simply inspecting the topology - and that's, to me, flat wrong. Spice is like a microscope, it shouldn't be used it as a hammer to hit nails, or to inspect the Golden Gate bridge. but for what it was designed for: inspecting bacteria and viruses.
You raised the filter design problem; indeed, some sort of CAD help for filter design is very helpful. However, I am not sure if Spice is the best tool for that. Reason is that Spice won't tell you a thing about (e.g.) filter sensistivity, unless you have the time and patience to start sweeping component values and their combinations. Filter design may benefit from using specialized software (e.g. Linear Technology's FilterCAD, really good stuff). But even for filters, some good understanding of architectures and principles is mandatory to succeed. Here's a good example of what Spice won't tell or teach you about filters: http://www.maxim-ic.com/appnotes.cfm/appnote_number/738/
My problem with simulations starts when one attempts to replace the brain with the computer screen. It is very easy to get addicted to any kind of simulations - because they show a simplified and glossy projection of reality, deceiving you with the illusion of being in control.
Good/ideal models for devices are an illusion as well. Poor models are not necessary only the result of a poor extraction job, but also because the model templates (which are mostly hardcoded in Spice, e.g. Gummel Poon for bipolars) may not be good enough for certain applications. The art is to understand the models and their limitations! Example: noise simulation. Spice has no provisions for noise analysis other than thermal noise, where it automatically inserts a voltage source in series with each resistor in the circuit. Is this good enough? Sometimes yes but mostly, to stay accurate, no: http://www.utdallas.edu/~hellums/docs/EE7331/Fall2007/DeviceNoiseModels.pdf
Hhm, what other option do we have? We can try to do the math (not at all trivial in a multi-component sensivity analysis) and get lost there for a day or two (and need to reality check the results anyway somehow), or we can build the actual circuit and swap components, record tons of values and do thousands of measurements and then do sensivity analysis "by hand", or we can burden most of the tedious work (not all, though) to SPICE and let it do the variations and measurements, and later back the accuracy of the results with some sampled test cases. IMHO, SPICEing is the only way to complete tolerance sensivity analysis with reasonable time and effort, for the engineer.syn08 said:
That's, of course, the key. SPICE cannot replace knowledge (it's a "stupid" tool, not a full blown expert system -- as of yet), but it can steepen the learning curve to get that knowledge.
- Klaus