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Old 30th June 2009, 01:00 AM   #911
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Quote:
Originally posted by G.Kleinschmidt

Sooooooo??????????

It's shameful!



Seriously, I really wasn't asking you to look Glen, just the general membership - those that read this thread. I didn't know if it had been posted before.
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Old 30th June 2009, 02:01 AM   #912
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Quote:
By Bob cordell - MOSFETs have about ten times lower transconductance at the usual modest operating currents in the crossover region than do BJTs. This leads to reduced incremental gain in the crossover region and hence distortion. The distortion created does, however, tend to be softer than that created by BJTs because the transition region is wider.
Interesting statement, Bob. I have noticed slightly higher THD with a direct replacement of BJT's with mosfets in a given topology. You say a "softer" distortion occurs at the Xover region.. what does that mean ??? Different high order distortion products ??(less H5/7).

I do not entirely trust most fet models , but would this difference be a logical "tradeoff" (softer distortion vs. slightly higher THD). In simulation we are only talking about the difference between .003% (BJT) and .006% (IRF's). Also , would these transition differences also hold true with a quasi-comp class B stage??
OS
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Old 30th June 2009, 04:15 PM   #913
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Quote:
Originally posted by ostripper


Interesting statement, Bob. I have noticed slightly higher THD with a direct replacement of BJT's with mosfets in a given topology. You say a "softer" distortion occurs at the Xover region.. what does that mean ??? Different high order distortion products ??(less H5/7).

I do not entirely trust most fet models , but would this difference be a logical "tradeoff" (softer distortion vs. slightly higher THD). In simulation we are only talking about the difference between .003% (BJT) and .006% (IRF's). Also , would these transition differences also hold true with a quasi-comp class B stage??
OS

Hi Ostripper,

You raise several very good questions.

I'm frankly surprised that you did not see a bigger increase in THD with the MOSFETs (and also wonder exactly what you mean when you say "direct replacement"). Are these THD numbers at 20 kHz into an 8-ohm load? THD-1 is much less reliable for such comparisons becasue you may have a lot of NFB at 1 kHz.

In simulation, accurate device models for crossover distortion are extremely important. Even with BJTs this is important, such as in regard to proper modelling of RB, base spreading resistance changes with current, and beta droop.

Models are even more of a problem with vertical MOSFETs, as the ordinary ones do not properly model weak inversion, and that is where you are at in the crossover region with the typical quiescent bias currents for a class AB MOSFET output stage (per device pair, 100-200 mA). The EKV model is more accurate here, but these models are not widely available for the vertical power MOSFETs we like to use. Andy_c and Edmond have put some up here.

The somewhat over-simplified MOSFET transfer characteristic behavior is described as exponential at very weak inversion (like the Ic-Vbe characteristic of a BJT) transitioning to square law at full inversion, and then transitioning to a somewhat different law at very high currents where the Rds begins to come into play. At typical quiescent class AB bias current of 150 mA, many MOSFETs are right in the middle of the transition region from exponential to square law.

The turn-on/turn-off of BJTs tends to be more abrupt than for MOSFETs, so the transition tends to be a little softer. The higher bias current typically associated with MOSFETs also broadens the crossover region. Indeed, there is no danger of ever having gm doubling effects with MOSFETs, so you can bias them as hot as you want within the thermal limitations of the design. Over-biasing BJTs gets you into gm doubling, which Self claims is just as bad as under-biasing (although I'd always rather err on the high side with BJTs).

The abrupt-ness of turn-on/turn-off for some CFP output stages is even steeper, and that I why I don't like them.

Average THD-20 readings are less than optimum for evaluating how bad crossover distortion is, since the garbage is averaged across the full cycle. Look at the peak-to-peak amplitude of the distortion residual on a scope in real time. That will give you a better idea. Of course, looking at the spectrum of the residual is even better.

Here's a thought on an approach I have not tried. Look at the ratio of class AB quiesecent bias current to peak signal current for a good vacuum tube amplifier. Use the same ratio when biasing your class AB MOSFET output stage. I suspect that this will result in a higher quiescent bias current number than we often use with MOSFETs. Maybe the sound will be better this way. Ratio of peak signal current to quiescent bias current may be an interesting metric (both for a crossover distortion view and for a thermal view).

Amplifiers that I have built with vertical MOSFETs that do not have error correction tend to have THD-20 in the range of 0.03% when driving an 8-ohm load when biased at about 150 mA. These amplifiers typically have gain crossover frequencies in the range of 500 kHz to 1 MHz, meaning they have on the order of 30 dB of NFB at 20 kHz. These distortion numbers will be higher with a 4-ohm load.

Cheers,
Bob
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Old 30th June 2009, 05:53 PM   #914
syn08 is offline syn08  Canada
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Quote:
Originally posted by Bob Cordell


Models are even more of a problem with vertical MOSFETs, as the ordinary ones do not properly model weak inversion, and that is where you are at in the crossover region with the typical quiescent bias currents for a class AB MOSFET output stage (per device pair, 100-200 mA).

The somewhat over-simplified MOSFET transfer characteristic behavior is described as exponential at very weak inversion (like the Ic-Vbe characteristic of a BJT) transitioning to square law at full inversion, and then transitioning to a somewhat different law at very high currents where the Rds begins to come into play. At typical quiescent class AB bias current of 150 mA, many MOSFETs are right in the middle of the transition region from exponential to square law.
Hi Bob,

You statements above are not enirely correct. It would be way off topic for this forum to get into the details, however:

- It is true that ordinary Spice MOSFET models do not model the subthreshold behaviour. The subthreshold characteristic is certainly important in the total distortions budget, however I would not overestimate it. The subthreshold conduction is really important for low threshold (pinch) voltage (Vt) devices like the 2SK1530/2SJ201. For high threshold devices like the IRF's, subthreshold conduction has a very limited impact, 150mA through an IRF is already far enough in the strong inversion area. However, the IRF pairs are not matched for transconductance, and here's a significant source or distortion, together with the nonlinear Cgs and Cds. The ideal MOSFET device would have low Vt, very high transconductance (this also helps in avoiding the evil subthreshold conduction area) and have a matching (for transconductance) pair. Such MOSFETs are not available today; the Toshiba pair has relatively low transconductance, while the IRF parts (or Fairchild, etc...) do not have matching pairs and are relatively high Vt devices.

- Speaking about Ciss, there's a significant difference between bipolars and MOSFETs. While the input impedance in an emitter follower can be modelled with good accuracy by a single pole (with a time constant of rb'e*Cb'e) for MOSFETs the absence of rb'e leads to a pretty messy situation; the impedance has to be modelled as a pole-zero pair, and Rs (the source resistor) plays a significant role in determining both the real part and the imaginary part of the input impedance. This, combined with the limited transconductance of MOSFETs, makes them more difficult to be (AC) controlled by the driver stage. While for bipolars the finite output impedance of the driver has only a shifting effect on the input impedance pole, for MOSFETs it's more complicated, both the pole and the zero are moving around. As a result, for the same level of degeneration in the source/emitter, and at the same gm, the MOSFET input impedance can be more nonlinear than the bipolar input impedance. "Can be" because the nature of the MOSFET Cgs is different (and can be smaller) to the bipolar diffusion capacitance that dominates Cb'e. Also, the variation of the Cds with the voltage is usually less nonlinear than the bipolar Cb'c

One to another, I'm afraid we don't have enough general criteria to compare (in terms of performance) MOSFETs and bipolars as output power devices. Due to the significant number of variables, it's very hard to compare even MOSFET pairs! However, by looking at the today's market, with Toshiba the single source of a pair of power MOSFETs intended for linear applications, I would say that the future (in audio) belongs to the power bipolars.

A final comment: at high currents, the transconductance drop in MOSFETs is not due to some parasitic Rds. The problem is in the MOSFET physics foundation. At high current densities in the channel, the carriers (say, electrons) start interacting with each others and as a result their mobility decreases/saturates. The MOSFET transconductance is proportional with the mobility, therefore kinda "Rds" impact at high currents. This effect can be accurately modelled as a nonlinear Rds (depending on Id) but usually a "lambda" parameter is used in the Id-Vgs equation. The nonlinear Rds model illustrates why mobility saturation has an impact on the distortion performance of MOSFETs. BTW, bipolars don't have such an issue, and again comparing the beta drop with a nonlinear Rds is, having completely different physics origins, very difficult.
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Old 30th June 2009, 09:43 PM   #915
cbdb is offline cbdb  Canada
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Default Thermal simulation

Quote:
I think that the thermal aspect is not so easy to simulate.
Has anyone else played with

.step temp list t1 t2 t3 ...

which runs the sim at the different tempretures?

I realize it runs the whole cct. at the given temp which is unrealistic, but it must give some idea of bias current, CCS variations. (If the models are good, I ran a few transistors thru a Beta test cct. and the odd one dosnt vary the beta very much from 0 to 100 degrees). Any comments would be appreciated.
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Old 1st July 2009, 01:30 AM   #916
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Quote:
Originally posted by syn08


Hi Bob,

You statements above are not enirely correct. It would be way off topic for this forum to get into the details, however:

- It is true that ordinary Spice MOSFET models do not model the subthreshold behaviour. The subthreshold characteristic is certainly important in the total distortions budget, however I would not overestimate it. The subthreshold conduction is really important for low threshold (pinch) voltage (Vt) devices like the 2SK1530/2SJ201. For high threshold devices like the IRF's, subthreshold conduction has a very limited impact, 150mA through an IRF is already far enough in the strong inversion area. However, the IRF pairs are not matched for transconductance, and here's a significant source or distortion, together with the nonlinear Cgs and Cds. The ideal MOSFET device would have low Vt, very high transconductance (this also helps in avoiding the evil subthreshold conduction area) and have a matching (for transconductance) pair. Such MOSFETs are not available today; the Toshiba pair has relatively low transconductance, while the IRF parts (or Fairchild, etc...) do not have matching pairs and are relatively high Vt devices.

- Speaking about Ciss, there's a significant difference between bipolars and MOSFETs. While the input impedance in an emitter follower can be modelled with good accuracy by a single pole (with a time constant of rb'e*Cb'e) for MOSFETs the absence of rb'e leads to a pretty messy situation; the impedance has to be modelled as a pole-zero pair, and Rs (the source resistor) plays a significant role in determining both the real part and the imaginary part of the input impedance. This, combined with the limited transconductance of MOSFETs, makes them more difficult to be (AC) controlled by the driver stage. While for bipolars the finite output impedance of the driver has only a shifting effect on the input impedance pole, for MOSFETs it's more complicated, both the pole and the zero are moving around. As a result, for the same level of degeneration in the source/emitter, and at the same gm, the MOSFET input impedance can be more nonlinear than the bipolar input impedance. "Can be" because the nature of the MOSFET Cgs is different (and can be smaller) to the bipolar diffusion capacitance that dominates Cb'e. Also, the variation of the Cds with the voltage is usually less nonlinear than the bipolar Cb'c

One to another, I'm afraid we don't have enough general criteria to compare (in terms of performance) MOSFETs and bipolars as output power devices. Due to the significant number of variables, it's very hard to compare even MOSFET pairs! However, by looking at the today's market, with Toshiba the single source of a pair of power MOSFETs intended for linear applications, I would say that the future (in audio) belongs to the power bipolars.

A final comment: at high currents, the transconductance drop in MOSFETs is not due to some parasitic Rds. The problem is in the MOSFET physics foundation. At high current densities in the channel, the carriers (say, electrons) start interacting with each others and as a result their mobility decreases/saturates. The MOSFET transconductance is proportional with the mobility, therefore kinda "Rds" impact at high currents. This effect can be accurately modelled as a nonlinear Rds (depending on Id) but usually a "lambda" parameter is used in the Id-Vgs equation. The nonlinear Rds model illustrates why mobility saturation has an impact on the distortion performance of MOSFETs. BTW, bipolars don't have such an issue, and again comparing the beta drop with a nonlinear Rds is, having completely different physics origins, very difficult.

Hi Syn08,

I know you really know your stuff when it comes to semiconductor physics, but I don't think my statements you quoted are far off. First, my main point was that models are a serious problem for MOSFETs and I don't think you will disagree with that.

I have measured detailed Ids vs Vgs on many MOSFETs and I can tell you for sure that the error in the range of 150 mA for devices like the IRFs is real, as a result of the poor modeling of the weak inversion region and the transition to square law.

I have also simulated MOSFET output stages using EKV and conventional models and there are substantial differences is XO behavior. I think you are really underestimating this effect and the importance of it.

As I said in my post, the explanation I put forth for the MOSFET transfer characteristics was over-simplified, but it is usefully accurate for conveying essentially what is going on. BTW, I did not mean to imply that the Rds I mentioned was some kind of lumped parasitic resistance.

I did not touch on the issue of capacitances, but that is certainly a whole 'nother area of interest and concern. It is one that depends very much on the details of the driver, however. People regularly underestimate the deleterious effects of the large and highly nonlinear capacitance of the BJT BE junction. MOSFETs may not be the piece of cake that some people think they are to drive, but they are generally easier to drive than BJTs.

A key to driving the MOSFETs is to avoid tendencies to parastic oscillations. With equivalent ft's of over 100 MHz that increase with current, they are more prone to oscillate than BJTs without extra care in the drive circuit design.

It is true that there is not nearly as much availability of well-matched P and N MOSFET pairs, and that does put them at a disadvantage. At the same time, BJTs are here to stay and continue to improve. The ThermalTrak BJTs are really great.

Cheers,
Bob
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Old 1st July 2009, 01:50 AM   #917
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Quote:
Originally posted by Bob Cordell
I have measured detailed Ids vs Vgs on many MOSFETs and I can tell you for sure that the error in the range of 150 mA for devices like the IRFs is real, as a result of the poor modeling of the weak inversion region and the transition to square law.

I have also simulated MOSFET output stages using EKV and conventional models and there are substantial differences is XO behavior. I think you are really underestimating this effect and the importance of it.
Hi Bob,

I can't really claim I measured lots of MOSFETs, but I did make lots of measurements (including some statistics) on the Fairchild FQA19N20 (similar to IRFP240). The subthreshold region always ends at about 75mA. Over 50-75mA, the devices are fully into the square law region, up to about 1.5A where the mobility degradation becomes significant.

I can confirm that the Toshiba 2SK1530/2SJ201 pair, having low threshold voltage and limited transconductance, is much more affected by the subthreshold conduction than the Fairchild of IRF pairs. For these devices, 150mA for the square law region is a safe bet and an EKV model is really required to get accurate (as much as possible) simulation results. Andy did a very good job on these devices.

I have never seen good/consistent EKV models for IRFP and FQA devices, but I doubt they would bring much to the table in terms of accuracy. If you are aware of any, I would appreciate a link.
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Old 3rd July 2009, 09:51 PM   #918
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Hi John,

I believe I could implement Bob's "PIM" measurement in LtSpice

2 tone testing may not be complete but it does seem sufficient to demonstrate the existence of PIM effects

Is there anything wrong with using Bob's method with 2 tone test signals to get a "PIM" number that can be used in sim to evaluate the OL gain effects on phase modulation distortion?

Can you propose any other PIM metric amenable to easily automated measurement?

If you would actively engage in discussion of the sims with constructive criticisms and propose alternative tests perhaps we could illustrate some of the principles in a form that is accessible to most of us here

In the past Iíve tried to present sims that I hoped showed high low frequency gain appears to be preferable even when PIM is considered Ė its been pointed out that Prof Leach explored low TIM designs and came to change his mind about the claim that flat OL gain was a necessary condition

The frequency normalization appears to have confused some about the point I think this sim illustrates

http://www.diyaudio.com/forums/showt...927#post489927


Here I used a behavioral source to make an adjustable tanh input without any nonlinear C that could confuse the soure of PIM in the sim

http://www.diyaudio.com/forums/showt...54#post1434254


what would improve these simís explanatory power? Ė how would you interpret the results differently?

Would a PIM number like Bobís help?
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Old 11th July 2009, 01:38 PM   #919
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Hello

I believe that's the right place to ask my question:

Anyone knows of a simulator or simulation models of OPAMPS to model SUPPLY CURRENT the right way?
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Old 11th July 2009, 02:28 PM   #920
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Models of newer opamps do this. OPA211 for example. But there are easy ways to reflect the output current (plus as quiescent current) to the rails with the "perfect" single pole opamp model. I did such with LT-spice, will post it here after lunch.

- Klaus
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