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6th February 2008, 03:53 PM  #491  
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Join Date: Aug 2005
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Re: Re: Japanese JFET models
Quote:
Sorry, it's a typo in my latest post! it should read Idss=BETA*Vto^2 as I've said in the previous posts. Now 60*(0.5)^2=12 Thanks for spotting this. 

7th February 2008, 07:32 PM  #492 
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Oops, I should have read your posts above
However, is it approprioate to leave anything but Vto and Idss unchanged in the model and hope for reasonability? And, is there an obvious way to model thermal drift of the FET's parameters in LTSpice? Rüdiger
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7th February 2008, 08:17 PM  #493 
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Hi syn08,
Besides Toshiba Jfets models, would you have acurate models for 2SK1058/2SJ162 Hitachi Output Mosfets family , and/or their 2SK216/2J79 drivers family for use in Pspice ? 
7th February 2008, 10:04 PM  #494  
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Quote:
I have to confess I see little reason why simulating the Blowtorch, even if John would disclose the schematics. For the bias points, you don't really need to simulate anything (a calculator and ten minutes are good enough). For the noise performance  the models have no provisons for that, other than the thermal noise. For the closed loop bandwidth  it doesn't really matter if you are using K170/J74 or 2N5458/2N5461. What's left: The impact of device matching on the DC and AC performance. That's what I was mostly using the above models for. Yes, for this purpose you may want to keep Vto constant, and calculate Beta for (say) Idss=6, 10, 16mA. The loop gain (if there's any feedback). The high gain of the japanese devices will pay off and, of course, the distortions (as much as you trust your simulator for that). Don't expect a simulator to disclose why the Blowtorch is so highly regarded. To me, as much as I know about, if there's anything technically outstanding in the Blowtorch amp it's not the design/schematic, but the implementation/construction. As Scott Wurcer posted elsewhere, a simulator won't tell a thing about the difference (ahem... if there is any) between Vishay and Roederstein resistors. Spice models suck big time when it comes to thermal analysis. You don't have any better chance but to create your own device models at different temperatures (if you have data about). 

7th February 2008, 10:11 PM  #495  
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Quote:
.SUBCKT 2SK1058 10 20 40 * TERMINALS: D G S * Hitachi 160 Volt 7 Amp .171 ohm NChannel Power MOSFET 08061993 M1 1 2 3 3 DMOS L=1U W=1U RD 100 1 80.4M RS 30 3 5.28M RG 20 2 21.4 CGS 2 3 410P EGD 12 0 2 1 1 VFB 14 0 0 FFB 2 1 VFB 1 CGD 13 14 128P R1 13 0 1 D1 12 13 DLIM DDG 15 14 DCGD R2 12 15 1 D2 15 0 DLIM DSD 3 100 DSUB LS 30 40 7.5N LD 10 100 4N .MODEL DMOS NMOS (LEVEL=3 THETA=85M VMAX=163K ETA=2.2M VTO=.5 KP=.999) .MODEL DCGD D (CJO=128P VJ=.6 M=.68) .MODEL DSUB D (IS=29N N=1.5 RS=61.4M BV=160 CJO=802P VJ=.8 M=.42 TT=252N) .MODEL DLIM D (IS=100U) .ENDS .SUBCKT 2SJ162 10 20 40 * TERMINALS: D G S * Hitachi 160 Volt 7 Amp .171 ohm PChannel Power MOSFET 08061993 M1 1 2 3 3 DMOS L=1U W=1U RD 100 1 110.4M RS 30 3 25.28M RG 20 2 17.4 CGS 2 3 760P EGD 12 0 1 2 1 VFB 14 0 0 FFB 1 2 VFB 1 CGD 13 14 467P R1 13 0 1 D1 12 13 DLIM DDG 15 14 DCGD R2 12 15 1 D2 15 0 DLIM DSD 100 3 DSUB LS 30 40 7.5N LD 10 100 4N .MODEL DMOS PMOS (LEVEL=3 THETA=90M VMAX=183K ETA=6.5M VTO=.5 KP=1.109) .MODEL DCGD D (CJO=467P VJ=.6 M=.68) .MODEL DSUB D (IS=29N N=1.5 RS=61.4M BV=160 CJO=900P VJ=.8 M=.42 TT=252N) .MODEL DLIM D (IS=100U) .ENDS 

7th February 2008, 10:41 PM  #496 
diyAudio Member

Hi syn08,
thanks for models. I´ll try use them. 
8th February 2008, 06:14 PM  #497  
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Quote:
It wasn't the model which TI has on its website  the TI model correctly factors in the tempco of the device but is absent the reactive components. I don't think that TI ever fixed the problem even though I talked to them and pointed out the incongruity. The ubiquitous TL431 costs about a nickel. 

8th February 2008, 06:36 PM  #498  
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Quote:
*Reference3 Pin Order: A, K, Ref *TL431 model from EDN magazine: March 15,1990, page 180181 *Programmable Precision Reference pkg:TO92 2,3,1. pkg_DIP8 6,1,8 *Connections * Anode *  Cathode *   Reference *    .SUBCKT TL431EDN 3 2 1 * *Reference input stage Q1 3 1 10 QINPUT RIN 10 2 500K * *Internal reference voltage VR 20 2 DC 1.7791 RVR 20 2 1G * *Pole/Zero modeling GM 0 30 10 20 1 RGM 30 0 1MEG *Pole/Zeros: Pole 1= RGM & CP2, 10KHz * Pole 2= RP2 & CP2, 60KHz * Pole 3= CP1 & RZ1, 500KHz * CP1 30 40 15.9P RZ1 40 0 20K RP2 30 50 10MEG CP2 50 0 0.265P *Gain stage voltage clamp DC 0 30 DCLAMP * *Output stage GO 3 2 50 0 2.5U DR 2 3 DNOM * .MODEL DNOM D(IS=100E15 RS=7) .MODEL DCLAMP D(IS=0.1) .MODEL QINPUT NPN (BF=1 VAF=11.15) .ENDS TL431EDN
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8th February 2008, 07:59 PM  #499  
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Join Date: Aug 2005
Location: Toronto

Quote:
Yep, that's it. The following model for the same circuit covers all of the temperature coefficient, AC gain, stability with capacitive loads (a big issue with TL431, and the reason why I prefer LM4041) noise and output impedance. .SUBCKT TL431 A K R Q1 3 2 1 0 NPN1 2.70 Q2 2 2 A 0 NPN1 1 R1 1 A 800 TC=0.00035 R2 4 2 2.4k R3 4 3 7.2k R4 5 4 3.28k Q3 6 3 A 0 NPN1 1 R5 7 6 4k Q4 10 5 7 0 NPN1 1 Q5 K R 5 0 NPN1 1 R6 2 12 1k Q6 11 12 A 0 NPN1 0.2 Q9 K 11 13 0 NPN1 2 Q10 K 14 A 0 NPN1 10 R10 14 A 10k R9 13 14 150 R7 K 8 800 Q7 10 10 8 0 PNP1 1 Q8 11 10 9 0 PNP1 1 D2 A K D1 D1 A 11 D3 R8 K 9 800 C1 K 11 20p C2 6 3 20p D3 11 R D2 .MODEL NPN1 NPN(Is=0.8e14 BF=100 VAF=100 TF=0.5e9 RB=50 IKF=10m KF=1e16 AF=1 RE=10) .MODEL PNP1 PNP(Is=1e14 BF=50 VAF=50 TF=1e8 IKF=2m KF=1e16 AF=1) .MODEL D1 D(Is=1e13 Rs=10 CJO=20p) .MODEL D2 D(Is=1e13 Rs=10 CJO=2p BV=5 IBV=10u) .MODEL D3 D(Is=1e13 Rs=10 CJO=2p ) .ENDS TL431 

27th February 2008, 01:17 AM  #500  
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Join Date: Feb 2007
Location: Δραμα  North Greece

Quote:
Maybe my so many time delayed post appears in the eyes of some PC software management experts a little funny, because as i have seen already the subject have inclined from your first thought, the expression of your thougt and the mean of your thought. First i have to declare with each modesty that become in a declaration so i ask the forgiveness of anyone thinks that i am arrogant  that i am also an expert in any kind of CAD software. For my job, i use for 9 years the medium quality CADCAE "EDWin" of Visionics which is a complete suite from schematic drawing to spicethermalelectromagnetic analyser. I have also the high value "Altium" from the time which named "Protel" but the EDWin appeared from the begining to suit better in my demands of work. The spice simulator of EDWin works just fine and i think it is not of lower value of any other software simulator. Moreover it has an open spice model library so we can write the parameters of any model we want. I remembered before 6 years when i asked from Motorola the model of two transistors, they answered to mefor my luck was a Greek fellow worked at Motorolathat they don't have the models, but the fellow he linked me in two university databases, and i remembered that the one was the Berkeley university from which i got the models finally. For 3 hours i filed the parameters in the library of the EDSpice simulator. After little time passed, i discovered finally that, for my amplifier model the simulator gave in any kind of input signal a wonderfull flat response from 0 to 1MHz! Fantastic! Something goes wrong i thinked. I tried for 1 week with each trick to destroy this incretible beauty waveform, but nothing changed. I tried a demo amplifier circuit which included in the software something like the Leach with the double LTP in input and this time indeed the simulator indicated a fall of response of this amplifier around 100KHz. Also an obvious distortion TIM & THD. My amplifier circuita version of it i published the schematic in this forum before few monthswas a prototype based a little in the D.Self propositions, in my knoweledge of the circuits of different P.A. amplifiers produced in your country, and in some experiments that i made for some years. My circuit was very advancedCCS in each stage eliminating bootstraps, Current mirrors, tripple darlington output of course full complementary, shared resistors in conjuction with local feedback resistors in the output devices, large capacitor in the AC coupled feedback ground node, etc and after the carefully inspection of the demo circuit i discovered that it was a purposely shoddy circuit to show the effectiveness of spice simulator. From then i use the simulator only in cases of computing the static currents with two voltage markers accross each resistor (that means via the voltage drop, there is not any practical way to measure directly the current) and this gives only by 8090% correct results and only up to 120Volt split supply (from this point and above the precision drops abraptly!). Also the simulator can compute with relativelly good precision the output power for given loads, so we can margin the values of the summing network resistors of the VI limitter of output devices. That is all. Everything furthermore it is most for academic discusion. And the reason IMHO it is that; the simulator it supposes the models of all the devices active or passive as ideal! And in real world the things are absolutelly different! Of course i suppose that the spice simulator can show its value, but only if someone has the courage to measure separately and in two different (to place a margin in variations) ambient conditions each of the endless parameters (many of which need instruments found only in nuclear physics laboratories) of each device and fill the long list of the spice model of device. I think for a big circuit 1 month it is enough without sleep. I close my lengthy post, by say that; As many measurements (such as THD+noise, frequency response etc) are for consumer purposes only, something that it is also the spice simulation i.e. for students. For combatant designers and constructors the clearest way of estimation it is the square wave in input from a good generator of 10MHz (in other words with very small rise time), a dummy load in output (clear resistive) and a DSO. From the shape of square in output you can estimate: 1)From the rise time the bandwidth of the project 2)From the shape of the duty portions of square all the types of distortion and noise 3)From the shape of tilt line (concave or straight) of the duty portion in very low frequencies (under 100Hz) the good or bad coupling of all local and of whole the feedback loop 4)From the amount of tilt again in the low frequencies the force of power supply, the low output impedance (if there is need for more output devices) and finally the tight control in bass reproduction (such the damping? Factor? What is this? It is eatable?). With Respect Fotios Anagnostou 

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