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Old 7th June 2007, 05:30 PM   #151
andy_c is offline andy_c  United States
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Quote:
Originally posted by estuart
Meanwhile, I had a closer look at some (old) test circuits and the CGS cap between node 3 and 5 is NOT the real input capacitance, rather a correction term to make Ciss at Vds=30V exactly equal to the value in the data sheet. The bulk of Ciss is (apparently) derived from the geometric parameters of the BSIM3 model.
Anyhow, I think it's wise to make some LT-Spice test circuits too, and check if the capacitances are in accordance with the data sheet.
Hi Edmond,

I've done some capacitance sims and the Cgs of the device is indeed much higher than the external capacitance added in the subcircuit, just as you say. I have never studied the BSIM3 model, so at the present time I have no clue how the internal capacitances of this model get calculated. The circuit below shows three simulations - the first for Cgs, the second for Cgd, and the third for Ciss as a sanity check to make sure the computed Cgs and Cgd add up to Ciss. DC drain currents in all three circuits are 150 mA, and the DC value of Vdg is 30V in each case.

The first circuit (FET=U1) bootstraps the drain voltage so the total instantaneous Vdg is a constant 30V. This eliminates Cgd. The bandwidth at G1 is calculated, and Cgs is computed from the gate resistance and the -3dB frequency at G1.

The second circuit (FET=U2) bootstraps the source so that the total instantaneous Vgs is a constant 1.883 V, the voltage required to get 150 mA drain current. This eliminates Cgs. The bandwidth at G2 is calculated, and Cgd is computed from the gate resistance and the -3dB frequency at G2.

The final circuit (FET=U3) just grounds the source, sets the DC gate voltage to 1.883V and the DC drain voltage to 30V above the gate. The bandwidth at G3 is calculated, and Ciss is again computed from the gate resistance and the -3dB frequency at G3.

This was done for the 2SK1530 and the 2SJ201. The results are as follows:

2SK1530: Cgs = 698pF, Cgd = 103pF (Vdg = 30V and Vgs = 1.883V)
2SJ201: Cgs = 1120pF, Cgd = 231pF (Vgd = 30V and Vgs = -1.937V)
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Old 8th June 2007, 07:41 AM   #152
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Quote:
Originally posted by andy_c

Hi Edmond,

I've done some capacitance sims and the Cgs of the device is indeed much higher than the external capacitance added in the subcircuit, just as you say. I have never studied the BSIM3 model, so at the present time I have no clue how the internal capacitances of this model get calculated. The circuit below shows three simulations - the first for Cgs, the second for Cgd, and the third for Ciss as a sanity check to make sure the computed Cgs and Cgd add up to Ciss. DC drain currents in all three circuits are 150 mA, and the DC value of Vdg is 30V in each case.

The first circuit (FET=U1) bootstraps the drain voltage so the total instantaneous Vdg is a constant 30V. This eliminates Cgd. The bandwidth at G1 is calculated, and Cgs is computed from the gate resistance and the -3dB frequency at G1.

The second circuit (FET=U2) bootstraps the source so that the total instantaneous Vgs is a constant 1.883 V, the voltage required to get 150 mA drain current. This eliminates Cgs. The bandwidth at G2 is calculated, and Cgd is computed from the gate resistance and the -3dB frequency at G2.

The final circuit (FET=U3) just grounds the source, sets the DC gate voltage to 1.883V and the DC drain voltage to 30V above the gate. The bandwidth at G3 is calculated, and Ciss is again computed from the gate resistance and the -3dB frequency at G3.

This was done for the 2SK1530 and the 2SJ201. The results are as follows:

2SK1530: Cgs = 698pF, Cgd = 103pF (Vdg = 30V and Vgs = 1.883V)
2SJ201: Cgs = 1120pF, Cgd = 231pF (Vgd = 30V and Vgs = -1.937V)
Hi Andy,

Cgs is a bit lower than the Toshiba specs, but these were measured at Vgs=0. So, would you be so kind to run some more simulations, now at Vgs=0?
Apologies for my 'laziness', but I'm unfamiliar with LT-Spice, that's why I'm asking you.

Cheers, Edmond.
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Old 8th June 2007, 02:52 PM   #153
andy_c is offline andy_c  United States
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Quote:
Originally posted by estuart


Hi Andy,

Cgs is a bit lower than the Toshiba specs, but these were measured at Vgs=0. So, would you be so kind to run some more simulations, now at Vgs=0?
Apologies for my 'laziness', but I'm unfamiliar with LT-Spice, that's why I'm asking you.
Hi Edmond,

Sure, no problem. The results are:

2SK1530: Cgs = 886pF @ Vgs=0, Vds=30V
2SJ201: Cgs = 1439pF @ Vgs=0, Vds=30V

BTW, the Berkeley BSIM models look pretty comprehensive. Sub-threshold conduction, woo woo! There was no documentation on them in the LTSpice help, but I found a whole lot of stuff at the Berkeley BSIM web site. I downloaded the manual for BSIM 3v3. It's 205 pages! Yow.

Andy
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Old 8th June 2007, 03:31 PM   #154
andy_c is offline andy_c  United States
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Quote:
Originally posted by AndrewT
When are you two guys going to colaborate on writing a beginner's Wiki, an intermediate Wiki and an advanced Wiki on using/setting up simulators?
Hi AndrewT,

I noticed in another thread that you began using SPICE and were having some problems. SPICE itself is a huge topic about which entire books have been written. Then there's the quirks that each individual program UI has. When starting out, it's best to start simple - like finding the step response of an RC low-pass filter or the like. Try to do some things, then when you get stuck, just ask.
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Old 8th June 2007, 05:27 PM   #155
andy_c is offline andy_c  United States
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Quote:
Originally posted by AndrewT
When are you two guys going to colaborate on writing a beginner's Wiki, an intermediate Wiki and an advanced Wiki on using/setting up simulators?
I did find an LTSpice tutorial here that might be useful to you. I'm getting off-topic here, but one idea might be to start something like an "Absolute Beginner to SPICE" thread. I'd be willing to help with questions in such a thread if LTSpice were the chosen tool (I don't know the UI of other tools). LTSpice is a logical choice because it's free, used by many people, and has no circuit size limitations.
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Old 8th June 2007, 07:11 PM   #156
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Quote:
Originally posted by andy_c


I did find an LTSpice tutorial here that might be useful to you. I'm getting off-topic here, but one idea might be to start something like an "Absolute Beginner to SPICE" thread. I'd be willing to help with questions in such a thread if LTSpice were the chosen tool (I don't know the UI of other tools). LTSpice is a logical choice because it's free, used by many people, and has no circuit size limitations.

Thanks guys for your continued efforts here. Such a thread might be a really good idea. I've used SPICE since its inception (BTW, does anyone remember SLIC by Bill McCallugh?), but I have never considered myself to be a sophisticated user of it, so I'd be happy to contribute some dumb questions. I'm particularly inexperienced with the details of models and packaging them in subcircuits.

Having suffered many years with SPICE in batch mode with line-printer outputs running on IBM 370 and VAX 11/780 machines, I concur that LTSPICE is a gift from heaven. I can't imagine why it would not be the defaco simulator of choice for DIY.

Thanks,
Bob
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Old 8th June 2007, 07:25 PM   #157
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Quote:
Originally posted by Bob Cordell
[snip]
Having suffered many years with SPICE in batch mode with line-printer outputs running on IBM 370 and VAX 11/780 machines, I concur that LTSPICE is a gift from heaven. I can't imagine why it would not be the defaco simulator of choice for DIY.

Thanks,
Bob
Hi Bob,

On this forum it has already been declared as the de facto standard, although it's not my preferred tool. It seems that it has something to do with $$$.

Cheers, Bob.
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Old 9th June 2007, 09:18 PM   #158
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Hi Andrew T

Are you saying that you haven't used SPICE yet?

You could try SIMETRIX which has a free evaluation version and runs transistor circuits up to about 30 devices. I believe you can download it from their web site.

It has tuition examples.

But the important thing to remember is that - if the computer says something does not work it is probably right. If it says something works, check it!

cheers
John
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Old 18th June 2007, 04:08 AM   #159
GK is offline GK  Australia
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Default Re: Re: Re: Re: Re: Re: Re: Re: Re: I repeat my Request

Quote:
Originally posted by Bob Cordell



Hi Glen,

Perhaps you missed my questions here from an earlier post.

Thanks,
Bob

No I did not miss them, i just didn't see the point in answering a lot of pointless questions.

1) BJT are 2SA1386/2SC3518. I mistakenly referred to these earlier as 35/60 MHz. They are infact 40/50MHz.

2) Yes I did build an measure a complete output stage in isolation. How do you think I measured the output stage THD?

3) I didn't get spice models for the Sanken BJT's and my output-stage conclusions are not based of SPICE simulation.

I have already given you a brief showing of the design, and, as it progresses, the entire thing will be published (allowing scrutiny) on my website in full. Right now, I finishing of the schematics in .GIF format.

You'll just have to wait for it.


Cheers,
Glen
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Old 18th June 2007, 10:59 AM   #160
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Default Re: Re: Re: Re: Re: Re: Re: Re: Re: Re: I repeat my Request

Quote:
Originally posted by G.Kleinschmidt



No I did not miss them, i just didn't see the point in answering a lot of pointless questions.

1) BJT are 2SA1386/2SC3518. I mistakenly referred to these earlier as 35/60 MHz. They are infact 40/50MHz.

2) Yes I did build an measure a complete output stage in isolation. How do you think I measured the output stage THD?

3) I didn't get spice models for the Sanken BJT's and my output-stage conclusions are not based of SPICE simulation.

I have already given you a brief showing of the design, and, as it progresses, the entire thing will be published (allowing scrutiny) on my website in full. Right now, I finishing of the schematics in .GIF format.

You'll just have to wait for it.


Cheers,
Glen

Hi Glen,

The questions were not pointless.

What value of THD did you get for the output stage at 20 kHz full power? You did not answer this one.

Am I correct in believing that full power is 500W into 8 ohms, driven balanced from both sides?

What kind of a source did you use in order to develope the necessary very large balanced drive signals to measure the output stage in isolation? It would seem like a pretty big undertaking to measure such a large, high-power output stage.

Since the output stage is Class-A, I assume that you would have also had to build the balanced rail-tracking amplifier that feeds its floating rails in order to test it, no?

Cheers,
Bob
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