diyAudio Forums Archive - dead time, and class D distortion

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dead time, and class D distortion - Click HERE for Original Thread

zenmasterbrian

On this thread, I want to explore something most interesting that I do not really understand, which was mentioned on another thread.

This is the relationship between dead time in Class D switching, at the zero crossing, and the final audio output distortion.

This is something I had never considered before.

<<
Dead time between upper and lower switch is directly pushing up unpleasant distorsions, that have a similar harmonic spectrum as the well known cross over distorsion in class B amps. So everybody tries to keep it low. Reasonable dead times are below 1% of the period, better 0.1%. At 25kHz this means 0.1% ... 1% of 40us. So you should handle deadtimes of some hundret nano seconds (say: 400ns dead time is already a quite poor design), which is not easy with heavy BJTs. Please be aware that the storage time of BJTs is dramatically increasing by temperature. Means turn OFF delay is increasing and may eat up the dead time and system runs into cross conduction.
>>

from post
http://www.diyaudio.com/forums/show...245#post1001245

<<
I would agree in most SMPS applications, where halfbridges are allowed to have long dead times. But for class D with low distorsions it is more difficult. I am mostly concerned about the storage time.
The storage time of heavy BJTs is long, means several us. You can reduce it by giving high negative base drive currents for turn OFF. Unfortunately the storage time is also depending on the overdrive factor. If you have a constant base drive then the resulting storage time will also depend on the load current. And temperature will increase the storage time by 30%...50% if you compare the behaviour at 100C vs. 25C.
Simply pick any power BJT and use it to switch ON and OFF a resistor load. Drive it with a signal generator and observe the delay between Ib and Ic. Or if you are in trouble with proper current measurement you can measure the time difference between the falling edge of the drive signal and the rising edge of Uce. Of course also there is a similar turn ON delay, usually this is much shorter, than turn OFF delay. Play around with this and gain some feeling about the values. Then go ahead with some drive buffer to allow high base drives or have a look to some of already existing standard base drive circuits. Play with it and see if you can keep the variance of delay times low no matter if you heat up and/or change the load.
I would guess that you can be lucky if you are able to drive a 250V/40A BJT in a way that the resulting turn OFF delay is about 1.5us at 25C and 2us at 100C. Which is already a variance of 500ns and does not take load into account. From my perspective short dead times for class D half bridges are really difficult to realize in a proper manner with BJTs.
>>

from post
http://www.diyaudio.com/forums/show...100#post1002100

Now, my own interest is in a subwoofer Class D amp, running at 23.5khz, and possible using BJTs.

Neither 23.5khz, nor BJTs, are on the table for discussion on this thread.

Rather, I want to invite ChocoHolic, and others, to look at this dead time or zero crossing issue in Class D, and what its relation is to the audio distortion.

To me, this is not at all obvious.

Tim__x

http://www.diyaudio.com/forums/show...6085&highlight=

classd4sure

Another fishing expedition.

See the last time you got away with alot by claiming "I could not find", because the questions you asked were so absurd there obviously was no precedence.

This time, you obviously expect to be spoonfed, because there's plenty out there on that topic, and again you're attempting to control the topical flow, which isn't going to happen.

The link provided above is just one example of you not bothering to search, instead you chose to waste our time. If you made half the effort you'd find many more such links on this very forum, and I'm sure google would also serve to find several others.

There's plenty of precedence in this case, stop your trolling expeditions and start digging, we're not here to spoonfeed you basics.

When you've done your research feel free to pose a question of worth.

Though I think what you really ought to start looking for, is a basic class d tutorial. Google can find you one of those too.

Cheers,
Chris

poobah

One of the beauties of Class D is that a great deal can be learned from studying the no input signal condition. Many of Class Ds foibles are still present with no input.

A model using perfect switches but real diodes with induced dead time will show the relationships.

:)

zenmasterbrian

classD4sure, there is no reason for you to be posting here.

Tim_X, I will begin reading that thread.

poobah, I will begin that thought experiment / analysis now. Thanks for the clue.

Brian

classd4sure

Here's another link for you Brian, I know you haven't seen it yet either:

Basics For Brian

rogs

When I read this thread title I thought "excellent, as a newcomer, maybe I can discover a little bit about the D class 'dead time' question, without having to wade through the fluff that accompanies most of the longer threads in this forum" ---- sadly that seems unlikely now! :(

I recently needed to try and understand something about the UcD 180 - so I read the 'UcD180 questions' thread - yes, all of it, nearly 2000 posts---took me about a week.
There is some excellent information, especially from Bruno of course, but I nearly gave up having to wade through 2 years of 'that's a nice colour you've got on your wiring' etc....

I do appreciate that the more prolific posters must find it very frustrating to have to cover the same ground over and over, but there are always newcomers who do not know the 'details' of a two or more year history of 'regulars,' and hope for a friendly welcome, when old ground needs to be revisited.

Maybe it's just that some forums are more tolerant than others!

classd4sure

I appreciate your concerns but I don't feel it's the case.

You've read the entire 180 thread and that's admirable. You've seen the kind of information given freely that'll probably never be posted again, however long it took you, I'm sure it was worth it. There's a few others of equal or greater caliber as well.

Maybe the more the same question is asked the less gets answered. If you do a little research first and gain the ability to elaborate on an old question, or bring forth some aspect that wasn't previously covered 10 times over, we all stand to gain. If you're having a problem understanding some particular aspect of anything already discussed at length and need further help on the matter, you're not going to get chased away.

However, I find a huge difference between any of that, and a pure fishing expedition by someone who'd completely ignore what you might consider basic information from the last 20 years, and purely expects to be spoonfed exactly what he wants to hear.

Welcome to a great forum, but please don't act abused when you haven't been. I'm confident you'll find your experience here to be as fulfilling as mine has been, if you just make a little effort to help yourself. From your non topical meta post it seems that won't be an issue.

Cheers.

PS: Did your get your UCD180 question answered OK?

PPS: Bruno doesn't post here much anymore, perhaps because of all the times he got asked how to wire the inputs over and over again. Quite the loss wouldn't you say?

PPPS: Use the search thing and you won't have to read the entire thread, even though I highly recommend it:)

rogs

quote:

Originally posted by classd4sure

PS: Did your get your UCD180 question answered OK?

Yes -- and no!

I have a special application for a class D amplfier that would horrify most of you! --- and trying to find the answer has been difficult. Certainly, overall, the time spent reading through the UcD 180 thread was worthwhile -- there is clearly a lot of expert knowledge here, some of the more academic way above my head!

And I have to remember that it is 'DIY' audio, which is likely to be inhabited by enthusiastic amateurs ( and I do mean that in a positive way, using the word 'amateur' from it's latin root meaning 'lover of', rather than 'less worthy than professional').

By definition, you are trying to improve your listening experiences, by aspiring towards the better realisation of available technology.

But when you have a requirement that can, in theory at least, cope with 100% THD (I'm not joking!), and a further requirement of the lowest possible quiescent current, then a discussion on 'dead time' becomes potentially very interesting.

I do appreciate that this requirement may appear to be nonsense, but this might give an insight into the application I am researching- http://scitation.aip.org/getabs/ser...=cvips&gifs=yes

classd4sure

Hmm, so you aim to reproduce this theory or something?

BWRX

quote:

Originally posted by rogs
But when you have a requirement that can, in theory at least, cope with 100% THD (I'm not joking!), and a further requirement of the lowest possible quiescent current, then a discussion on 'dead time' becomes potentially very interesting.[/url]

Class B amps suffer from crossover distortion, which is something you may also want to look into.

zenmasterbrian

rogs, thanks for posting here.

This thread will be a constructive place.

I'm just now working to get someone off of it. For now, just ignore him. Bozo filter him if you want.

When people want to participate they post links to real things, or their own ideas. If they think there are relevant things to read, they post them.

Otherwise they keep quite.

I have an unusual project on the table too.
http://www.diyaudio.com/forums/show...&threadid=84403

While there are many with extensive knowledge here, there are also some who think in very narrow ways.

But what is most imporant is that people stick to the topic, and only post if they want to add something constructive.

If junk posters are ignored, they will eventually go away.

Give me some time to read Tim_X's link.

Brian

zenmasterbrian

This web site seems down, or gone. Maybe its been moved?

http://www.genomerics.org/outfilt.html

http://www.genomerics.org/index.html

There is also an Electronics Letters paper. I can't get the full text, because I am not a dues paying member.

But with enough time, I could get to a local university and read it online, and print it on paper.

I believe there is still more info online.

For now, back to that diyaudio thread.

zenmasterbrian

Alright, I'm certainly convinced that this dead time and distortion relation is real. But I still don't understand it.

I would need that Elecronics Letters paper to follow all that is said.

As I see it, dead time is just something that would be filtered out in the audio output.

It only becomes a problem when you near full signal swing, or if it somehow interferes with the ramp generator and comparator and feedback part of the circuit being able to track an input signal. Meaning, it is not just dead time, it is how that interacts with the rest of the circuit.

So, for me to understand this more fully, I will have to see more info.

I am not aware of any book that talks about Class D audio design. I have looked.

I know there are books that deal with SMPS. But the issues are not entirely the same.

I will keep looking and look at Tim_Xs link some more. I'm also anxious to see if others can bring some additional light to bear on this.

classd4sure

Have you tried web pages, basic class d tutorials, white papers, patents, the other 3 to 6 threads already discussing the issue.... or must it all be handed to you?

What in the world makes you think it's our job to convince you? Let's leave that topic sit for awhile.

analogspiceman

quote:

Originally posted by zenmasterbrian
I'm just now working to get someone off of it. For now, just ignore him. Bozo filter him if you want.

Chris, for what it's worth, I think that Brian is the real Bozo here. The guy is a complete waste of your time. He is a control freak wannabe and much, much worse, unlike you, contributes almost nothing of technical interest or merit. My advice to you -- ignore him completely.

Regards -- analogspiceman

zenmasterbrian

classd4sure, either contribute something topical, or you shouldn't be posting here.

classd4sure, I am asking you not to post on this thread.

analogspiceman, greetings.
I've just spent some time reading you posts from the link Tim_X provided.

I was encouraged to see your name as the most recent poster.
I hope that this thread will prove to be of worth.

In any event, I ask that you not post negative meta. It just takes up space, and further discourages topical posts.

Genomerics

quote:

Originally posted by zenmasterbrian
This web site seems down, or gone. Maybe its been moved?

Sort of, it's been switched off but it had been moved. There, I've hit the on/off button.

http://www.genomerics.org/classd/hbfl/outfilt.html

I'm not sure it will help you much though..

DNA

zenmasterbrian

I'm heading there right now

(edited) It is helpful. I'm going to have to study it in more detail tomorrow. I wonder, in the case of a switching amp with a forth order filter instead of a second order filter, would this be so much of a problem.

Again, I'm just starting to try and understand this.

Genomerics

quote:

Originally posted by zenmasterbrian
I wonder, in the case of a switching amp with a forth order filter instead of a second order filter, would this be so much of a problem.

No need to wonder.

I realise the circuits given are not exceptionally good but if you get yourself a copy of LTspice, google for it, then you can download the circuits from the site by clicking on the Linear Technology logo. Then you can modify them and see what is happening yourself.

I think someone else mentioned that the problem is reduced if the ripple current in the output inductor is increased..... Think about why that might happen........

On the basis of that a fourth order filter with smaller inductive components may give you the increased ripple you require in the first inductor that will reduce the effects whilst still allowing you to achieve your desired attenuation.

I'm sure you will sit down and look at what is happening, reach your own conclusions and then proceed to investigate and make changes according to your thoughts about things and verify wether or not your ideas are right or wrong......

Something close to the truth is out there.

DNA

zenmasterbrian

Thanks, continuing to look at your web page, and return to the thread.

http://www.linear.com/company/software.jsp

ChocoHolic

Well... I am afraid that I cannot contribute very much here.
I am a class D Rookie (should I also name my sub amp this way? :D )
Somebody told me about dead time distorsion, then I read one thread here and for me that was enough. It is basically fitting to my imagination that dead times may cause distorsion, depending on the load and signal. As per my understanding the reason for this is the hard-to-predict output voltage of the half bridge during the dead time. It is also obvious for me that high AC ripple in the output filter is helpfull to fight the dead time distorsions. If the ripple is high, then during the dead time the inductive energy of the filter choke will immediately push the halfbridge ouptut to the opposite rail as soon as we open one switch and the current will run through the freewheeling diode until the related switch will be turned on. So the output voltage of the half bridge is almost always defined by upper or lower rail.
This condition is valid only as long as the HF current ripple peak is with some margin higher than the output current (required margin depends of course on the dead time).

Important for me was the information that the dead time distorsions have a similar spectrum as the cross over distorsions in class B designs. I already experienced that my ears are sensitive on this.

Ok, I didn't need to know more... things are making basically sense to me... and consequently I am putting some weight to optimize the dead time in my design...
My switching frequency will be around 100kHz. My dead time adjustment now is close to cross conduction, something between zero and 10ns. Also it seems to be quite stable vs. temperature and load. Not completely independend, but amazing stable!
My output inductors are two 45uH beasts (full bridge with +/-55V) and the resulting ripple current is about +/-3A peak.

Up to now that's 100% of my dead time distorsion know how.

fokker

my understanding of dead time is even simpler than ChocoHolic's!

dead time is the delay between the input turns on and the output turns on. a pwm amplifier is essentially switching the output to either the positive rail and the negative rail. To output very small voltages, the switching has to be done very very fast / frequent.

Well, if the dead time is too long, the output will be stuck with either rail longer than needed and the amp wouldn't be able to reproduce small voltage output.

darkfenriz

It seems to me that there is some compromise between cross conduction and dead time. I think that with faster slew rate one can have resonably low conduction and dead time, but high slew may require a more sophisticated mosfet driver with higher current abilities.
Just thoughts from a guy, who thinks ChocoHolic the 'rookie' is a true expert. I suspect I am not alone with this opinion :)

regards
Adam

pinkmouse

Thanks Fokker, for the first time I actually understand what this thread is about! :)

Ouroboros

Fokker isn't quite right. Dead time is the time allowed in the driver stage between turning one FET off, and turning the other side FET on. If the top FET (for example) isn't fully turned off before the bottom FET turns on, then you'll have a big spike of wasted current flowing all the way between the +ve rail and the -ve rail, not going via the wanted path through the output filter coil.

If the dead time is too long though, you'll have a period where neither FET is on, resulting (especially in open-loop amplifiers) in a period where you are not in control of the output, very much like you get around 0V in an under-biased class-B amp.

darkfenriz

There are technical similarities between classB distortion and dead time classD distortion, but in classD when input signal goes higher level, THD goes up too.
Another words distortion vs. level is monotonically rising function, which is desirable in my opinion and in opinion of for example N. Pass as far as I remember.
This is 'natural' distortion mechanism, similarly speakers distort monotinally, so classD designs don't really need so low THD numbers as class(A)B.

regards
Adam

poobah

Guys.

These half bridges drive an inductor... right? When the top transistor turns off... and the bottom transistor is not yet on... where does the inductor get its current? (another reason why FETs are the preferred device).

rogs

quote:

Originally posted by Ouroboros
If the dead time is too long though, you'll have a period where neither FET is on, resulting (especially in open-loop amplifiers) in a period where you are not in control of the output, very much like you get around 0V in an under-biased class-B amp. [/B]

I often need to run Class B with very low quiescent currents, and usually end up under biasing. In these applications, 10% THD is quite aceptable (could be higher, but not desireable!)

According to the Philips notes that accompany their UcD demonstration PCB, it is a simple job to adjust the dead time by changing the value of one resistor.
It'll be interesting to see just how much quiescent current can be reduced by running a UcD amp with a THD of 10%. Hopefully, quite a significant amount!

classd4sure

quote:

Originally posted by poobah
Guys.

These half bridges drive an inductor... right? When the top transistor turns off... and the bottom transistor is not yet on... where does the inductor get its current? (another reason why FETs are the preferred device).

It's probably a better reason for ZVS or ZCS.

quote:

According to the Philips notes that accompany their UcD demonstration PCB, it is a simple job to adjust the dead time by changing the value of one resistor.

Don't be letting that "app note" fool ya, that's only a means of dead time adjustment in the weakest possible sense.

poobah

rogs,

Don't count it... The dead time is a "guard band" value that has been chosen to avoid shoot-thru under any circumstances caused by component drift and production variations. The issue of shoot-thru certainly affects efficiency, but the design constraint is about keeping the FETs alive. So, you will probably not see any reduction in Iq by increasing the deadtime.

:)

IVX

Guys, maybe i'm too late, but this is simple simulation can help figure out, how PWM linearity depends from the dead time (8,4,2,1,.5,0% of Tswitch). Easy to see, that the process haven't frequency dependance, so 100hz, 1khz or 10khz is no matter. BTW, several watts power region will have no dead time dependance also -only much more power level shows real THD, in other words, if your home cooked class D amp gave .002% at 1W, try to check it for 1/2 max power first.

fokker

quote:

Originally posted by rogs
According to the Philips notes that accompany their UcD demonstration PCB, it is a simple job to adjust the dead time by changing the value of one resistor.

that is particular to the design: a smaller resistor there will cause the current in the two driver transistors to reach its trigger levels faster on the lending edge / slower on the falling edge, thus reducing dead time.

The risk with that approach is that the amp may stop oscillating (too small of a resistor), or end up sticking to one rail (too high of a resistor).

As to distortion: well, human ears aren't that sensitive to distortion, especially with test tones. I played some test tones (sine, square and triangle) on my fucgger (that is outputing only the negative half so far) and my wife / kids couldn't tell them apart from the full wave version. It is easier with music but even that I would be surprised if anyone can tell thd within 10% in a dbt.

fokker

quote:

Originally posted by classd4sure
Don't be letting that "app note" fool ya, that's only a means of dead time adjustment in the weakest possible sense.

I can confirm that the application note is right on that particular point. with a smaller resistor, it turns on the two coupling transistors (the ones that mate the differential comparators to the hi/lo-side drivers) faster.

It does change dead time in my fucgger implementation: the average current goes through the current limiting resistors goes up with smaller resistor but the change is quite dramatic so you will need to be careful playing with it.

If your driver has deadtime adjustment, I would use a lower resistor and let the driver handle the deadtime. if your driver does not have overshoot control (like the Maxim driver ICs with independent hi/lo side drivers), you can use that little resistor for dead time control.

rogs

What I am beginning to appreciate is that it is a mistake to try and equate D class 'deadtime' with B class 'under bias', when trying to vary quiescent current changes.

A B class amp running with no input signal, and no (or virtually no) bias will draw no current from the output stage -- both transistors are well and truly turned off - just a minimal current drain from any residual DC offset.

In the case of a similar state with no input signal, and an 'under biased' (excessive dead time) output , the class 'D' amp will still need to provide some current, even though its only overcoming switching losses, and ripple current sink/ source state changes, and this is likely to be significantly greater than the "equivalent" class 'B' current.

Hence the option to turn off the UcD -- it's a worthwhile saving!

Unfortunately I do not have that option in my application -I am required to run the amplifier(s) from battery power, and in an 'on' state, to allow fault monitoring.
And this is for 24 hours, at the end of which the amplifier has to provide full power for further 30 minutes!

All part of the specifications for emergency voice alarm systems.

So you'll understand the need for low quiescent current --to avoid having to use batteries the size of Belgium!
:D

Excellent food for thought from the contributions here -- thanks guys!

classd4sure

So, how do you think it manages to effect the dead time?

Does it delay the rising edge, speed the falling edge, does it provide independant control of either slew rate or delay of either edge or both?

Is there anything else affected by the adjustment of it?

You'd really put your faith in a non intelligent gate driver, that's not even device and barely application specific? That'd be crude I think.

Right off the top of my head there's five other ways of affecting "deadtime" in that circuit that don't envolve the adjustment of that one resistor.

Its only use is as a "fine tune" and nothing more.

Cheers,
Chris

classd4sure

quote:

Originally posted by rogs
What I am beginning to appreciate is that it is a mistake to try and equate D class 'deadtime' with B class 'under bias', when trying to vary quiescent current changes.

A B class amp running with no input signal, and no (or virtually no) bias will draw no current from the output stage -- both transistors are well and truly turned off - just a minimal current drain from any residual DC offset.

In the case of a similar state with no input signal, and an 'under biased' (excessive dead time) output , the class 'D' amp will still need to provide some current, even though its only overcoming switching losses, and ripple current sink/ source state changes, and this is likely to be significantly greater than the "equivalent" class 'B' current.

Hence the option to turn off the UcD -- it's a worthwhile saving!

Unfortunately I do not have that option in my application -I am required to run the amplifier(s) from battery power, and in an 'on' state, to allow fault monitoring.
And this is for 24 hours, at the end of which the amplifier has to provide full power for further 30 minutes!

All part of the specifications for emergency voice alarm systems.

So you'll understand the need for low quiescent current --to avoid having to use batteries the size of Belgium!
:D

Excellent food for thought from the contributions here -- thanks guys!

Do whatever monitoring is required with micropower and have the output stage disabled when not needed. If you have to monitor the health of that as well, wake it up for a split second, then shut it off again. I don't see the sense in keeping it oscillating for nothing when you're on battery power with an emergency system. Also if the output stage is high impedance in a disabled state, you know it's OK.

Full power for 30 minutes should be no problem at all if designed properly.

poobah

During the dead-time, the inductor derives its voltage from the diode/switch on the rail opposite the one that was just turned on (active). The distortion comes from the fact that the other rail voltage has a diode drop added to it. This deviates from the expectation that the rails will be symmetric. This distortion falls with rising rail voltage as the diode drop looks smaller in comparison. All this ignores the on-state voltage drop of the switches.

Fet based designs, where the freewheeling is accomplished by a synchronous FET rather than an antiparallel or body diode minimize all this by virtue of the low conduction drop.

Remember, a MOSFET in the on state is happy to conduct in EITHER direction... this is the beauty thing about FET Class D and synch. rectification in general.

:)

If you are talking about UPS duty here... most are thrilled silly with 5% THD. 10% is really the borderline if you want to say "TRUE SINE".

fokker

quote:

Originally posted by classd4sure
So, how do you think it manages to effect the dead time?

Does it delay the rising edge, speed the falling edge, does it provide independant control of either slew rate or delay of either edge or both?

it controls the rising and falling edges. no it does not provide independant control, nor did Phillipse say it does.

quote:

Originally posted by classd4sure
You'd really put your faith in a non intelligent gate driver, that's not even device and barely application specific? That'd be crude I think.

Well, we don't have device or application transistors, capacitor or resistors, for that matter. and we certainly don't have application-specific electrons. Any of the devices we use are not intelligent nor application specific at a level.

and there is no reason to have that application specific device.

classd4sure

quote:

Originally posted by fokker

it controls the rising and falling edges. no it does not provide independant control, nor did Phillipse say it does.

Well, we don't have device or application transistors, capacitor or resistors, for that matter. and we certainly don't have application electrons. Any of the devices we use are not intelligent nor application specific at a level.

and there is no reason to have that application specific device.

It controls the level of current output to the gate drivers. If you use an IC driver with a fet based input you're going to see a whole different story. That's all it does wrt deadtime.

We sure as hell do have application specific devices, your driver that "controls deadtime" is exactly that, and it'd be a rare occasion indeed where it would be up to the task of deadtime control all on its own.

So aside from that there's no application specific devices in electronics hmm... funny :dodgy:

fokker

quote:

Originally posted by classd4sure
It controls the level of current output to the gate drivers. If you use an IC driver with a fet based input you're going to see a whole different story. That's all it does wrt deadtime.

and what triggers your gate drivers?

quote:

Originally posted by classd4sure
We sure as hell do have application specific devices, your driver that "controls deadtime" is exactly that,

application specific as in "controlling deadtime"? the driver is clearly not designed to specifically address that application, right?

or maybe you should define "application specific" for us before we can have an indepth discussion on that "applicatin specific" means.

quote:

Originally posted by classd4sure
So aside from that there's no application specific devices in electronics hmm... funny :dodgy:

not really.

classd4sure

quote:

If your driver has deadtime adjustment, I would use a lower resistor and let the driver handle the deadtime. if your driver does not have overshoot control (like the Maxim driver ICs with independent hi/lo side drivers), you can use that little resistor for dead time control.

I'm not an IC driver guru, but there are some that claim to have a handle on deadtime... I doubt it.

Independant high/low side drivers are there to give you a handle on the matter. Given standard component variation (even amongst the same type), it's cool to have a little pot for fine tuning, if that's built in already kind of like it is for the UcD discrete modulator( with current driven bjt's as drivers), but otherwise you're likely in need of an additional adjustable delay circuit.

Leaving it in the hands of a driver IC won't get you too far.

quote:

application specific as in "controlling deadtime"? the driver is clearly not designed to specifically address that application, right?

You mentioned "overshoot control", which I think you meant shoot through control, since we're on the topic of deadtime and all, and said you'd leave it up to the driver!

Didn't you swap a bunch of drivers this morning.. looking for one with better sound? That's not design, you select your driver based on your requirements and design the support circuitry around it, including dead time control. If it doesn't have independant hi/low drivers, then you put the delay circuitry after it. To the best of my knowledge there isn't yet a driver IC that will do the job for you, as you said, "leave it up to the driver", won't work very well, as you found out today. Some drivers feature adaptive or predictive deadtime but none fast enough yet for a class d amp application... unless you want to switch at 20 or 30k for some silly reason.

quote:

There is absolutely application specific transistors, caps, resistors.... as far as electrons, ever heard of holes?? That's beyond the scope of the debate though.

You'd do very well to figure out what device suits a particular application if you want to play with high speed power electronics, before you go doing silly things like a 1kw bjt half bridge at 22.69kHz.

You wouldn't use a 10W power resistor as turn on delay for a power switching mosfet would you?

In electronics everything is application specific to a certain degree.

fokker

quote:

Originally posted by classd4sure
Didn't you swap a bunch of drivers this morning..

yes, I did.

quote:

Originally posted by classd4sure
looking for one with better sound?

No. I didn't swap IC drivers for better sound.

quote:

Originally posted by classd4sure
If it doesn't have independant hi/low drivers, then you put the delay circuitry after it.

it doesn't have to be after it. It can be in front of it, besides it and underneath it.

quote:

Originally posted by classd4sure
There is absolutely application specific transistors, caps, resistors....

I guess it depends on what you mean by "application specific" which you haven't been able to define for us so I would refrain from having a discussion on something that appears to be fuzzy at present time.

quote:

Originally posted by classd4sure
In electronics everything is application specific to a certain degree.

and by the same token, everything is NOT application specific to a certain degree. It shows you that it is futile to have a discussion based on fuzzy definitions.

classd4sure

Normally, I'd find much humor in such a post.

This however, seems to cross the line where it can only be seen as sad.

I think it's only fuzzy to you my friend.

Cheerio

fokker

quote:

Originally posted by classd4sure
Normally, I'd find much humor in such a post.

This however, seems to cross the line where it can only be seen as sad.

I think it's only fuzzy to you my friend.

Cheerio

if it is not fuzzy to you, why cannot you lay it out?

Sometimes you read too much into what you read and assume people said things they didn't. For example, I didn't swap the IC drivers for better sound. I said that I swapped them and I reported a sound difference. That's it.

another point: you mentioned dead time control AFTER the IC. Well, guess what, you can do that in FRONT of the IC, on the input pins too.

The point is that there are many ways to slice and dice a thing. Not all of them are perfect for all applications. we just need to have an open mind to accept all the alternatives.

I understand your admiration for UcD, and there is nothing wrong about it.

However, it doesn't not mean everything from Phillips is wrong. And the particular point about that resistor controlling deadtime is dead on.

Give credit where credit is due. and be fair to all parties, be it Phillips or UcD.

classd4sure

Oh I'm able to lay it out for you, although I'm certain the cloud your head is in will float you clean over it. I'm completely disinterested in this, so here's a meager effort at best:

quote:

Sometimes you read too much into what you read and assume people said things they didn't. For example, I didn't swap the IC drivers for better sound. I said that I swapped them and I reported a sound difference. That's it.

Granted, yet my point stands firm, as do I. You select a device based on design criteria, and implement it. It's beyond me why you'd ever resort to swapping one driver after another. Perhaps instead, figure out what's happening, test, measure, observe, research, fix. If the part can't perform as promissed, then you repeat the process. Otherwise you're just relying on blind luck, and never learning anything. Obviously you can expect a sound difference when blindly swapping either mosfets or drivers.

quote:

another point: you mentioned dead time control AFTER the IC. Well, guess what, you can do that in FRONT of the IC, on the input pins too.

That tip was given to you with respect to a driver IC that didn't include separate inputs for high/low, but rather a single input, as I very clearly stated. Tell me wise one, how would you then implement deadtime control in front of the IC, when it has a single input? I guess all of a sudden you have application specific electrons do you?

quote:

The point is that there are many ways to slice and dice a thing. Not all of them are perfect for all applications. we just need to have an open mind to accept all the alternatives.

Your "wisdom" was to leave dead time up to a supposed capable IC, if possible, otherwise that little resistor on the UCD would do. You presented that unilatterally. Does that make sense to you... the above quote would suggest you now disagree with yourself, and almost got my point. Though, I'd still very much like to see you implement deadtime "above, below, sideways, transwarp.."

quote:

I understand your admiration for UcD, and there is nothing wrong about it.

No, you couldn't begin to

quote:

However, it doesn't not mean everything from Phillips is wrong. And the particular point about that resistor controlling deadtime is dead on.

Don't two negatives make a positive... Everything I stated on the matter is dead on the money, but I'm not here to hold your hand when you haven't even tried the discrete drivers out yourself.. and dismiss everything I'm telling you simply to fuel a debate you're not up to. Good luck swapping your IC's and getting your schematics off the web.

quote:

Give credit where credit is due. and be fair to all parties, be it Phillips or UcD.

If you want to bait me, you'll have to first know your facts, keep 'em straight, and in general, try alot harder.

fokker

quote:

Originally posted by classd4sure
Oh I'm able to lay it out for you,

you still couldn't define "application specific" for us. Try harder next time.

quote:

Originally posted by classd4sure
It's beyond me why you'd ever resort to swapping one driver after another.

for a very simple reason: I wanted to see how each driver IC performs vs. others.

Not sure why that would have escaped the wise one, :).

quote:

Originally posted by classd4sure
but I'm not here to hold your hand when you haven't even tried the discrete drivers out yourself..

I never expected you to hold my hand. and I thank you for all help you have offered me so far.

BTW, you are again dead wrong when you concluded that I haven't even tried the discrete drivers.

But that's just one of those ***-U-ME mistakes you so fond of.

quote:

Originally posted by classd4sure
If you want to bait me,

you really as important as you think you are.

classd4sure

quote:

for a very simple reason: I wanted to see how each driver IC performs vs. others.

Oh right, you mean to get the high side switching in the first place.... :clown:

fokker

quote:

Originally posted by classd4sure

Oh right, you mean to get the high side switching in the first place.... :clown:

not really. But no matter how many clown faces you put on, you still cannot dispute the fact that that little resistor does what Phillips said it does, contrary to what you said.

and you still couldn't define "application specific" for us.

IVX

Anybody can remind me the reason of this dispute? BTW, Philips appnote, and hypex UcD400 have the same dead time adjustment method (Philips_R9=DT_Pot_UcD400). :)

fokker

quote:

Originally posted by IVX
Anybody can remind me the reason of this dispute? BTW, Philips appnote, and hypex UcD400 have the same dead time adjustment method (Philips_R9=DT_Pot_UcD400). :)

how could it be that the UcD is following the lowly Philips on DT adjustment? didn't the wise say that that is only the DT in the "weakest possible sense"?

apparently, the UcD folks also like the "weakest possible" DT adjustments. I wonder if they will ever offer something better than the 'weakest possible" DT adjustment in the next revision.

:)

phase_accurate

quote:

how could it be that the UcD is following the lowly Philips on DT adjustment? didn't the wise say that that is only the DT in the "weakest possible sense"?

I assume the main deadtime is already implemented (and properly dimensioned) in the driver stages and this one is just used to fine-tune production tolerances.

Regards

Charles

ChocoHolic

quote:

Originally posted by darkfenriz
It seems to me that there is some compromise between cross conduction and dead time. I think that with faster slew rate one can have resonably low conduction and dead time, but high slew may require a more sophisticated mosfet driver with higher current abilities.
regards
Adam

Hi Adam,
yes and no ...in all regards...
Of course I am not a rookie in power electronics and general analogue electronics, but I am a class D rookie. New playground and I like it.

Yes there is always a trade of between cross conduction and dead time and yes higher slew rate is requiring tougher drivers.
But not only drivers have their limits, also the free wheeling diodes allow usually not more than 5V/ns, when we force them through reverse recovery. So there are limits, which we should not exceed, even if our driver could deliver enough gate drive.
Next point: The moment of switching ON (or OFF) is not a moment.
At least in my design the length of the miller plateau is by far longer than the dead time. Means if we consider the transition of the switch from isolating to really low RdsON, my design needs more than 100ns. I am driving the IRFB52ND with 12 Ohms for turn ON and parallel 6.8 Ohms through a diode for turn OFF. The output characteristics of the driver IC are not neglectible so I have to add that my driver is the IRS 20954 with VCC approx. 12.7V.
My slew rates are round about 2V/ns...3V/ns, means sloping time is about 50ns at no load condition. I just feel better with some margin vs. data sheet limit.
The fact that the transition is not black/white ON/OFF is in reality relaxing cross conduction issues, but of course opens the discussion what is dead time.
First: Let's separate driver dead time ( = Time between falling edge of first output and rising edge of second output) from resulting half bridge dead time. For my wording I define the resulting half bridge dead time as that time during which both switch are isolating. Means the time while both Ugs are below the levels of the relevant Miller plateaus.
The limited speed of the transition between ON and OFF allows some ns overlap/crossconduction without to much trouble, as long as you can make sure that increasing temperatures do not mess up the adjustment. In my half bridge I can easily go for some cross conduction peaks of 7A/60ns at 30C and they do just increase to 8...9A/60ns at 100C and the system does not overheat and can run stable, even with small heat sinks. This would be the behavior if I settle the IC dead time to 15ns and do not use the fast turn OFF, but 12 Ohms gate drive only.
If we would have black/white ON/OFF any overlapp would immediately lead to cross conduction peaks of several hundrets of amps. In this regard I like the real world behaviour.

I settled to just no crossconduction. But if I feel that the dead time distorsion is not satisfiying me, then there is still some potential to improve by the expense of some heat.

ChocoHolic

quote:

Originally posted by poobah
During the dead-time, the inductor derives its voltage from the diode/switch on the rail opposite the one that was just turned on (active). The distortion comes from the fact that the other rail voltage has a diode drop added to it. This deviates from the expectation that the rails will be symmetric. This distortion falls with rising rail voltage as the diode drop looks smaller in comparison. All this ignores the on-state voltage drop of the switches.

Fet based designs, where the freewheeling is accomplished by a synchronous FET rather than an antiparallel or body diode minimize all this by virtue of the low conduction drop.

Remember, a MOSFET in the on state is happy to conduct in EITHER direction... this is the beauty thing about FET Class D and synch. rectification in general.

:)

If you are talking about UPS duty here... most are thrilled silly with 5% THD. 10% is really the borderline if you want to say "TRUE SINE".

Are you sure that it is a big difference if the choke is connected to 55V or to 55.3V during freewheling time???
I would tend to ignore this, but it is just a feeling from my stomach.
But you can find out if this if you chose a simulation with +/-10kV rails. Then the diode drops are neglectible. If you still find similar dead time distorsion as with +/-50V, then the diodes do not have a mayor influence.

I would rather say that we cannot always easily predict the output voltage of the half bridge during dead time.
Please note the inductor does not only carry the inductive HF ripple, it also carries most of the speaker current.
Imagine a 20Hz signal in a resistive load. May be a 30V sine wave. Let's zoom to an area which is strongly negative, say -20V vs GND.
And assume 4 Ohms resistive load. We have -5A in the resistor.
At 20Hz the cap of the output filter has a very high impedance, but the choke a very impedance. We can simplify that all the load current is also seen in the choke. In addition we have the superimposed HF current in the choke. In example +/-2A. So in this zoomed area the inductor current is rippling between -7A and -3A.
I remains always negative, means always current running into the amp. So turning after turning OFF the upper switch, the halfbridge will NOT slope downwards, the current will run through the upper freewheeling diode until the lower switch turns ON (BTW. This is the situation, where we have to take care of the reverse recovery spec of the freewheeling diode....).
...if we zoom to another area of the LF sine wave, say to something like -1.99A :D then the inductor current will ramp something between +0.01A and -3.99A. At the moment of turning OFF the upper switch, we will have the +0.01A, which will now force the half bridge output voltage sloping towards lower values during dead time. Well with 0.01A this will be only partially succesfull. Inductive energy is low. Sloping speed will be very slow and depend on parasitic capacitances. In result the output voltage of the half bridge is just tumbling somewhere between both rails until the lower switch will be turned ON. This is the hard-to-predict-area, which can easily cause distorsion in my imagination. At least if this undefined time is not so short.
I can also imagine that this effect is getting uncritical again if we make the dead VERY long dead times as some tri state designs have. Because then the HF sloping energy can always fully ring out without being hit from the next switch.

Aspiceman: I bet you have a nice SIM on hand with unlucky dead time adjustment and zoom to some dead time events when the choke current is close to zero... and half bridge sloping is looking slightly strange...
BTW: Of course dead time distorsions are independent from frequency if we settle the dead time as a certain percentage from the switching frequency. But in reality we are facing more the situation that the smallest dead time which we might dare to use is a fixed value... may be 50ns... and if we tie the absolute value to 50ns then the dead time percentage is becoming a function of frequency and in result also the dead time distorsions are becoming a function of frequency.

classd4sure

quote:

Originally posted by fokker

not really. But no matter how many clown faces you put on, you still cannot dispute the fact that that little resistor does what Phillips said it does, contrary to what you said.

and you still couldn't define "application specific" for us.

There's just one clown I'm putting on.

quote:

But that's just one of those ***-U-ME mistakes you so fond of

Please demonstrate exactly where I said said it didn't affect deadtime? I merely suggested it's best used to fine tune deadtime, not necessarily the first place you should count on.

quote:

for a very simple reason: I wanted to see how each driver IC performs vs. others.

Then fix it so you can evaluate its performance appropriatly.

quote:

BTW, you are again dead wrong when you concluded that I haven't even tried the discrete drivers.

I simply hadn't made the assumption you got them working.

quote:

and you still couldn't define "application specific" for us.

Um.... power electronics. Defined sufficiently to make the point you can't just be throwing parts around willy nilly. The rest is up to you.

darkfenriz

Hi Markus
Thank you for your reply, I always admired you for ability to talk about difficult issues in relatively simple words, very educational, unlike some knowledgable wiseguy posers.

I think you already have good slew values. If slew time were lower, than the actual dead time should be higher to avoid cross conduction, right?

What do you think such a discrete half bridge mosfet driver works like?
It seems to me, that it could give both high slew, resonable dead time and low conduction losses. I am just beggining to learn though.

best regards

Pafi

ChocoHolic!

quote:

Are you sure that it is a big difference if the choke is connected to 55V or to 55.3V during freewheling time???

Good to read this!
I wanted to write an analysis of dt induced distortion last night, but I stucked in the "hard to predict" region, and didn't have time to complete it today either, but I didn't give up.

classd4sure

That's Ok but I find there's redundancy in it, unless those series resistors to the gate is a pot for helping to calibrate deadtime.

Better done by moving that elsewhere, say by varying the level of collector current of the first transistor, and /or between the bases of the following two. Your turn off schottky diode is going to hold the gate source voltage up an extra diode drop in that location.

In fact you could replace the 10ohm resistor and paralleled schottky with emitter followers, and whatever snubbers required to control ringing ..slew rates.. emi

poobah

Choco,

Briefly here... but we are both wrong and right... Where the drive-end of the inductor "flies" or "freewheels" during dead-time depends on whether the current in the inductor is flowing "in" or "out"... AH-HA! I was looking at the BUCK cycle while you were looking at the BOOST.

Now... 50V or 50.3V. Well, what "charges" an inducter is volt-seconds. If you were off by a few nanoseconds... everyone here would thrash you soundly until inches from death. So, the same must apply to the voltage.

Back to work...

:)

Pafi

quote:

Not really. If this was the reason, then it would be much less sensitive to dead time. 0,6...1V for a 1...5% of cycle is nothing, especially since this would be constant if you were right. Constant deviation from ideal for a constant time cannot cose nonlinearity.

The problem is much worse, and egsists even with ideal switches and ideal diodes. There is five domain: "ZERO": if inductor current is between -peak and +peak of ripple, then output current in the moment of switching off is on the normal direction for the actual MOSFET, so voltage is immediately changes to the other rail. If we calculate average value of output voltage for a cycle, we find that it doesn't differ from ideal, because there is a positive and a negative deviance as well. But there is a different domain: "POS" If inductor current is higher then ripple peak, then voltage is constantly sit on negative rail during both dead times (there is 2 in one cycle). Average voltage differs -Vcc*2*dead time/Period from ideal. At output current of less then -peak of ripple ("NEG") the situation is the opposit of "POS", voltage is more then ideal for same amount. You can see this on IVX's picture.

But what if output current is equal to +peak of ripple ("POS BORDER")?

To be continued...

Pafi

quote:

If you were off by a few nanoseconds... everyone here would thrash you soundly until inches from death.

Yes, exactly because those nanosecs have to be multiplied by the whole power supply, not only 0,6V!

poobah

Yes... and Volts * Seconds is what puts power into the inductor.

:)

classd4sure

only if it's soldered dude.

poobah

That is sooooooooo meta!

classd4sure

quote:

Originally posted by fokker

how could it be that the UcD is following the lowly Philips on DT adjustment? didn't the wise say that that is only the DT in the "weakest possible sense"?

apparently, the UcD folks also like the "weakest possible" DT adjustments. I wonder if they will ever offer something better than the 'weakest possible" DT adjustment in the next revision.

:)

Well you see they know how to select or rather design the components of the surrounding circuitry in order to get themselves to a point where a weak... or simple .. fine tune adjustment is all that's required.

You don't because you also fail to realize that design is a process that doesn't envolve blindly swapping parts that everything gets designed around like the drivers, which is actually the reason why I pointed out to you that it's a weak means of adjustment in the sense of your total reliance of one particular method that's simply a fine tune on one particular circuit.

In contrast I believe someone made the statement the surrounding values on the philips note were really only good for the components they selected. If you use your own selections, everything changes, more so if you don't have a clue what the hell application specific means at the level of electronics to which you're attempting to work. The parameters in question are defined by design.

classd4sure

quote:

Originally posted by phase_accurate

I assume the main deadtime is already implemented (and properly dimensioned) in the driver stages and this one is just used to fine-tune production tolerances.

Regards

Charles

quote:

Originally posted by Pafi

Not really. If this was the reason, then it would be much less sensitive to dead time. 0,6...1V for a 1...5% of cycle is nothing, especially since this would be constant if you were right. Constant deviation from ideal for a constant time cannot cose nonlinearity.

The problem is much worse, and egsists even with ideal switches and ideal diodes. There is five domain: "ZERO": if inductor current is between -peak and +peak of ripple, then output current in the moment of switching off is on the normal direction for the actual MOSFET, so voltage is immediately changes to the other rail. If we calculate average value of output voltage for a cycle, we find that it doesn't differ from ideal, because there is a positive and a negative deviance as well. But there is a different domain: "POS" If inductor current is higher then ripple peak, then voltage is constantly sit on negative rail during both dead times (there is 2 in one cycle). Average voltage differs -Vcc*2*dead time/Period from ideal. At output current of less then -peak of ripple ("NEG") the situation is the opposit of "POS", voltage is more then ideal for same amount. You can see this on IVX's picture.

But what if output current is equal to +peak of ripple ("POS BORDER")?

To be continued...

What if you only switched when inductor current was crossing zero.... in a single cycle hysteretic converter. Deadtime constraints would be greatly reduced due to being free from the syndrom arguably described as hard switching.

Peak Idle current could also be made adjustable, if not smart, to further immunize it against poor efficiency at low output power.

Differences in overall delay are inherently corrected for in self oscillating amps as well. Seems like the simplest compete solution, solide overcurrent protection is already built in as well. You'd be able really push the switching frequency higher too.

IVX

Jaka Racman

quote:

http://ece-www.colorado.edu/~rwe/papers/CIT82.pdf , fig. 5,6,7

phase_accurate

Actually, there are not reason to have minimal dead time at <10W region (of course approximately -depends from inductor, load impedance and rail voltage) output power, so we can reduce idle consumption by modulating dead time (e.g. 100nS idle to 20ns loaded).

Apart from the fact that in most cases the distortion behaviour below 10 Watt is more important than above - why not precompensate the signal in order to minimise distortion - and leave deadtime constant ?

This wouldn't be easy, I know. Particularly because deadtime-distortion is depending on output CURRENT which by itself isn't necessarily always proportional to output voltage.

Regards

Charles

IVX

Not easy, maybe, because even output current isn't exact point, when small signal linearity will break. Modulated dead time will allow to achieve better efficiency at low power region, or comparable efficiency on the musical signal with lower THD.
For example:
UcD400@factory_idle@5W=.005% THD
UcD400@more_idle@5W=.003% THD
UcD400@factory_idle@80W=.018% THD
UcD400@more_idle@80W=.005% THD
PS: 80W@1KHz/8Ohm=-3db

ChocoHolic

quote:

Originally posted by darkfenriz

If slew time were lower, than the actual dead time should be higher to avoid cross conduction, right?

What do you think such a discrete half bridge mosfet driver works like?
It seems to me, that it could give both high slew, resonable dead time and low conduction losses. I am just beggining to learn though.

best regards

Hi Dark,
yes for very fast slew rates ( = low slew times) I would prefer some more dead to prevent my calm sleep in the night.
But we can look slightly more detailed. What is causing poor precision of dead time?
a) Instable values in dead time generator.
b) Slow slew.
Especially in case a) you have to take care. Better not combine a poor dead time generator with short dead and fast slewing.
Situation b) is less critical. If precision is poor because of slow slewing, it might be worth to try faster slewing. On one hand you make the system more critical, but you gain precision.
In my case with the accurate IR driver I am thinking about exactly this. I might speed up the slewing to the allowed limit of my MosFets (5.5V/ns) and also speed up the turn OFF.... still not finalized.. Besides distorsion I have another reason for this. The IR driver has a fast shut down, which acts immediately if 200ns after the driver output turns to HIGH. It is measuring the Ugs of the switch, means if my switch is not fully in the state of low impendance the voltage drop at high loads might cause undesired shut down. So I do not feel comfortable with a length of more than 100ns for my Miller plateau.

Uuhhhgs. Discrete driver. I only used some PNPs to speed up the pull down in my boost converter but never experimented with a complete driver. In your schematic I would be concerned about the turn OFF delay of the first PNP. You drive this BJT into heavy saturation, so it will need long time for it to turn isolating again.
I remember that I measured in an similar arrangement (but was NPN) roughly 800ns turn OFF delay. 2N2222 and base-emitter resistor of 1k. Unfortunately I do not remember the load and also not the overdrive factor.
You can improve it by anti saturation diodes as in the attached scetch. It limits min Uce to the value of Ube.
For D2 it might be an improvement to use a schottky, if you take care for a type with low junction capacitance. Also take care for the voltage rating of D2. The 1N4148 is only suitable if you use low rail voltages.

ChocoHolic

quote:

Originally posted by ChocoHolic

...prefer some more dead to prevent my calm sleep in the night.

Did I really say prevent??
Aehem... Of course I mean preserve...

Pafi

quote:

http://ece-www.colorado.edu/~rwe/papers/CIT82.pdf , fig. 5,6,7

This is a different type of distortion. Here isn't dead time, but switches have a nonlinear forward voltage drop. This nonlinear voltage affects output during the whole cycle. Mosfets don't have nonlinear forward voltage (OK, this is only an assumption, but quite good on typical conditions), so distortion can arise only when they don't control fully output voltage (eg. during dead time).

Compare Vout vs. Vin curves in this paper, and on IVX's simulation! You can see clearly the difference.

fokker

quote:

Originally posted by classd4sure
I simply hadn't made the assumption you got them working.

you are right, only in the weakest possible sense.

;)

fokker

quote:

and you may well be right on that. However, unless we know precisely what Hypex did, it is a undisputable fact that that little resistor changes deadtime, which is precisely what Phillipse said in that application and what we are talking about here.

until people start talking about but unable to define "application specific" dead time control, :)

classd4sure

wooooooooooshhhhhhhhhhh

IVX

This is my simple test circuit, which i used for fig. "PWM linearity", but it seems, that 3D plot is much more informative! Y -THD logarithm scale (15db=.05%), X -input sine voltage (Gain=8.3, so 6V is almost clipping), Z -THD analyze bandwidth (2k-24k). 25% opacity are 100ns dead time plot, 100% -10ns. 100Khz switching, not so typical, but 4-5x faster rendering. Up to ~20W THD in the both case have relatively low difference (~2/3 times for 1/10 dead time!), and 6 times for >20W.

ChocoHolic

Hi Ivan,
that's a cool simulation!
In your circuit you are ramping something like +/-4.15Apeak HF ripple.
We can see that the THD is nicely low as long as the peak currents of the load do not exceed something like 3A (1.5V x 8.3 / 4 Ohms).
Above this the dead time is starting to have a massive influence...
Really cool. And fortunately with results that match more or less to my imagination. ...so I do not have to scramble my entire current brain model...

Thanks for your simulation with similar values to my planned design!!!

IVX

Hello Markus. Did you note falling 3th harmonic at -6db level (3-3.5v)? Reason is simple, but looks little strange. :)

ChocoHolic

.. hm, I can see the plot.
But my brain does not provide intuitive FFT. :wchair:

Obvious reason, eh? ....not for rookies. :scratch1:

ChocoHolic

Come on Ivan!
..don't let me die dump..

I can easily imagine that dead is influencing the distorsions as soon as the inductive energy of the choke does not properly force the halfbridge output to one of the rails during dead time.
But I have no idea, which effect causes or reduces 3rd harmonic or any other. But your plot is quite interesting, because it looks like the harmonic spectrum would not decrease to higher orders..... I will see what my measurements may show. (Still some months to go.)

Normally HiFi community would rate such a spectrum as unmusical. Or not?

IVX

Well, i've tend to see thing simple.. When our sine just came to the "threshold" of linearity, we can see some "soft clipping" , like y=sin(x)+sin(3x)/10, so in the THD, 3th harmonic is dominate. If our sine will cross the "threshold", we'll see something similar to y=sin(x)+sin(5x)/10. See attachment, of course THD=1/10=10% is too much, but more visual too.

ChocoHolic

...hm.... so, if you look at the scope then area of the HF-ripple peak would appear as something like a 'barrier' ?
Ok, this is still fitting to my intuitive imagination, but at this point I am far from any proper model. I could just say: In this area, the HB-output will not properly slope to the opposite rail before the opposite switch is turned ON. Means HB-output is less than desired... Well, this could act like a barrier... and if we go to even higher levels, then the signal will be strong enough to pass this barrier...
Ahem, well... I must confess my brain model is starting to sound unscientific here....

Do you have screen shots or simulation results (transient analysis), which show such wave shapes? May be less strong, but visible?

Nightmare ahead:
Some math crazy class D nerd throwing 2 pages of math terms into this thread, which properly describe this behaviour... and comment: 'As we can easily see...' ;)

IVX

quote:

Originally posted by ChocoHolic
...hm.... so, if you look at the scope then area of the HF-ripple peak would appear as something like a 'barrier' ?

I can't see such barrier on the HF-ripple peak yet..

quote:

Originally posted by ChocoHolic Do you have screen shots or simulation results (transient analysis), which show such wave shapes? May be less strong, but visible?

Ok, simulation is completed.

ChocoHolic

...looking good.

The nonlinear line coming from low left hand side going up to the right upwards.... Is this output vs input?
If yes, then the flat areas around 1m and 2m are exactly showing what I call a barrier. Or we could call it area of low gain.... or as you described it in your first post with the words 'soft clipping'...

zenmasterbrian

Hello diyaudio. I have been away for a while, preoccupied with a number of RL matters.

Dead Time Induced Distortion

Clearly the analysis of class D noise and distortion, and its relation to dead time, is going to be complex. It will be all the more so because some is harmonically related to the drive, but some is harmonically related to the switching signal. Some is an intermodulation.

Then there are also the effects of the filtering, and the feedback loop.

Interest in Class D

Some of the current commercial interest in class D is driven by the desire for the ultra compact, low cost, low heat dissipation, and high efficiency. This is your portable and shelf systems, and PC sound systems.

This is not my present concern. I am looking at all this from a diy audiophile extremist perspective. The size, cost, heat, and power involved in having a few hundred watts of solid state linear power is of no consequence. It is insignificant compared to what is required for the drivers and the enclosure.

My interest is in ultra high power for subsonics. I'm speaking of power levels that really would be otherwise impractical, and sometimes may not even be obtainable out of a power mains wall outlet.

Opening the Envelope

I've expressed an interest in using BJTs and much lower switching frequencies than are currently the norm. I am also interested in the possibilities of using things like SCRs, IGBTs, GTOs, and some of the other new power handling devices. Most of these require induced commutation.

I am also interested in the possibility of going unisolated as far as the power mains, so long as it is done in a manner which in no way reduces safety, and is done with the oversight of persons qualified to make such assessments.

People build and fly their own airplanes. They do it in conjunction with a community of experts, and the appropriate regulatory bodies.

First Alternative, Class H

An obvious alternative to class D, and the dead time distortion issue, and the filtering of a lower switching frequency, does exist. That would be class H, where the power supplies feeding it are tracking SMPS.

You might think of the actual output devices as a kind of filter, via their PSRR, on the switching frequency. But this filter is nonlinear. Greater dB reduction of the lower switching frequency might be more easily obtainable. The power levels obtainable with just one pair of output devices on a large heat sink could be very large, at least 1kW.

Usual discussions of Class H assume complementary tracking power supplies that are independent. But this probably is not really necessary. You could have just one tracking SMPS that provides both the positive and negative voltages, and responds to either polarity of input signal.

Of course, this SMPS does not have any dead time issue to contend with. I had always said that a Class D audio amp is not really the same as an SMPS.

Second Alternative, Beyond Class D?

The class D dead time issue does seem unsolvable. You cannot design something that will always have zero dead time and no shoot through. Thermal variance and device parameter variance are significant.

Dead time means ambiguity. It is not the problem of there being no output device turned on. There are free wheeling diodes. The ambiguity is when there is and when there is not dead time, and how this corresponds to the input signal.

Its kind of like the ambiguity built into something that is exactly class B.

So why not just design for dead time? Once you do that, you lose the ambiguity. So, any distortion that results will be independent of the drive signal. Instead, it will be harmonically related to the switching signal. It will be inaudible, and it will be filtered out. So it really is not audio distortion. It is only ultrasonic noise of the type that is already present.

Consider how this might work. You have a switching cycle.

For a class D amp, when the input signal is zero, it goes to a state of 50% duty cycle for the positive switching alternation, and 50% duty cycle for the negative alternation.

Consider a different way? Consider an amp where a zero input causes 5% duty cycle for the positive, and 5% for the negative. Then as the input signal goes positive, it increases the output duty cycle of the positive and reduces the negative. The maximum positive duty cycle might be 45%. As it goes to this, the negative switch duty cycle might be reduced to zero. Now, this is another ambiguity being introduced, but it is when the amp is already at large signal extension.

This corresponds to the behavior of a class AB amp.