| homer09 |
Ok im trying to learn the technical aspect of DC offset and its relation to input impedance. Ive read in the forums, but found no clear explanation of the following question:
How is DC offset and input impedance related? What variations in input impedance increase/decrease DC offset?
also, How does one keep DC offset low with a pot as a volume control?
I attached the circuit diagram of the gain clone im thinking of building. |
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| richie00boy |
It just comes down to simple ohm's law. The input draws a current (input bias current) 'I' which, when drawn through an impedance of 'R' ohms, creates a voltage drop 'V' of I*R. As the signal is referenced to ground, the actual level the input sees will be offset by this amount.
Ideally, you try to null out the effects of the input bias current by providing both inverting and non-inverting inputs with the same impedance to ground.
In the schematic you posted, the impedance (and thus the offset voltage) seen by the non-inverting input will vary with the position of the pot wiper. |
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| homer09 |
Richie, i understand how the imput impedance value in ohms is what determines the voltage drop to ground and it is what the opamp sees as input. But, isnt the input signal AC, how is this converted to a DC offset?
In my circuit, will there be large DC offset at the output (at any pot wiper position)? and maybe what forumla i need to caluclate it at any wiper position |
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| richie00boy |
DC offset is just that: DC. Therefore your signal -- which is AC -- 'rides' on top of the DC offset. The offset is there under DC or no signal conditions as a constant voltage at the output of your op-amp and, when a signal is running through the op-amp it is simply in addition to the DC offset.
Forget the input signal causing DC offset, as I mentioned in my earlier post it is the input bias current that cause it. The offset is worsened by using large value resistors to bias the inputs.
The circuit you posted will have a DC offset but, like any circuit of that type it will be harmlessly small.
You already have the formula in my earlier post to work out the DC offset. Find out the input bias current for the chip from the datasheet and it should be obvious what to do :) Just remember to work in ohms, amps and volts. |
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| Evan Shultz |
the largest factor in a circuit of this type, once the compensation resistor is added, will be the value of Rf. the bias and offset currents that flow into the inverting pin must also flow through the feedback resistor creating DC at the op amp output. So, the larger Rf is the more DC offest will be created.
Richie's first post explains that Ohm's Law is all you need to calculate it. He also points out that is should be harmlessly small with nearly any op amp. |
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| homer09 |
| quote: | Originally posted by Evan Shultz
Richie's first post explains that Ohm's Law is all you need to calculate it. |
Well i beg to differ. a formula is useless if you don't know what values to plug in or how to apply it to the situation.
So, for the non EE here, can you guide me through calculating the DC offset for the schematic i posted.
i have:
input bias current: 0.2 uA (typical) *from datasheet as richie asked
pot value: 0 to 250K ohms
feedback: 22K ohms
shunt (NI to ground): 12K ohms
inverting to ground: 680 ohms
and of course, ohms law: V = IR ;)
i understand better through formulas and numbers than through wordy explanations, so dont be shy with the numbers. Thanks for the crash course! :smash:
ps. i know DC offset wont be a problem, this is more for my personal understanding, i would like to build something i understand, not limit myself to following a schematic and procedure blindly. |
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| Stocker |
so you gave the formula. Mix it up with gain of the amplifer.
right guys? or am I off(set) in my thinking?:D |
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| theChris |
DC offset:
assume you have a offset voltage. in you case, this offset is multiplied by the gain of 22/0.68, not too good. this means a 10mV offset becomes over 220mV of offset.
second:
all amps draw some "Input Bias Current" and "Input Offset Current" the latter refers to the matching of bias current. if the impedance of non-inverting to ground is different then the impedance of inverting to ground, this input bias current will induce unequal voltages on each input, leading to DC offset.
input offset explains how likely matching of both resistances is to correct DC offset.
many amp circuits use capacitors to prevent the source from providing bias current to the amplifier, and in the feedback loop to reduce DC gain to 1.
in your example, chaning the pot changes the impedance of one input, thus chaning the DC offset due to input bias currents.
as for AC-DC offset well, it should be very small. such an effect is possible from the non-linear characteristics that are minimized in a good amplifier (or amplifier chip) design. this kinda thing can affect oscillators though. |
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| Yoghourt |
Opamp caracteristics are always related to input.
Dc voltage error on (Ve+ - Ve-) is
Vio - Ib*(Re+ - Re-) +Iio*(Re+ + Re-)/2 + (Vdd+Vss)/(2*CMRR)
Namely:
Vio: input offset voltage
Ib: input bias current
Re+, Re-: DC impedance seen by e+ and e- inputs
Iio: input offset current
Vdd: supply positive rail
Vss: supply negative rail
CMRR: common mode rejection ratio. This last error expresses that ground is not always at the equilibrium point of opamp, which is at mid-point of supplies. In other words: dc offset error related to asymetry of supply. On a big low-frequency transient, one rail of chipamp supply can swing. Effect is that DC offset seems to "jump".
To relate the dc voltage error to output, mutiply by DC gain.
For more precisions, see on-line doc at texas instruments called "opamp for everyone". :) |
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| Keld |
| quote: | Originally posted by Yoghourt
For more precisions, see on-line doc at texas instruments called "opamp for everyone". :) |
Any chance for a link to that doc. Mysearch came up with a lot of interesting stuff, but not that one! |
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| richie00boy |
| quote: | Originally posted by homer09
Well i beg to differ. a formula is useless if you don't know what values to plug in or how to apply it to the situation.
So, for the non EE here, can you guide me through calculating the DC offset for the schematic i posted.
i have:
input bias current: 0.2 uA (typical) *from datasheet as richie asked
pot value: 0 to 250K ohms
feedback: 22K ohms
shunt (NI to ground): 12K ohms
inverting to ground: 680 ohms
and of course, ohms law: V = IR ;)
i understand better through formulas and numbers than through wordy explanations, so dont be shy with the numbers. Thanks for the crash course! :smash:
ps. i know DC offset wont be a problem, this is more for my personal understanding, i would like to build something i understand, not limit myself to following a schematic and procedure blindly. |
Assume that pot is set to top position therefore it's full length is in parallel with the shunt resistor giving a total resistance to ground of:
(250 * 12) / (250 + 12) = 11.45k
Using ohms law, voltage seen at non-inverting input:
0.2uA * 11.45k = 2.29mV
Resistance to ground seen by inverting input:
(22 * 0.68) / (22 + 0.68) = 659.6 ohms
voltage seen at inverting input:
0.2uA * 659.6 = 132uV
The difference between these two voltages is amplified by the open loop gain of the op-amp, giving an offset voltage at the output. However, the calculations above assume that the output is sat at 0V which it will not be due to offset, therefore the voltage seen by the inverting input will be different. |
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| theChris |
| why open loop gain. i would have guessed closed loop, which seems to make more sense. 100uV would give an offset of 1-10V., 2mV should be enough to rail the amplifer. 50mV would seem more reasonable then 20V in this case. |
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| janneman |
| quote: | Originally posted by theChris
why open loop gain. i would have guessed closed loop, which seems to make more sense. 100uV would give an offset of 1-10V., 2mV should be enough to rail the amplifer. 50mV would seem more reasonable then 20V in this case. |
Yes, it is amplified by the closed loop gain. There is nothing magically about this offset voltage. It's just another input signal for the thing, and it will duly amplify it with the cl gain.
So, if you put a cap in the fb arm going to ground, you make the DC cl gain=1, and the offset at the output is equal to that at the input. Gain = 1.
Jan Didden |
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| janneman |
Richieboy,
There are two issues with your original circuit.
Firstly, the equivalent resistance of the feedback citcuit for offset calculation is not 22k, but 680 ohms // 22k. If you want to get it more balanced, that 680 ohms needs to go up. A lot.
Secondly, the volume pot won't work here in practise, because it is loaded down by that input resistor (don't remember the value anymore, but it was WAY lower than the pot). I mean, it will "work" but the control law will be very difficult to use. You should make a load resistance on a pot at least 5x, or better yet 10X, the pot value.
But, why use that load resistor at all? Just use the pot, that'll work!
Jan Didden |
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| homer09 |
| quote: | Originally posted by janneman
Richieboy,
There are two issues with your original circuit.
Firstly, the equivalent resistance of the feedback citcuit for offset calculation is not 22k, but 680 ohms // 22k. If you want to get it more balanced, that 680 ohms needs to go up. A lot.
Secondly, the volume pot won't work here in practise, because it is loaded down by that input resistor (don't remember the value anymore, but it was WAY lower than the pot). I mean, it will "work" but the control law will be very difficult to use. You should make a load resistance on a pot at least 5x, or better yet 10X, the pot value.
But, why use that load resistor at all? Just use the pot, that'll work!
Jan Didden |
The idea here is that the pot is of the linear type. The load resistor is used to change the law of the pot (aprox a log pot) Taking this into consideration, should i boost the value of the 680 ohms? What other effects does changing this value have?
Any insight on what would be the best values for pot, R1 and R2? My requirements are to keep the value of the pot 20x the value of R1 because i think this is a good ratio for the fake law. Also, i would like to keep the feedback at the same value. basically as little change as possible would be nice. |
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| richie00boy |
My mistake, it is indeed the closed loop gain, I got mixed up for a second when writing that as I was in a rush.
| quote: | Originally posted by janneman
Richieboy,
There are two issues with your original circuit.
Firstly, the equivalent resistance of the feedback citcuit for offset calculation is not 22k, but 680 ohms // 22k. If you want to get it more balanced, that 680 ohms needs to go up. A lot.
Secondly, the volume pot won't work here in practise, because it is loaded down by that input resistor (don't remember the value anymore, but it was WAY lower than the pot). I mean, it will "work" but the control law will be very difficult to use. You should make a load resistance on a pot at least 5x, or better yet 10X, the pot value.
But, why use that load resistor at all? Just use the pot, that'll work!
Jan Didden |
Jan, thanks for your comments. I think you have confused me with the original poster as it is not my circuit :) Also, I did use 22k||680 for my calculations. You are correct about the pot loading. My suggestion is to use a lin pot and 56k shunt to give a faked log law. Or keep the existing shunt resistor and use a 50k lin pot. |
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| Keld |
Thanx a lot, now I have my spare time problem (if any) fixed for a looong time . |
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| robo7 |
concerning offset input voltage.
| quote: | Using ohms law, voltage seen at non-inverting input:
0.2uA * 11.45k = 2.29mV
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this holds true when the pot is set to top position, but in
normal use when it sets at a lower position the parallel
resistance is lower, hance the voltge drop is lower. |
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| breez |
| Is the shunt resistor from +input to gnd needed if I have an input capacitor between it and a pot/attenuator? How would the DC offset be calculated if I remove the shunt? |
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| richie00boy |
| quote: | Originally posted by robo7
concerning offset input voltage.
this holds true when the pot is set to top position, but in
normal use when it sets at a lower position the parallel
resistance is lower, hance the voltge drop is lower. |
That is right, and is the reason why I specified at this postition -- it will be the worst case.
| quote: | Originally posted by breez
Is the shunt resistor from +input to gnd needed if I have an input capacitor between it and a pot/attenuator? How would the DC offset be calculated if I remove the shunt? |
The shunt resistor is absolutely vital if you put a cap there as without it the non-inverting input would not be able to get a DC bias from anywhere. |
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| Sheldon |
It helps me when I look at these things to remember that the amplifier is trying to make the voltage at the non-inverting input exactly the same as the voltage at the inverting input (i.e. no differential). It doesn't matter where the voltages come from, just add em all up (in fact, you can add a small DC voltage of the appropriate sign at either input to reach a desired output DC). If you get a little lost, do a reality check based on that.
Sheldon |
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| homer09 |
| Here are graphs showing the curves of the different R(shunt) ratio values. I think the best value would be somewhere in between what janneman recommended and the 1/20 i have in the schematic. What do you guys think? (if anyone wants to see the spreadsheet, just ask) |
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| janneman |
| quote: | Originally posted by richie00boy
[snip]The shunt resistor is absolutely vital if you put a cap there as without it the non-inverting input would not be able to get a DC bias from anywhere. |
Why not use a cap at the top of the pot where the signal comes in? Then you can get rid of the shunt. That shunt is bad, because either it is low for low offset, and then it messes up the pot law, or it is high not to mess up the pot law and then it doesn't anything to help with the offset.
Just use the pot, and for offset balanced values use 1/3 of the pot value. In practise, it means that the offset varies with the pot setting, but it should be low enough not to matter.
Jan Didden |
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| janneman |
| quote: | Originally posted by homer09
The idea here is that the pot is of the linear type. The load resistor is used to change the law of the pot (aprox a log pot) Taking this into consideration, should i boost the value of the 680 ohms? What other effects does changing this value have?
Any insight on what would be the best values for pot, R1 and R2? My requirements are to keep the value of the pot 20x the value of R1 because i think this is a good ratio for the fake law. Also, i would like to keep the feedback at the same value. basically as little change as possible would be nice. |
OK I see. Yes. Well, for the balance condition for min offset you would want each amp input to see the same DC resistance to gnd. So I would put a cap in the pot top, then calculate the equivalent value of the pot with the shunt say at 1/3 rotation, and then select a fb network with the correct ratio and a parallel value close to the pot/shunt etc calculated earlier.
Since your gain will be around 20, the parallel value of the fb network will be close (good enough for government work;) ) to the resistor that goes to ground, so select that to be the same as the pot etc.
To keep noise down, you would want all values to be as low as possible that can be driven from the sources you are going to use.
Jan Didden |
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| homer09 |
| quote: | Originally posted by janneman
OK I see. Yes. Well, for the balance condition for min offset you would want each amp input to see the same DC resistance to gnd. So I would put a cap in the pot top, then calculate the equivalent value of the pot with the shunt say at 1/3 rotation, and then select a fb network with the correct ratio and a parallel value close to the pot/shunt etc calculated earlier.
Since your gain will be around 20, the parallel value of the fb network will be close (good enough for government work;) ) to the resistor that goes to ground, so select that to be the same as the pot etc.
To keep noise down, you would want all values to be as low as possible that can be driven from the sources you are going to use.
Jan Didden |
Yes, this sounds like a good design sequence. I dont understand one thing. If both imputs should see similar impedance to ground, then why is it on Brian and Peter's minimalist gainclone schematic that there is a large imbalance?
Brian's schematic
The way i calculate for this schematic:
NI to ground: 22K + 220 = 22.22K (i guess this is in || with Source, how do you calculate then?)
I to ground: 680
Why does this design get away with it? |
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| janneman |
Well, of course you can get away with it. The offset will be unnecessarily high, but probably not catastrophically so. If they accept that, hey, it's their amp. They will probably claim that it sounds better that way;)
On the other hand, if they couple to the source without a cap then it may actually come out quite nice, if they have a couple 100 ohms output resistance in the source. Then again, that source, if DC coupled, will have some offset of it's own, so that is a dangerous path. Anyway, some builders will use DC coupling, some AC coupling, some will not even know what type of coupling their source has, so the results are quite unpredictable. But that's DIY for you, you pays your money and you takes your chances.
Jan Didden |
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| homer09 |
| quote: | Originally posted by janneman
They will probably claim that it sounds better that way;)
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hehe, of course they would. not to say their amp doesnt sound great, but there will always be diverging opinions and compromises.
Which leads me to my opinion, that no cap is the best cap. So Janneman, is there a way to follow your last recommendation (i think it makes lots of sense) but without adding a cap? im willing to sacrifice lower dc offset as well as more stable input impedance. |
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| janneman |
| quote: | Originally posted by homer09
hehe, of course they would. not to say their amp doesnt sound great, but there will always be diverging opinions and compromises.
Which leads me to my opinion, that no cap is the best cap. So Janneman, is there a way to follow your last recommendation (i think it makes lots of sense) but without adding a cap? im willing to sacrifice lower dc offset as well as more stable input impedance. |
Sure, if you are sure that your source doesn't give out too much DC, there's no reason not to couple directly. Then you can keep the low 680 ohm in place. The low end will also be a bit more tight with DC coupling, although depending on your speakers it may be a bit too much to your liking.
Is that what you had in mind? Maybe I misunderstand your intention?
Jan Didden |
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| homer09 |
My sources should have low DC output since they have caps at their outputs. So yes, i want to couple directly.
So if you could just look over the first schematic i posted (first thread post), would i be ok with those values? or would a lower/higher pot value (while matching resistor within fake law ratio) be better?
I have the choice of the following linear pots: 10K, 15K, 25K, 35K, 50K, 100K, 250K, 500K, 1meg.
And any standard resistor value for shunt.
Thanks for all the help Jan |
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| carlosfm |
| quote: | Originally posted by janneman
OK I see. Yes. Well, for the balance condition for min offset you would want each amp input to see the same DC resistance to gnd. So I would put a cap in the pot top, then calculate the equivalent value of the pot with the shunt say at 1/3 rotation, and then select a fb network with the correct ratio and a parallel value close to the pot/shunt etc calculated earlier.
Since your gain will be around 20, the parallel value of the fb network will be close (good enough for government work;) ) to the resistor that goes to ground, so select that to be the same as the pot etc.
To keep noise down, you would want all values to be as low as possible that can be driven from the sources you are going to use.
Jan Didden |
Good advice.
But there are other ways also.
Like a good fet-input op-amp as an input buffer (between the pot and the power amp chip).
The input stage will give stable impedance to the (bipolar) power amp chip.
The coupling cap can be used between the two stages, or in alternative before the pot, as it protects the pot too from DC-offset from some distracted diy experiences.:hot: :D
For those who sometimes connect portable devices to their systems a coupling cap is mandatory. Most of those devices have a shared headphone/line out plug, and they don't have DC with headphones (low impedance) but as line-out they have sometimes 5~10mv or more DC-offset, and that will be amplified by the amp's total gain. :hot: |
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| homer09 |
Richie, here is the fake-law simulation spreadsheet you wanted.
My only request in exchange is if anyone finds a mistake or makes a useful improvement to share their work here.
The sheet is pretty rough, but its functional. Just change pot/shunt values that are highlighted in yellow, everything else should update on its own. I didnt know what function to use for ideal log pot, so if anyone has a better aprox to an audio log taper, do share. The sheet also calculates input impedance, useful for choosing pot value.
:att'n: download at yer own risk, no guarantee of accurate calculations, always double check! :angel: |
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