| darkfenriz |
hallo
Have you ever used (or considered:D ) something like this ?
seems to cancel some distortion compared to CFB, doesn't it? |
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| PRR |
> something like this?
Never seen it done like that.
Without the stack-o-diodes, and with two long-tail current-sources for the input pairs, it is an old idea sometimes attributed to Dan Meyer.
Such ideas keep coming up. Some excellent designs are like this. And the symmetric elegance is seductive. Yet many (even most) very fine amps are built without push-pull differential.
The killer issue is setting a stable current in the second stage, your Q10 Q9, with variations in parts and temperature. At a glance, I suspect yours works better in a simulator than it will with real transistors of various Betas. (The fact that R19/R35 is about the same as a typical Beta suggests that if you change transistor, you have to change the R19/R35 ratio, which is unproducable.)
What do R46 R47 do for you?
I see C12 C13 and wonder if that is enough frequency compensation to be stable, especially when current and Ft in Q10-Q19 is wandering all over the place. It is customary to take some capacitor feedback around the 2nd and buffer stages to keep their phase response predictable in the face of changes. Your system may well work, or may work with an ideal resistor. |
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| Mr Evil |
| I have seen that done before. In particular, I remember reading an article in Electronics and Wireless World some years ago with such a differential in it as part of an amp with extremely high slew rate. I think it was one of a number of alternative methods given to set the current in the differentials rather than the normal current sources. |
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| jcx |
many modern high speed voltage op amps are derived from their current mode cousins by adding a push-pull buffer to the low impedance negative input resulting in a balanced push-pull differential stage
i believe a japanese researcher created a variation he called a "Diamond differential" input stage in a mid 80's jaes article
LT1794 op amp simplified circuit: |
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| Steven |
| quote: | Originally posted by jcx
i believe a japanese researcher created a variation he called a "Diamond differential" input stage in a mid 80's jaes article
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Yes, I've seen it from Sansui in the eighties. They called it a diamond differential. They used it as a second stage in a fully balanced amplifier (BTL), using all 4 collector outputs. The first stage was a simple JFET differential, driving the diamond. I think I have an AES preprint somewhere describing it.
Steven |
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| Steven |
Found it back: "Fully balanced bridge amplifier", Susumu Takahashi and Susumu Tanaka, Sansui Electric Company, Ltd., Tokyo, Japan. AES preprint 1918, presented at 72nd Convention 1982, Anaheim ,California.
I did not scan the complete preprint, only the actual diagram. In the text it is called "diamond differential circuit".
Steven |
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| jwb |
| What's the advantage supposed to be? The node at the center of the four emitters is (should be) constant voltage, so why bother connecting the diffs together? |
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| MikeB |
Hi !
I would say, this one is very sensitive to fluctuations from PSU, as
current through diodes changes with supplyvoltage, changing the
bias through the diffamps. (You could replace the resistors with ccs)
You could replace the bjts in the diffamps with jfets, not needing
the bias-stuff with the diodes. I already tried that, works very fine !
(With amazingly stable currents, giving high psrr)
The jfets work without the diodes because of their ability to work
with negative Vgs for currents below Idss. So you get pefectly
balanced symetrical input !
Mike |
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| anli |
| quote: | Originally posted by MikeB
I already tried that, works very fine ! |
Mike, is it possible to look at this your schematics?
Does "tried" mean that you have rejected such amp later?
Andrew |
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| MikeB |
| quote: | Originally posted by anli
Mike, is it possible to look at this your schematics?
Does "tried" mean that you have rejected such amp later?
Andrew |
Yes, i rejected it later, but this was before i knew how to "cure"
the problem with bright sounding amps... That was the reason
why i rejected the topology, not knowing better.
Except the bright sounding everything else was "perfect".
Attached is a circuit how i would build it today, but i have not
exactly built this one, the vas is different now...
The vas in the rejected one was without rloads to the vas and
without cascodes. Also i no longer use cdoms in my latest amps...
I think i will try this one later. It's seems the only way to get perfect
symetrical currents in a LTP. In sims, DC-offset for openloop (!!!) is
30mv, closed loop down to 6.4uv. (Without DC-blocking cap)
In real world of course it will be impossible to match the jfets this
closely...
The current through the LTP is determined by the 150ohm and the
idss of the choosen jfets. For higher power the jfets needs to be
cascoded of course...
The THD of this circuit is ~0.008% with 20khz swing ~12volts.
Mike |
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| deleveld |
| Because that way the stage can deliver lots of peak current. The ouput current isnt limited like a LTP is by the tail current. |
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| anli |
Mike,
Thanks for the schematics, I see. Of course, any schematis brings questions :-)
What is the "cure" you are talking about?
Have you tried some kind of such TDBDC ("Twin Diamond Balanced
Differential Circuit") outside of a global NFB?
Andrew |
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| MikeB |
Hi anli !
The "cure" are the 2 100k in the vas, reducing the gain of vas and
increasing openloopbandwidth.
No i haven't tried the "TDBDC", as with jfets it was not necessary...
Somehow i believe, jfets in LTP are a nice thing. And i am not the only
one believing this... (like upupa ?)
Mike |
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| darkfenriz |
nothing new under the sun...
PRR and MikeB
R46 & R47 in my schematic and Mike's 2 100k resistors to the ground are virtually the same, aren't they?
Mike- how do you get these 1,87V voltage sources? with LEDs or something
thanks for replies!!!
cheers |
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| Cortez |
I have read an opinion about these symetrical LTP designs,
and a wise man has told that the asymmetrical version
produced ~half amount of distortion with the same conditions
against the "push-pull" configuration, so i think we must be
carefull with these symmetrical designs ! :apathic:
Off:
MikeB please tell me about those RCs in the LTPs.
Is this a theory-based solution or the practice forced you to do this ? |
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| thanh |
vossie also has a schematic is similar this topo .He rarely join solid-state forums .He oftens go to pass-labs forum
if diode is front of base of transistor , how is noise? i think this is a noise source and is amplified by diff stage ,so i did learn more about this topo |
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| padamiecki |
| quote: | Originally posted by darkfenriz
hallo
Have you ever used (or considered:D ) something like this ?
seems to cancel some distortion compared to CFB, doesn't it? |
Very fine circuit, hold on!
I guess that Pavel Macura's new correction amp topology was used to design it?
Anyway have you built it yet?
How does it sound?
Using darlingtons at the output might be a not completly a good idea, might spoil the sound, why did you use them? |
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| MikeB |
| quote: | Originally posted by darkfenriz
R46 & R47 in my schematic and Mike's 2 100k resistors to the ground are virtually the same, aren't they?
Mike- how do you get these 1,87V voltage sources? with LEDs or something
|
Yes, your r46/47 do the same job, but you should use them against ground,
or you introduce ripple from the powersupply into the vas.
And yes, the 1.87volts are measured from my green leds fed with 2ma.
But i only posted the schematic because of the LTP, showing what
i meant with using jfets in this configuration. It gives constant
current through the LTP, and the absence of any ccs gives excellent
cmrr. (In theory)
Also partsnumber is greatly reduced.
In practice, when switching off this amplifier, it kept playing undistorted
until voltage reached some ~5volts, then it suddenly went silent.
This shows how stable the current through the LTP must be.
I rejected this topology earlier, as i was not sure what caused the
bright sound. Except the bright sound, the amp sounded pretty
good, even the bright sound was not really annoying, simply wrong.
| quote: | Originally posted by Cortez
MikeB please tell me about those RCs in the LTPs.
Is this a theory-based solution or the practice forced you to do this ? |
No, it's not theory, it's practice. I make feedbackcompensation this
way to avoid cdoms. Seems to sound sweeter, and in sims gives
better results for higher freqs.
The dominant pole for this configuration is ~31mhz, which seems
pretty high for me.
Mike |
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| darkfenriz |
witaj padamiecki rodaku
nietety moje projekty zwykle kończą swój żywot na kartce lub w spicie :)
aktualnie jeden cierpliwie oczekuje na płytkę..
na razie
hi thanh
well I could give a big cap parellel to these diodes
hi MikeB
in reality I consider a regulated supply for diffy+vas and unregulated for O/P
besides.. it is hard to say why I'd rather give these resistors to rails, but I would :)
JFETs do seems better in this configuration I agree
THANKS FOR REPLIES
BEST WISHES FOR 2005 |
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| lumanauw |
| Another non usual topology. What does it do? |
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| Mike Gergen |
| Except for the string of diodes these circuits are similar to what Borbely has been doing for years. |
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| PRR |
> Another non usual topology. What does it do?
Makes 50 Watts in 8Ω. Good if you can hear 1MHz.
T1-T8 run Class AB. They give voltage gain to the FET Gates. Source resistors unbalance the current mirrors.
I can't jot the bias or performance without knowing the properties of R17 R18. ("3cm resistance wire..." isn't enough.) But guessing:
At high current the whole T1-T10 chain runs in transconductance mode: input voltage sets output current. Special features are that: Beta can be very low, meaning performance is little changed up to nearly Ft; FET Gate capacitance is strongly driven and does not dominate response inside the audio band. Somewhere above 1MHz the declining Beta and Gate impedance makes the whole thing run out of steam quickly. |
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| lumanauw |
How can T3 and T4 form properly current mirror, if one has R17, and the other has emitors straight to rail?
I read that this topology has a "non-turnoff" property for final transistors. Always on, although it do not run in classA. How to trace this non-turnoff in this cct? |
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| darkfenriz |
lumanauw
this 2 diodes seem to be not enough for 2 times Vbe voltage drop, so the input stage may work (depending on transistors) in push pull class A through AB, B to C.
you MUST use more diodes vith bjts in diffy..
also it seems hard to adjust biasing and nothing seems to preserve output mosfets fromturning off.
Also the purpose of opamp is ?????
I don't understand it - it is weak or as brilliant as I cannot imagine |
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| thanh |
| i think R17 ,R18 give a temporature stable for mosfet. Perhaps emitter of T4 is wired wrongly |
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| PRR |
> How can T3 and T4 form properly current mirror, if one has R17, and the other has emitors straight to rail?
I did say, didn't I, that it was "unbalanced"? Mirror ratio is 1:1 minus a function of output stage current. This gives negative feedback. It appears that output stage current is a function of error voltage. Also the unbalance vanishes at small output stage current, so the output devices are not driven hard-off.
> this 2 diodes seem to be not enough for 2 times Vbe voltage drop
Another (poor) current mirror. ASSuming that junction size is similar, diodes and BJTs (approximately type for the types specified) then T1 T5 current is similar to D1 D2 current. D1 D2 current can be trimmed with RV1 RV2. I assume these are trimmed for some small voltage across the 10 ohm resistors.
> the input stage may work (depending on transistors) in push pull class A through AB, B to C.
It will never run Class C (except in gross overdrive) and won't stay in Class A well. It is clearly intended to run in Class AB, probably with a few dozen milliVolts across the 10 ohm resistors at idle, and maybe 50mA peaks to whang the FET Gate capacitance.
> the purpose of opamp is ?????
The output stage T1-T10 makes good power and bandwidth, but has low and very variable input impedance, wide swing in input current, and voltage gain around 5. THD is low for a power stage but higher than we might want. DC error is non-negligible. For a complete hi-fi amp we want more gain, higher impedance, and (in best 1980 thinking) more global feedback. The opamp does that.
> i think R17 ,R18 give a temperature stable for mosfet.
FET tempco is completely inside feedback. Output stage hot-up can't cause thermal runaway. RV1 RV2 offset the BJT quad which forces a correcting offset across R17 R18, fixing output bias current. The BJT quad has large tempco which is first-order corrected by diode tempco. Diodes and BJTs should be thermally coupled. |
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| darkfenriz |
hi steven
the schematic you attached is GREAT for me but not high input impedance I fear, yes? |
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| padamiecki |
| quote: | Originally posted by darkfenriz
witaj padamiecki rodaku
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tak, niestety bóg uczynił mnie Polakiem| quote: | Originally posted by darkfenriz
nietety moje projekty zwykle kończą swój żywot na kartce lub w spicie :)
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tak, jak moje!!!| quote: |
aktualnie jeden cierpliwie oczekuje na płytkę..
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jeśli ładnie gra, to mogę się dołożyć do płytki (jeśli gdzieś je zamawiasz?) i zamówić na wersję stereo, będzie taniej.
By the way, the design sent by Steven is realy fine |
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| Steven |
| quote: | Originally posted by darkfenriz
hi steven
the schematic you attached is GREAT for me but not high input impedance I fear, yes? |
Correct. Input impedance will be determined by the input series resistors because of the shunt feedback.
Steven |
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| darkfenriz |
I would give a buffer/opamp then and small series resistors to minimize thermal noise of feedback substraction
regards |
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| Steven |
It's an output stage, so noise of the input resistors is normally not a problem at these levels. You can take 10k input resistors to get a reasonable input impedance and still low noise.
Steven |
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| thanh |
| this is my puss-pull diff amp,and thd is not low |
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| bobo1on1 |
| How about this push-pull input stage? It probably doesn't work but it might be fun to look at it. |
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| darkfenriz |
thanh
how do you mean 'not low'?
could you attach the same in log scale |
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| thanh |
| quote: | Originally posted by darkfenriz
thanh
how do you mean 'not low'?
could you attach the same in log scale |
"not low" means is high :D .
frenquency or Voo in log scale ? i will try to do it:) |
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| thanh |
hi bobo1on1! i think it is a puss-pull input stage not diff
it seem to be a CFB topo |
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| thanh |
| oh! i can't .in time domain analyst ,orcad can's display values in db |
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| MikeB |
| Oh, it can ! Just replace V(...) with VDB(...) ! |
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| darkfenriz |
of course it can't as log of negative value is not real
do it in fft domain |
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| Jennice |
| quote: | Originally posted by darkfenriz
hallo
Have you ever used (or considered:D ) something like this ?
seems to cancel some distortion compared to CFB, doesn't it? |
Yes, except that I do not use D3-D10, but have 100R from the feedback point to rach LTP transistor, and 100R from input to each LTP.
The basic idea is the same, though, and it works great for me. :D
Jennice |
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| john curl |
This type of input stage has one potential advantage. It is that the input stage can 'source' more current than just 2I(q), which is the limitation of using a current source for a single or dual differential input pair. This can improve slew rate in many circuits.
The standard transistor input complementary differential input stage was independently developed by Jon Iverson (Electroresearch) and myself (Ampex) in the late 60's, but was not published. Daniel Meyer (Southwest Technical) was the first to publish it in the early 70's in 'The Audio Amateur'.
The FET input version was developed by me in the early 70's and first published in 'The Audio Amateur' in 1977 as part of the JC-2 schematic.
The 'diamond differential' was independently developed by Sansui in the early '80's and essentially had a single differential input stage. The same circuit can be made with fets in the complementary stage and the diodes eliminated from the circuit. |
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| thanh |
I can't buy jfet and jfet seem to be "not matched each other" .Addition the break down voltage of jfet is often not high
I use 4 diode and degenerationresistor is too big => harmonics distortion is quite high with 1khz signal |
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| darkfenriz |
in graph you've attached I still can see hardly any harmonic distorion
what is more 1kHz peak seems to be high
are you sure you interpret results of simulation properly or did you attach wrong graph? |
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| Mr Evil |
| quote: | Originally posted by darkfenriz
in graph you've attached I still can see hardly any harmonic distorion
what is more 1kHz peak seems to be high
are you sure you interpret results of simulation properly or did you attach wrong graph? |
It looks like an FFT from an input of 1kHz and the output fundamental at probably 1.0V, although that can't be seen on the graph. That would make 2nd harmonic distortion at ~33mV to be ~30dB down, which is rather high. |
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| darkfenriz |
33nV to 1V is down 75db in Voltage and 150db in power.
poeple
racall properties of Fourier transform !!!!!!!
1.winowed function's tranform is original tranform convolved with windowing function transform
2. Time's standard deviation*bandwith standard deviation >=1/2 (Heisenberg priciple)
If you use orcad :
edit simulation settings:
run to time: 5s or more(for adequate peak sharpness)
maximum step size: 10us or less (to prevent from aliasing)
results may be suprising... |
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| john curl |
| IF you have to use transistors only, then using 2 current sources to bias the input stage, coupled with a 100 ohm resistor between the emitter pairs would give better performance. |
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| Mr Evil |
| quote: | Originally posted by darkfenriz
33nV to 1V is down 75db in Voltage and 150db in power... |
But the scale is in mV, not nV. |
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| darkfenriz |
yes it is in mV
NETHERTHELESS it is not a 33mV peak
it is a decreasing slope of 1kHz |
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| thanh |
| quote: | | are you sure you interpret results of simulation properly or did you attach wrong graph? |
i will retest| quote: | | It looks like an FFT from an input of 1kHz and the output fundamental at probably 1.0V |
oh! no! output voltage is about 20V
You seem to be not ever use orcad!
hi John Curl! Do you mean a normal fully symmetrical amp? |
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| thanh |
| ok! i upload some file |
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| DIGORA |
hi
you are sure that the input diodes are essential?
I would like to do something like this :
( UGS with only bjt)
thx |
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| darkfenriz |
| yes, essential for bjt. stage |
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| Workhorse |
I am thinking on building a prototype using diamond differential grounded bridge amp with monorail switching either in class-H or Class-G......
Any suggestions?? |
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