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Charles, we need your help on feedback in single supply Class-D - Click HERE for Original Thread
Workhorse
Hi Charles,

I want to use the Clocked version of Class-D amp in Single Supply mode. But my confusion is regarding feedback network, i want to use feedback from before filter and to inverting input of comparator. there is no level shifting though. So what would be a good scheme to connect the feedback, is it possible or not.
Reply soon.
Sincere regards,
kanwar
phase_accurate
NFB from before the filter is usually done with a summing integrator. Since these are "inverting" you'd have to swap the inputs of your comparator.
But for heaven's sake ,what do you want to use this for (i.e. single supply) ? As a voice-coil cooker ?

Regards

Charles
classd4sure
deleted
Workhorse
quote:
Originally posted by phase_accurate
NFB from before the filter is usually done with a summing integrator. Since these are "inverting" you'd have to swap the inputs of your comparator.
But for heaven's sake ,what do you want to use this for (i.e. single supply) ? As a voice-coil cooker ?

Regards

Charles

SALUTE Charles,

ThanX for the Help.

Can we Swap the inputs of IR2110 instead , I mean to say Hi and Lo inputs swapping. is it possible. If not , than would I have to add another opamp as summing integerator for this, is there will be an DC offset Problem asscociated with single supply feedback.
kindly advise us.

No, we dont want to cook Voice- Coil, I simply want to use these 2 modules in Bridging topology , there is no cooking indeed.:D

Sincere Regards,
kanwar
phase_accurate
You can of course change phase by swapping the input control signals.
Between the lines I somehow feel that you wanted to use the comparator as integrator to avoid another op-amp. You definitely can't do this for several reasons.
So you will definitely need another op-amp for the integrator. There would also be a possibility for doing this just passively. But apart from simplicity I don't see any advantages of doing so.

There is no offset problem if everything is properly referenced to the same "ground", which is not the negative supply rail but an "artificial" at half the supply voltage.

Regards

Charles
TEXAS_OUTLAWS
quote:
Originally posted by phase_accurate
You can of course change phase by swapping the input control signals.
Between the lines I somehow feel that you wanted to use the comparator as integrator to avoid another op-amp. You definitely can't do this for several reasons.
So you will definitely need another op-amp for the integrator. There would also be a possibility for doing this just passively. But apart from simplicity I don't see any advantages of doing so.

There is no offset problem if everything is properly referenced to the same "ground", which is not the negative supply rail but an "artificial" at half the supply voltage.

Regards

Charles

Hi Charles ,
ThanX for your Advise,

So what will be your suggesstion:
1) using an extra opamp

or

2) Swapping the control inputs.

We want to use control signal swapping as these can contribute lot more to simplicity.

Advise us, so that we can move further.

Regards,
kanwar
phase_accurate
Hi Kanwar

You seem to be a multiple personality ! ;)
quote:
So what will be your suggesstion:
1) using an extra opamp

or

2) Swapping the control inputs.

I am afraid you don't have a choice of either one or the other. You'd have to do both. You will have to use a summing integrator for your feedback (alternatively you can use the same integrator for both NFB and triangle generation).
And you will have to change the phase of the PWM signal by either:
1.) swapping the comparator inputs or
2.) swapping the fixed H and L signals on the 2nd XOR inputs or
3.) swapping the mosfet driver's control inputs.

Regards

Charles
Workhorse
Here is the figure
Workhorse
hi Charles nice advise , but still under confusion.

I want to use a carrier based Class-D approach.

therefore , I will take LM6172 as Triangle generator.
According to my understanding about what you have said is that the triangle generator can be used as both for feedback and integerator, Am I right if not then correct me. than what about comparator.

regards,
kanwar
phase_accurate
The circuit as shown would not work. You would need a summing integrator. You could do this to a ceratin degree by connecting a capacitor from the inverting input of the comparator to signal ground. But this would be suboptimal.

If you use the opamp as triangle generator directly then you can't use it as integrator as well at the same time (though I have to do some thinking about that) but you could use an opamp as a self-oscillating class-d modulator directly (i.e. hysteresis modulator).

If you want to generate the triangle by integrating a rectangular, then you can use the integrator for the NFB as well at the same time (like the old Sony patent).

But you will definitely need to add something to your schematic !

Regards

Charles
Kenshin
passive intergrator v.s. op amp:which will produce less distortion?

the passive one produces a slightly non-linear triangle,but the nonlinear effects is very low when the level of triangle is small.
(maybe the harmonics involved can be analysised by taylor series expansion,but i haven't do any calculations yet.)

Some peple reports that a hyersis modulator made of 555 timer,with a hyersis of VCC/3,produces only 0.8%(maybe 2.5%) THD.

op amp has finite SR and it's sensitive to noise and TIM.
fast op amp can prevent this,but they are also expensive.
quote:
Originally posted by phase_accurate
So you will definitely need another op-amp for the integrator. There would also be a possibility for doing this just passively. But apart from simplicity I don't see any advantages of doing so.
tawen_mei
I think you will have a shoot-thru problem.

The two drivers in 2110 are independent, so they may overlap, and there's nothing in your circuit that creates dead-time.
Kenshin
is there any gate drive ICs with internal dead-time?
quote:
Originally posted by tawen_mei
I think you will have a shoot-thru problem.

The two drivers in 2110 are independent, so they may overlap, and there's nothing in your circuit that creates dead-time.
classd4sure
quote:
Originally posted by tawen_mei
I think you will have a shoot-thru problem.

The two drivers in 2110 are independent, so they may overlap, and there's nothing in your circuit that creates dead-time.

They're being driven by a pair of gates which are splitting the signal, so the drive signals won't overlap.

The dead time is created internally by the driver's turn on prop. delay Vs turn off prop delay, this is all that IR uses in their reference design.

Dead time is a bad thing! (may the flames begin)

Has anyone tried one of those predictive gate drivers yet?
ssanmor
mmmm, workhorse, your design resembles a lot to what I posted in this forum about 1 year ago or more (LM6172 triangle generator, XOR gates at IR2110 input, LM319 comparator...

I did some experimentation and also with symmetric supplies and no level shift, with all (triangle gen, error opamp and comparator) using a single supply referenced to Vss, with of course capacitive coupling at the input, but had variable offset problems and distortion figures were not very good so I abandoned that approach although it was much simpler.

If that's an experiment and you are doing it to learn and for personal use, no problem for me (that's what this forum was created for).

Have luck.
subwo1
quote:
Originally posted by classd4sure


They're being driven by a pair of gates which are splitting the signal, so the drive signals won't overlap.

The dead time is created internally by the driver's turn on prop. delay Vs turn off prop delay, this is all that IR uses in their reference design.

Dead time is a bad thing! (may the flames begin)

Has anyone tried one of those predictive gate drivers yet?

I thought the IR211x had some built-in dead time.:) My impression is that dead time is bad, though it may be better to margin toward DT than toward cross conduction in most cases these days. But, DT does raise distortion and noise, so I can understand your interest in adaptive DT. I appreciate how you have shed light upon the problems concerning MOSFET body diode conduction, too.
classd4sure
quote:
Originally posted by subwo1


I thought the IR211x had some built-in dead time.:) My impression is that dead time is bad, though it may be better to margin toward DT than toward cross conduction in most cases these days. But, DT does raise distortion and noise, so I can understand your interest in adaptive DT. I appreciate how you have shed light upon the problems concerning MOSFET body diode conduction, too.

Why thank you. I appreciate that you're one of the guys who brought it to my attention.

It seems clear both overlap and lots of dead time aren't the answer and so the middle ground must be found. Predictive delay is said to "eliminate" body diode conduction! I'm not that picky, adaptive would do fine for now, and the effort would have big payoffs, aside from THD and EMI, you gain a very robust gate drive that has an iron grip on any mosfet you want to swap in your circuit.. we don't drive our cars blind, why do it with mosfets?

The benefits of doing it adaptively are many. Drawback is complexity (DIY'rs don't seem to care about cost). Lot's of IC drivers have used it for awhile (late 80's?)..they seem geared towards low voltage regulators, and I really hate being a slave to an IC, (I have some ideas..) but for now the LM5401 seems rather quick, with nicely matched, short delays and good for 100V, with a full bridge that's respectable. It has a single input, so if you start off opposite phased split signals that can't overlap, a full bridge should be easy.

Everyone seems to like using the IR2XXX stuff, but the delays and matching are horrible, sure it's good to 600V, but I haven't seen that put to use either?

Hopefully they'll realise there's a market for better drivers for something other than notebook, PDA and cell phones!
subwo1
quote:
Originally posted by classd4sure


Why thank you. I appreciate that you're one of the guys who brought it to my attention.

It seems clear both overlap and lots of dead time aren't the answer and so the middle ground must be found. Predictive delay is said to "eliminate" body diode conduction! I'm not that picky, adaptive would do fine for now, and the effort would have big payoffs, aside from THD and EMI, you gain a very robust gate drive that has an iron grip on any mosfet you want to swap in your circuit.. we don't drive our cars blind, why do it with mosfets?

The benefits of doing it adaptively are many. Drawback is complexity (DIY'rs don't seem to care about cost). Lot's of IC drivers have used it for awhile (late 80's?)..they seem geared towards low voltage regulators, and I really hate being a slave to an IC, (I have some ideas..) but for now the LM5401 seems rather quick, with nicely matched, short delays and good for 100V, with a full bridge that's respectable. It has a single input, so if you start off opposite phased split signals that can't overlap, a full bridge should be easy.

Everyone seems to like using the IR2XXX stuff, but the delays and matching are horrible, sure it's good to 600V, but I haven't seen that put to use either?

Hopefully they'll realise there's a market for better drivers for something other than notebook, PDA and cell phones!

Thanks, too. The LM5401 may not be a bad option. I may try some.

Since I mainly play around with power
supplies, I am actually quite attached to the IR211x,
though. I like the pin layout because it enables me to easily keep the
driver sections close to the MOSFETs. I have gotten its bootstrapped supply up to about 500v already. Another time, I blew one because I forgot to connect the common to the upper MOSFET source, or some such mistake, and the bootstrap supply floated up to oblivion. :D

I'm probably not the average DIYer since I do tend to seek value. I still spend a lot on parts, nonetheless. I think it is that I like
circuits that use easily available parts, and not too many of them as well. I often seek a compromise in design which may cost a little more but also make a design smaller or more forgiving.

I would be afraid concerning newly developed ICs that they will only be
available in surface mount. The only surface mount items I tolerate are the S0-8 MOSFETs. I may be able to avoid them, even, on the project I am working on now if switching times can be slower and gentler with small die MOSFETs.
classd4sure
Hi,

Here's a fine example of the regenerative affect acting to snap on the high side mosfets, you can also see the loading of the discrete driver.

Sadly it seems to function best as a driver when heavily loaded, I've found that a very fine balance must be achieved, because it doesn't seem possible to have non overlapping signals unless the driver is partly loaded down. This causes gate signal amplitude to vary with duty cycle. It would likely therefore be wise to select a higher drive voltage, like 15V, to lessen the detrimental affects of the gate drive signals and help maintain a constant RDSon.

To reduce the risk of overlap, it is easier to use very low current to switch the drivers with, however, too low a current and it wont' switch fast enough. This is additional to the dimensioning of the driver values to create loading as well (you need both a lightly loaded driver, and weak signals), both techniques serve to reduce overlap of the gate signals. So it is obviously only an optimal driver in terms of reduced part count, and can be made to function, although, not very well, and not without risk.

The reason to have slow turn on is to give the slow body diodes time to recover and become blocking before turning on the opposing mosfet into it.

This seems to be a half solution. Slowing of the turn on signal increases dissipation in the mosfet, and I believe helps to increase THD as well. Futhermore, it seems the regenerative affect operating on the high side mosfet's gate works against the solution.

I view all the above as strong arguments for the case of adaptive delay.

The attached gate drive signals are from simulation of a full bridge done using seperate high side Vdc sources. You can see that as loaded as it is, there's still a worrysome amount of overlap, requiring lowered current from the comparator output, but as I said that is a compromise in switching performance.

In conclusion, simple discrete drivers suck.

Thanks
subwo1
Looks almost identical to a small signal transistor common emitter circuit with about a 10K ohm pull-up on the collector. I used such as inputs to the IR211x a while back. I even had such a waveform as the output of the ubiquitous two transistor multivibrator directly feeding the input gates of the 211x, providing a drive waveform with built-in dead time for an unregulated off-line AC to DC converter.

You can also obtain such a waveform from the output of the 6n137 optocoupler, but the usefulness of it is limited by the fact that when the opto is off, the output is high. For that reason, it tends to destroy MOSFETs unless current is supplied to the emitter diodes of the optos before power is applied to the MOSFETs. The open-collector outputs of the optos need to be pulled low first.
classd4sure
quote:
Originally posted by subwo1
Looks almost identical to a small signal transistor common emitter circuit with about a 10K ohm pull-up on the collector.

Yup, good eye. It's the basic 2 transistor mosfet driver posted earlier, as seen on the UCD patent etc.

1.2K pullup (100 Ohm in series with the gate), 600ohm turn off resistor, and driven with about 2mA from the comparator, VCC 15V.

Nice note about the optocoupler method.

All this driver talk might have been better off in one of the driver based forums, but as a classd reference thread, it's all on topic :)
subwo1
Ah yes, thanks. That driver output waveform is interesting. It does rise very slowly, more so than I would have expected. I guess that is why it switches the MOSFETs very smoothly and why MOSFET selection is critical.

The optos I mentioned could not produce anything close to UcD quality because they are not linear but behave more like TTL, I guess. I do hope to try out the H11Fx bidirectional FET output opto as a level shifter in a classD amp sometime, since it is linear and rated almost as twice as fast as a bipolar output type.
tawen_mei
phe waveform, the rise time (500ns) is way too long. Is that from simulation or actual scope capture?

Haven't seen the schematic of the circuit you guys are talking about, but I'm hearing 1.2Kohm pull-up, 600ohm pull-down, and 100ohm gate resistor. These figures are excessive!!! How much dead-time are you running with? what kind of efficiency are you getting? what about THD? Typically the rise/fall time for a 500KHz switcher is <50ns, and more like 25ns...

Driver pull-down strength should be <3ohm. If it's too weak, to cut the story short, the weak pull-down can't keep the FET off when the switched node is slewing. Pull-up strength is a compromise of EMI and effienciency (and THD in class-D amps). No gate resistor should be needed; if you have ringing/EMI, that means you have layout problems. You may try to limit the pull-up strength somehow, but only without introducing additional impedance in series with the gate. The FET's parasitic gate resistance (>1ohm) and inductance (1nH) is already bad enough you don't need to add more.

That said, you should not be using anything bigger than SO-8 FETs. Okay, DPAK is absolutely the limit. The inductance in those TO-220 packages prevents any switching at serious speed. If you try, at best it runs hot, typically it will run for a second and the package will smoke or explode in your face (depending on the up-stream power supply).
subwo1
Hello tawen_mei. I hope you enjoy the forum.

My ramblings seem to have foundation in my lack of complete equipment, being a lowly DIYer. I work from the perspective that I probably will never get beyond point to point wiring for the most part. I made a couple simple circuit boards in the past, and the experience produced minimal satisfaction. Much of the reason is that I end up being satisfied with a design for only a little while before I am into total redesign. I'd say that if a project is going to work p2p for me, it probably will work on PCB if I ever get that far. I just build for personal projects, so haven't the attraction to the professionalism requiring boards.

Well, now that I have exposed all that craziness, I must say that I see a lot of good, logical comments in your post. I was surprised that one of my projects had very short high frequency power loops, using SO-8 output MOSFETs, 30 ampere peak capable MOSFET drive, quick turn-off but half as fast turn-on, but I still was dissatisfied with EMI. Since shielding seemed to make no difference, I found it interesting that I could not get EMI filtering to make a worthwhile improvement either. So, instead of going for PCBs, I decided to go back to the drawing board until I can start a new season of work in the shop.

Well, the one thing I guess I take seriously is the DIY part of the whole thing. All my work hinges upon that idea.
classd4sure
OOPS, I now realize I posted all this in the wrong thread!! Hijacked it. Sorry, think I clicked the wrong one or something. So I'm back to my old rule, never post before coffee, with that in mind i'll finish this up later :)
subwo1
I know what you mean. I simply clicked on the link from my email and didn't pay attention to the thread title. I apologize for being an accomplice in the hijacking. I look forward to your upcoming post. :)
classd4sure
quote:
Originally posted by tawen_mei
phe waveform, the rise time (500ns) is way too long. Is that from simulation or actual scope capture?

Haven't seen the schematic of the circuit you guys are talking about, but I'm hearing 1.2Kohm pull-up, 600ohm pull-down, and 100ohm gate resistor. These figures are excessive!!! How much dead-time are you running with? what kind of efficiency are you getting? what about THD? Typically the rise/fall time for a 500KHz switcher is <50ns, and more like 25ns...

Driver pull-down strength should be <3ohm. If it's too weak, to cut the story short, the weak pull-down can't keep the FET off when the switched node is slewing. Pull-up strength is a compromise of EMI and effienciency (and THD in class-D amps). No gate resistor should be needed; if you have ringing/EMI, that means you have layout problems. You may try to limit the pull-up strength somehow, but only without introducing additional impedance in series with the gate. The FET's parasitic gate resistance (>1ohm) and inductance (1nH) is already bad enough you don't need to add more.

That said, you should not be using anything bigger than SO-8 FETs. Okay, DPAK is absolutely the limit. The inductance in those TO-220 packages prevents any switching at serious speed. If you try, at best it runs hot, typically it will run for a second and the package will smoke or explode in your face (depending on the up-stream power supply).

Yes it is from simulation, I know..... I know, not very realistic, poor modeling of parts etc, but I feel it does "demonstrate" the points in question. The model is the pspice advanced analysis IRF540.

You would have seen the circuit had I posted it in the thread I thought I was posting to :(

Dead time? None! This is why such a slow turn on is required, when you look at those gate signals, you're looking at the dead time. Typically when you have a ~25ns rise, you also have a ~200ns dead time. Also excessive. The mosfets themselves still switch very fast, nothing like the gate signals show. You see the little glitch on the gate drive signals caused by the slew of the switching? The mosfet is fully switched in this time.

The 600 ohm turn off is not with respect to driver output impedance, but merely the bias of the turn off transistor, which is your typical PNP speed up active pull down device. The bias of the turn on/turn off active components fight each other in a balancing act which controls how loaded the driver is and when it switches from high to low.

100 ohm in series with the gate isn't so unusual from what I've seen, 50 ohms is commonly used. It does help to decouple wiring inductance from the gate capacitance to avoid oscillations at the gate, also to slow turn on.. This is very often seen in power switching driver app notes and ... everywhere I've seen really.

It might be a stretch to say you have layout problems if you have ringing. Two techniques I know of which dont' use a gate resistor :use trace inductance to form a resonant circuit with the gate, (IXYS app notes, 5Mhz class D, soft switched I think?) this isn't a requirement for the speeds in question, and they don't work with the common DIYr's prototyping techniques.

A constant current driver is another method used to control gate step, and for this method a turn on resistor may not be needed either.

This turn on resistor in question is only in the charge path, and not the discharge path.

Otherwise,
Turn on resistors of 50 to 100 ohms are commonly used. I admit 100 is more rare to see and on the high side, but in this simulation it is the difference between cross conduction and no cross conduction. If I built this I would start with 100 and see how much lower I can take it.

Once again this driver is only optimal in low part count. I would prefer to switch much faster, and use adaptive delay as a solution to much of this. I'll keep researching methods for achieving that.

PS:

I know there's better mosfets to use but the IRF540 is my "standard" for simulation, and it's also worst case since in reality I'd use a better mosfet.

Excellent post, and welcome to the forums. I don't like hot toasted mosfets either.
analogspiceman
There is no practical device safety limit that prevents using very fast turn off drive (EMI is always a concern, of course), but one must limit turn-on drive in order to observe the (other) device's reapplied dv/dt rating and avoid secondary breakdown of the other device's body diode (the conditions for this typically occur only if the body diode has just been conducting and then is immediately required to support more than about half the device's rated voltage).
Workhorse
quote:
Originally posted by ssanmor
mmmm, workhorse, your design resembles a lot to what I posted in this forum about 1 year ago or more (LM6172 triangle generator, XOR gates at IR2110 input, LM319 comparator...

I did some experimentation and also with symmetric supplies and no level shift, with all (triangle gen, error opamp and comparator) using a single supply referenced to Vss, with of course capacitive coupling at the input, but had variable offset problems and distortion figures were not very good so I abandoned that approach although it was much simpler.

If that's an experiment and you are doing it to learn and for personal use, no problem for me (that's what this forum was created for).

Have luck.

Hi Sergio
Glad to see you too!
My design was influenced from Crest LT schematic and the triangle generator was from your circuit.
This was only for experimenting with class-D amps , nothing else.

Since Charles had helped us alot in this forum, we are going to improve this circuit with his advise.

But our commercial production will be our own creation no copying at all.

regards,
kanwar

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