| 5th element |
Is this quite a simple thing to do?
Do you just wire up two DAC chips in the same way and then connect the outputs together and reduce the gain in the I/V stage to account for the larger output current?
If this is the case then could I just place another DAC chip on top of the first one? With the SSOP adaptors ive got I think you can just piggy back them on top of each other, so it would be quite simple to add on another chip.
Cheers for any input Matt |
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| 5th element |
| Ill just add, is it actually worth it? |
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| pinkmouse |
What is the point?
This isn't a flame, just curious... ;) |
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| jewilson |
I cant see how this is worth doing. Linearly can be affected when the lower order bit from different DAC turn on when at different times. This also can affect the input impedances of the part. One part could current hog on another. Voltage references in the DAC can be affected implementation and degraded. You can end up with more noise and less dynamic range.
:) |
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| Kuei Yang Wang |
Konnichiwa,
| quote: | Originally posted by jewilson
I cant see how this is worth doing.
Linearly can be affected when the lower order bit from different DAC turn on when at different times. This also can affect the input impedances of the part. One part could current hog on another. Voltage references in the DAC can be affected implementation and degraded. You can end up with more noise and less dynamic range. |
Well, it seems the Engineers at BB/TI do not share your sentiments. Here some notes from their "Theory of operation" section:
"Superior performance and sound quality are produced by
combining the parallel connection of 4 DACs per channel.
This parallel connection technique produces very low THD+N
performance (up to –100dB) and wide dynamic range (up
to 112dB)."
EVM-1702 PCM-1072 EVALUATION MODULE Manual
With all due respect, you seem to have a very limited understanding of converters and how they work, and what important in their design and implementation.
Sayonara |
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| jewilson |
Konnichiwa,
If your in to such a dumb concept you should build the thing but use those TDA1541 ::clown:
Know you proved it time and time again that your the one with the limited understanding, but I understand. You still have you head in place where the light does not shine.
Sayonara, your self :crazy: |
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| stef1777 |
We have this for computers. Why not for audio ! ;)
 |
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| jewilson |
stef1777
If that works for you, cool. |
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| pinkmouse |
:cop:
Jim, Thorsten, knock off the personal stuff now please. |
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| stef1777 |
Sorry, that's not me. I forgot to place the link.
http://www.dddac.de/ma_dac21.htm
I found this projet very fine. Like an old tube amp... What will apen, if we use 256 chips!!! |
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| rfbrw |
| Have a look at Accuphase www.accuphase.com They seem to think it is worth the effort. |
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| 5th element |
I suppose its worth testing because if it does bring about a benafit then its a fairly simple thing to do.
I think there would come a time when you would create more problems then you solve when you keep increasing the number of chips. But it is something worth considering. |
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| 5th element |
| I just looked at the accuphase web site - in one of their CDplayers (didnt look at more pdf files are rather large and even on DSL i cant be bothered :P) they use 12 DAC chips:bigeyes: , six per channel, obviously they use a balanced output but six per channel seems a bit OTT. I would have thought 4 per channel would be a sensible place to stop. |
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| rfbrw |
| They used to have one model with 16 dacs per channel. |
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| Kuei Yang Wang |
Konnichiwa,
| quote: | Originally posted by pinkmouse
:cop:
Jim, Thorsten, knock off the personal stuff now please. |
I am not sure what you are refering to. When Mr. Wilson used the exact same phrase applied to me in another thread you did not feel any need to moderate. Surely what is allowed one way cannot be wrong the other?
Sayonara |
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| pinkmouse |
| quote: | Originally posted by Kuei Yang Wang
When Mr. Wilson used the exact same phrase applied to me in another thread you did not feel any need to moderate. |
I didn't see that thread, but I did see this one. |
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| Kuei Yang Wang |
Konnichiwa,
| quote: | Originally posted by 5th element
I would have thought 4 per channel would be a sensible place to stop. |
I have thought about this too. What you get is an improvement in dynamic range of 3db per doubeling the number of DAC chip's in parallel. BTW, Voltage output DAC's can also operate parallel but they cannot be "stacked" the way it is possible with current output DAC's.
So, if lets start with a single PCM 1704 which is a notional 24 Bit DAC but has only -110db Noisefloor yet all the neccesary parts to have the LSB at (theoretically) -144db. So the DAC's possible performance at low level drowns in noise. Using 4 DAC's per channel will give us -116db Noisefloor, still 4db worse than 20 Bit equivalent performance. So, if we use 8 DAC's per channel we now have -119db for the noisefloor, nearly 20 Bit equivalent performance.
If we do further to 16 or even 32 DAC's per channel we could extend possible performance past -120db THD & N and thus would reap the full dynamic range from high resolution Digital Recordings. The fact that such recordings are few and far inbetween makes this of course largely academic.
And of course in the context of CD Standard audio with a limit of -93db on the recording (due to the 1/2 lsb uncertainty) all this is past academic. Hence one needs to understand what one wants to achieve.
A reason why one may parallel multibit converters for CD Audio is the use oif inexpensive DAC's with poor low level linearity, such as TDA1543. If you use one you have according to the datasheet -83db THD & N (@ -60dbfs) guaranteed and -90db as "typhical" performance. If we take -83db then using 8 DAC's in parallel will get us to -92db THD & N inherently and -99db for the "typhical" case, which would suggest that the recording becomes the limiting factor.
One might argue that using the TDA1543 in a DAC is retrograde and daft, however, if correctly applied the TDA1543 can produce a full scale output similar to any other CD player with only a Resistor as I/V Converter and at reasonable linearity. So there is good sense for using this obsolete DAC Chip with multiples in parallel.
Another reason to use multiple DAC's with CD is that many older DAC's as well as "economy" type DAC's tend to have a large variation of the exact (absolute) level produced at the lower and upper Bit's. This adds ceratain added non-linearity. As making DAC Chip's is a process that is goverend by the classic gaussian "bell" curve using one DAC chip will result in a performance that is all over the place, using multiple chip's in parallel will in effect place the result pretty reliably in the vicinity of the "peak" of that bell curve, making performance more consistent at very low and very high levels.
Now how any of the above sounds is a debatable issue. Whenever DAC Chip's are paralleled (and no matter how this is done either) I percieve some losses, especially in the are Id calle "immedicay". This is the key quality displayed by SE (and good PP) Valve Amplifiers and full range driver speaker display a great ofr and which is invariably lacking in systems using Multiway Speakers.
On the plus side, using multiple DAC's can sound smoother, more relaxed and refined. I found parallels here to using multiple other devices (Valves, Transistors, Op-Amp's) in parallel, in subjective terms you gain in some areas and loose in others.
Personally I'd say that the use of paralleled DAC's or not is governed by a number of parameters and depends entierly on the goals desired. To simply dismiss the use of multiple DAC's in parallel as stupid illustrates a deplorble lack of understanding of rather basic principle in Digital Audio, equally the blanket recommendation of paralleling up DAC's as cure for all digital evils shows a lack of understanding.
Sayonara |
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| fastcat95 |
Hello to all:
Is some ways, paralleling DAC chips could be compared to
the technique of "stacking" digital camera images to produce
a better image.
If you were to take 8 consecuitve frames of a still life image
with, say, a 2 mega pixal camera on a tripod, the 8 frames
could be aligned, summed and averaged using a suitable
program like "Registax" (free on the web). I have tried this
and note the following improvements:
1. Less noise in picture
2. Better dynamic range (light to dark)
3. Better details in dark or shadow areas
4. Better clarity
5. Improved color accuracy
Its like trading up to a digital camera with an improved
sensor chip. The improvement is not linear, so going with
an extremely large number of images (in most cases) does
not greatly improve on the technique.
Aside from the improvements of paralleling DAC chips (and
note that some of the Burr Brown chips already have 2
paralleled internal DAC circuits!), it is interesting to note
that at least Burr Brown grades some of their DAC chips.
The highest grade chips have the best S/N, lowest distortion,
and better linearity. And the sound that the highest grade
chips produce can be better than the average versions. I
once talked to an engineer at Wada, and he said that they
were using 4 BB1704 DAC chips in parallel (select grade)
at that time. And he said that it was well worth seeking
out the highest grade chips.
Fastcat |
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| jewilson |
fastcat95
Increasing the dynamic of multiple stacked images for audio or video signals.
You can add multiple converted images together, the process is called stacking. Stacking can improve the Dynamic range and S/N of a signal however it is different than paralleling Dac’s on top of each other.
The process of stacking requires a filter algorithm that can process arrays of data. These arrays of data images or then stacked one on top of another what happen then is an a processor subtracts the noise that is random in the signal. The signal should repeat but the noise can jump around
so the algorithm remove the noise that does not totalize to the highest value.
Example: using an 8 bit word to simulate the signal you can see how this process works.
10101001
10101101
10101011
10101000
------------
10101001 signal
One of the issue with paralleling DAC’s is the decision points where the lower order bits turns is not always the same. When this happens, and it will in lower cost DAC’s it is possible for several types of errors to happen, depending on the DAC type being used. We can have offset bit error, a gain error, a differential nonlinearity error, and possibly create a non-monotonicity error in the bit we are converting.
Depending again on the DAC topology that being used it is possible to increase the current noise in the output. If we take two transistors and parallel them we get an increase in both current and current noise. If the noise is filtered out by the aliasing filter and there are no bit linearity issues it is possible to improve performance. However, I don’t believe you can keep getting a 3dB improvement while you adding noise currents in the output.
Thorsen, I looked over the BB EVM-1702 and the measurements described don’t match the methods used in the data sheets for the PCM 1702. In fact
the specifications for the data sheet or better in many cases. Maybe you know is the EIAJ filter the same as the A weighted filter?
fastcat95,
You mentioned, Wadia used the best grade parts for this application. However, to assure your getting the best performance from the DAC they should be graded for bit linearity to realize a performance improvement.
Another improvement is possible if we have missing codes in one dac and none in the other. We will find that most of the converters never meet their maximum linearity spec’s, it difficult to get true 18-20bit but after that all bet’s or off. What to look for in a dac is guarantee bit performance. I just have not seen consumer grade parts guarantee bit performance. Of course we still have not mentioned the noise and performance needed in a power to get to this level as well as the grounding. I Do like the ISO isolators used in the BB EVM-1702 that should help reduce the digital noise.
:) |
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| Kuei Yang Wang |
Konnichiwa,
| quote: | Originally posted by jewilson
One of the issue with paralleling DAC’s is the decision points where the lower order bits turns is not always the same. |
I know few DAC's where this could be expected. All multibit DAC's known to me are SUPPOSED to update the current output on the change of WS/LE. Now if they do not settle their current very quickly they would not be able to provide any kind of performance. I will agree that there may a minimal difference in the slope time between chip's, but with the same FAB and methodes this again should be minimal and small enough to avoid any notable glitches.
| quote: | Originally posted by jewilson
When this happens, and it will in lower cost DAC’s |
I would severely question that. Most DAC's settle their output current extremely quickly, the amount of time spend setteling compared to the amount of time at "steady state" MUST be MINIMAL and resonably CONSISTENT sample to sampel for the darn thing to work at all....
| quote: | Originally posted by jewilson
it is possible for several types of errors to happen |
Virtually anything is possible in this universe, but most things are HIGHLY unlikely.
| quote: | Originally posted by jewilson
If we take two transistors and parallel them we get an increase in both current and current noise. |
Yes, the absolute current and the absolute noise current both rise. BUT the relative noisecurrent (compared to tho the operating current) goes DOWN.
| quote: | Originally posted by jewilson
However, I don’t believe you can keep getting a 3dB improvement while you adding noise currents in the output. |
Based on a variety of published measurements - you can.
| quote: | Originally posted by jewilson
Thorsen, I looked over the BB EVM-1702 and the measurements described don’t match the methods used in the data sheets for the PCM 1702. In fact the specifications for the
data sheet or better in many cases. Maybe you know is the EIAJ filter the same as the A weighted filter? |
The EIAJ specification of dynamic range etc. is more stringent (IIRC) but also remember that the EVM is charaterised as complete system, the 1702 per datasheet as "chip only".
Ciao T |
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| jewilson |
Thorsen,
Each PCM1702 has a full scale current output of 1.2ma and LSB current of 2.28882054nA. The DAC output is current source and adding more dacs increases the current noise by the number of DAC added in parallel. So were talking about summing junction and the current noise add's, it's not multipled.
The normal 1702 has an output impedance of 1000 ohm when two are parallel the impedance drops to 500ohm, three 250. Since the noise current adds, and output impedance drops by half the noise does not improve it should remain the same constant.
However, it now is possible for the spectrum of the noise to change, that may or many not be of any importance. The improvement you get here is at the output of VI stage. Many opamps have much lower 1/f noise current and voltage when the input impedance is low, example is a 5534 or a OP37. So that is some improvement there. |
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| Kuei Yang Wang |
Konnichiwa,
| quote: | Originally posted by jewilson
Thorsen, |
It's Thorsten, if you must use my name.
| quote: | Originally posted by jewilson
Each PCM1702 has a full scale current output of 1.2ma and LSB current of 2.28882054nA. |
Yes, but what is the noise on the output? At -110db (limit), or at around 4nA (Rms - around 5.6nA Peak). Thus the (thermal) current noise from the PCM1702 is larger, considerably so, than the LSB.
| quote: | Originally posted by jewilson
The DAC output is current source and adding more dacs increases the current noise by the number of DAC added in parallel. So were talking about summing junction and the current noise add's, it's not multipled. |
The noise does add, but as should well know, if we add random noise sources (or non-linearities at that) two equal level noise sources raise the noise (or nonlinearity) statistically only by 3db, not by 6db, while the signal level goes up 6db.
This is the underlying principle in combining multiple DAC's without added digital filtering to stagger their output and in paralleling devices for low noise.
| quote: | Originally posted by jewilson
Since the noise current adds, |
Which they do not, they add according to the "sumsquare" function, not linear....
| quote: | Originally posted by jewilson
and output impedance drops by half the noise does not improve it should remain the same constant. |
Not if the basic observedlaws of electronics are still valid.
| quote: | Originally posted by jewilson
The improvement you get here is at the output of VI stage. Many opamps have much lower 1/f noise current and voltage when the input impedance is low, example is a 5534 or a OP37. So that is some improvement there. |
That is a FURTHER improvement, beyond that from the smple paralleling devices.
Sayonara |
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| Kuei Yang Wang |
Konnichiwa,
| quote: | Originally posted by jewilson
Thorsen, I looked over the BB EVM-1702 and the measurements described don’t match the methods used in the data sheets for the PCM 1702. In fact the specifications for the data sheet or better in many cases. Maybe you know is the EIAJ filter the same as the A weighted filter?
|
I looked it over. Best compare the DEM-1702 and EVM-1702. The DEM-1702 with 1pcs PCM1702 is rated at 108db dynamic range (typhical), the EVM-1702 with 4pcs PCM-1702 is rated at 118db dynamic range (typhical), both measured under identical conditions (and illustrating that "datasheet" figures are rarely realised with a real device incorporating the Chip.
We see an overall improvement of 8db for paralleling 4 devices over 1 Device, of which 6db are ascribable to the paralleling of the devices and the other 2db likely to lower analog stage (input current noise induced?) noise due to lower source impedances and different Op-Amp's. Anyway, my guesses on this....
Sayonara
DEM-1702 - http://focus.ti.com/lit/ug/sbau016/sbau016.pdf
EVM-1702 - http://focus.ti.com/lit/ug/sbau029/sbau029.pdf |
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| jewilson |
Evaluation board with 4 each 1702 DAC’s
PRECISION DAC BOARD WITH 20-BIT
RESOLUTION
STANDARD DIGITAL AUDIO INTERFACE
(S/PDIF, EIAJ-1201) OPTICAL OR COAX
INPUT
SAMPLING RATE: 32kHz to 48kHz
COMPLETE ISOLATION FOR DIGITAL/ANALOG
HDCD DECODE FUNCTION
8X OVERSAMPLING DIGITAL FILTER
4 PCM1702 DACs PER CHANNEL
connected in parallel)
HIGH PERFORMANCE
THD+N: –90dB (16-bit)
–100dB (20-bit)
Dynamic Range: 98dB (16-bit, EIAJ)
***112dB (20-bit, EIAJ)***
S/N Ratio: 118dB (EIAJ)
-----------------------------------------------------------
Evaluation board with 1 each 1702 DAC
COMPLETE 20-BIT STEREO
D/A CONVERSION SYSTEM
NEW SIGN-MAGNITUDE DAC: PCM1702P
8x DIGITAL FILTER: SM5842AP
HIGH PERFORMANCE
THD+N at (F/S): 0.0015%
***Dynamic Range: 108dB (EIAJ)***
S/N Ratio: 120dB (EIAJ)
Non Zero Cross Distortion
SERIAL DIGITAL INTERFACE
ANALOG OUTPUT: 3V
According to the data sheets the 4 DACs evaluation board at 20bit has a 112dB dynamic range and a S/N of 118dB. The evaluation board with 1 DAC has a dynamic range of 108dB, however the are claiming 120dB S/N. I do find this strange that the single DAC board has the maximum theatrical S/N ratio! Also, there is a slight improvement in THD .0015 for one DAC as compared .001 for 4 DACs, however this is still in the range of slightly less that seventeen bits. Is this due to the digital filter, analog filter which I dough or the isolator, anyway it only a ¾ bit better resolution with four dac.?
So according to these documents the single board DAC has 18 bit resolution and the 4 DAC board has just little less than 114.4dB needed to get to 19 bits resolution. Also, we have several differences in the design of the evaluation boards will influence the performance. The 4 DAC board has an Isolator the ISO 150 which decouple the ground current noise from digital side from the DAC’s. This could be worth as much as one full bit in noise and Dynamic range. As for as the PDM 100 vs. the SM5842A there may not be any improvement their. |
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| Bernhard |
Mostly 2 parallel chips measure better than one.
Linearity errors are random, so they have to partly cancel out , the more chips, the better.
PCMxx chip grades were not accurate in my testings.
I had very good non grade chips and very bad K grade chips.
I start to think about PCM 56 instead of TDA1541 because I found PCMs that are better than S1.
Also they require less space and need no caps.
I put own selection of PCM in a Technics player and it beats every TDA S1 I have. |
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| Jocko Homo |
OK....in theory, you get a 3 dB improvement in S/N ratio.
How much imformation do you guys think is actually down there? Is it really worth the extra $35 or so, assuming that you are using PCM1704s/
Just curious.........
Jocko |
|
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| Kuei Yang Wang |
Konnichiwa,
| quote: | Originally posted by jewilson
So according to these documents the single board DAC has 18 bit resolution and the 4 DAC board has just little less than 114.4dB needed to get to 19 bits resolution. |
Tarnation and blimy. I did not quite read it right. My fault. I guess I read the figures I expected.
Puzzeling, the results. the 4 X PCM1704 SHOULD have been better....
Sayonara |
|
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| Kuei Yang Wang |
Konnichiwa,
| quote: | Originally posted by Jocko Homo
OK....in theory, you get a 3 dB improvement in S/N ratio.
How much imformation do you guys think is actually down there?
|
Very littlke from experience and from PERSONAL EXPERIENCE I prefer single DAC's over paralleled.... Which still does not make paralleling DAC's a dumb idea.... ;-)
Sayonara |
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| jewilson |
Bernhard
Linearity errors in a DAC are not caused by random errors. Example in ladder DACs they are caused by the errors in R/2R resistor networks internal switching and impedance nodes. These are can be different from DAC to DAC and they can be different on negative vs. positive out and require laser trimmed low TC precision resistors. DAC’s with current weighted switching for R/2R ladders have different types of errors. Also, logic buffering can add to the error of the DAC producing transient errors.
Plus the different errors from the Delta Sigma DAC’s.
I’m listing type of DAC errors
QUANTIZATION EFFECTS
Aperture Error
Absolute Accuracy (Total) Error
Integral Nonlinearity (INL) Error
Differential Nonlinearity (DNL) Error
Gain Error
Offset Error
You may find this helpful so you can get an understanding of the type of errors in DAC converters.
http://focus.ti.com/lit/an/slaa013/slaa013.pdf
http://www.electronicproducts.com/S...sepana1.sep2003
http://www.analog.com/UploadedFiles...98400AN-313.pdf
http://www.analog.com/UploadedFiles...24731AN-345.pdf
http://focus.ti.com/lit/an/sbaa047/sbaa047.pdf
http://focus.ti.com/lit/an/sbaa002/sbaa002.pdf
----------------------------------------------------------------------
Thorsten
| quote: | | Very littlke from experience and from PERSONAL EXPERIENCE I prefer single DAC's over paralleled.... Which still does not make paralleling DAC's a dumb idea.... ;-) |
Just for fun yea I would like to try the with my 1702 DAC it would be an interesting experiment and there are the possibilities it might sound better with the extra drive current. The problem I have it other than the statements I've made is the cost. These DAC are about $30 each, that's 8 of them is $240. Ouch, a good idea for TI I think. You can bet that application engineer got a pat on the back.
Well they don't sample this part any more too bad. |
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| fumihiko |
konnichiwa
parallering DAC chips
it!s PATENTED by MASAOMI SUZUKI (Accuphase Lab)
PAT-No ŽÀŠJ•½‚U?|‚S‚W‚Q‚S‚Q |
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| Jocko Homo |
Don't look to me for help, bub. I have sold all my '1702s to guys who needed them.
Jocko |
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| jewilson |
fumihiko
A patent for paralleling dac, that to funny! Maybe Nelson apply for a patent for paralleling MOSFET's.
So-Sorry, you can not get a patent that will hold up in court for something that is based on such a ridiculous premise. It has to be a new original idea not something has been doing for 20 years before. :bigeyes: |
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| MWP |
| quote: | Originally posted by jewilson
So-Sorry, you can not get a patent that will hold up in court for something that is based on such a ridiculous premise. It has to be a new original idea not something has been doing for 20 years before. :bigeyes: |
Yeh right...
That doesnt seem to stop big companies (Microsoft for example) from copyrighting simple old ideas :dead: |
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| jewilson |
There are court systems at least between the Americas and the Europeans countries. But if some on from India or China steals and sell your stuff its TS.
So if you feel like you have been cheated by MS stop using their stuff. Get a SUN or a Linux machine. Dare to be different and stop your wining. If was not for them we might be running pile of the **** OS2. :boggled: |
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| Jocko Homo |
You do know that what was left of DRI sued MicroShaft and won, right???
Too damn little, too damn late.
They don't really copy........! The just steal it, and when caught, buy the company up that owned it, shutting down them and all controversy.
See how simple that is?
Jocko |
|
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| jewilson |
There are court systems at least between the Americas and the Europeans countries. But if some on from India or China steals and sell your stuff its TS.
So if you feel like you have been cheated by MS stop using their stuff. Get a SUN or a Linux machine. Dare to be different and stop your wining. If was not for them we might be running pile of the **** OS2. :boggled: |
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| fumihiko |
jewilson san ,konnnichiwa
( san as Mr Mrs Miss )| quote: | | A patent for paralleling dac, that to funny! Maybe Nelson apply for a patent for paralleling MOSFET's. |
many manufacturer make staggered DAC,not parallering DAC
WADIA DENON KENWOOD....etc...it's staggerd DAC
staered DAC need sift-register or special chips
everybody said
staggered DAC is very good!
I tried staggered DAC,it's Good Sound!
but,nobody has noticed pallareling DAC |
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| rfbrw |
| quote: | Originally posted by fumihiko
jewilson san ,konnnichiwa
( san as Mr Mrs Miss )
many manufacturer make staggered DAC,not parallering DAC
WADIA DENON KENWOOD....etc...it's staggerd DAC
staered DAC need sift-register or special chips
everybody said
staggered DAC is very good!
I tried staggered DAC,it's Good Sound!
but,nobody has noticed pallareling DAC |
Not sure what you are saying here but a number of manufacturers use paralleling. Probably more make parallel dacs than staggered dacs. |
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| jewilson |
I have no idea what your talking about "staggerd DAC" :att'n:
We have several ways to implementate DAC's. There are paralleling DAC's and diffirental or balanced DAC configurations.
To implementate a balance DAC there is "no" need to have a shift registers. The data and clock signals to the negative DAC or inverted. The only reason to have a shift register is when your going to convert from parallel to a serial data. The DAC's that are designed for audio are all parallel in.:)
If your running out of a serial port of a DSP you would then need a shift register. |
|
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| fumihiko |
konnichiwa
staggerd or shifted which correct?
entry model Wadia CDP has 4 DACs per channel.
each DAC shifted 90 degrees
looks like 4times over-sumpling
in pallareling DAC
each DAC convert same signal, same time. |
|
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| Spartacus |
| A scheme that was modestly popular a littl ewhile back was to use several (say four) DACs in parallel, but delaying each one successively by one bit - therefore implementing a primitive type of oversampling. I believe this is what is meant by a "staggered DAC". |
|
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| rfbrw |
| quote: | Originally posted by Spartacus
A scheme that was modestly popular a littl ewhile back was to use several (say four) DACs in parallel, but delaying each one successively by one bit - therefore implementing a primitive type of oversampling. I believe this is what is meant by a "staggered DAC". |
Not quite. The delay is half the sample time for every pair of dacs. It is functionally equivalent to linear interpolation and needs a reasonable number of samples to work well which is why it is usually preceded by an oversampling digital filter. |
|
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| rfbrw |
| quote: | Originally posted by jewilson
<snip>
The DAC's that are designed for audio are all parallel in.:)
<snip>
|
Not in this dimension. Here they are all serial. |
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| Bernhard |
Denon used 2 PCM61, but not one for each channel, instead both for both channels.
If you pull one it is still stereo.
Left / right is separated after the dac. :cannotbe: :dead:
:( |
|
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| jewilson |
| quote: | | Not quite. The delay is half the sample time for every pair of dacs. It is functionally equivalent to linear interpolation and needs a reasonable number of samples to work well which is why it is usually preceded by an oversampling digital filter. |
Ok you taking about the delta time between the converter samples. Yea you could put a parallel to parallel shift register between the DACs to get rid to the bit delay. I really don't believe that it's really worth the effort to equilize or align 1/2 bit of offset between the DACs.
I use to use serial DAC's by Micro Networks and Hybrid Systems, I see that Micro Networks is still in business. There parts or true high performance R2R ladder dacs, Industrial and Military grade components. They do offer an 18bit part.
| quote: | | Denon used 2 PCM61, but not one for each channel, instead both for both channels. |
I not sure what you saying Bernhard |
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| Bernhard |
| quote: | Originally posted by jewilson
I not sure what you saying Bernhard |
The chips are cascaded somehow to increase resolution.
PCM61 is a mono dac so in cascade 4 are needed.
To save cost and go with 2 chips, they have some HCmos logic after the dac chips to separate the stereo channels.
Kind of multiplexing like FM stereo. |
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| rfbrw |
| quote: | Originally posted by jewilson
Ok you taking about the delta time between the converter samples. Yea you could put a parallel to parallel shift register between the DACs to get rid to the bit delay. I really don't believe that it's really worth the effort to equilize or align 1/2 bit of offset between the DACs.
<snip>
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No. Two dacs. Data to one dac. Data delayed by half the sample time, ((1/44100)/2) at CD rates, to other dac. Outputs summed. Nothing to with bits or offset. |
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| jewilson |
| quote: | | No. Two dacs. Data to one dac. Data delayed by half the sample time, ((1/44100)/2) at CD rates, to other dac. Outputs summed. Nothing to with bits or offset. |
I completely understand, what I said was that one of the dac has an offset. The offset is a offset in time, of a 1/2 the period of a sample. So I don't see that being an problem, music stereo all about psycho acoustics and the phase and groups delay through a digital filter is greater than that 1.1usec data offset between the converters.
------------------------------
The real advantage is not in parallel dac but in complimentary dacs. Or we can call them differential dacs. |
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| rfbrw |
| quote: | Originally posted by jewilson
I completely understand, what I said was that one of the dac has an offset. The offset is a offset in time, of a 1/2 the period of a sample. So I don't see that being an problem, music stereo all about psycho acoustics and the phase and groups delay through a digital filter is greater than that 1.1usec data offset between the converters.
------------------------------
The real advantage is not in parallel dac but in complimentary dacs. Or we can call them differential dacs. |
Your reply tends to suggest you see it as a bug. It is actually a feature. |
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| jewilson |
| quote: | | So I don't see that being an problem, music stereo all about psycho acoustics and the phase and groups delay through a digital filter is greater than that 1.1usec data offset between the converters. |
rfbrw
I am starting to wonder if you read these posting. It obvious that the minuscule, dam small, insignificant, offset between channels is not, very very dough full, meaningless to the importance sound, audio, music and stereo reproduction.
That is where i stand on this. :yell: :hypno2: |
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| jbokelman |
| quote: | Originally posted by jewilson
I completely understand, what I said was that one of the dac has an offset. The offset is a offset in time, of a 1/2 the period of a sample. So I don't see that being an problem, music stereo all about psycho acoustics and the phase and groups delay through a digital filter is greater than that 1.1usec data offset between the converters.
------------------------------
The real advantage is not in parallel dac but in complimentary dacs. Or we can call them differential dacs. |
How does the offset constitute a phase or group delay?
While the two DACs (for each channel) are offset in time by ½ sample, each DAC outputs for a full sample time. The result is a displaced overlap. Consider samples numbered A, B, C, D, etc. The output of the two DACs, examined at half-sample intervals, looks like this:
DAC1: A B B C C D D E E F F
DAC2: B B C C D D E E F F G
The outputs are summed resulting in ½ sample time where both DACs are outputting the same sample and ½ sample time where the DACs are outputting adjacent samples. The effect is similar to 2x oversampling.
SUM: A+B B+B B+C C+C C+D D+D D+E E+E E+F F+F F+G
Offset, parallel, and differential DACs are different techniques used to achieve different goals. They are not interchangeable and they certainly are not comparable. |
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| jewilson |
| quote: | | How does the offset constitute a phase or group delay? |
I was talking about an over sampling digital filter with some kind of FIR.
While it is possible to take the outputs of two converters in the same channel and sum the outputs signals at a summing amp. I would be hard pressed to call this a true 2X over sampling circuit.
Also, for me it better to discuss converters in bit values. Maybe I am just too old but I just have not seen converters that output the alphabet. I’ll have to think about that.
0, 1, 2,4,16, 32 ,64, 128, 256, 512, 1024, 2048, 4096, 8192, 16384 and so on.
Back to your subject, not only are we getting a change in amplitude we also get a small shift in time. The act of over sampling sticks more bits between the original samples. When summing, we are doing something a little bit different. So now we have one wave form that offset by 1/2 bit in time. Maybe we could give one suming channel a different gain value at the amp.
| quote: | | Offset, parallel, and differential DACs are different techniques used to achieve different goals. They are not interchangeable and they certainly are not comparable. |
This thread was about paralleling DAC’s not trying to over sampling in the analog domain there is a difference. My statement stands; I would rather implement differential converters. Whether the analog summing buy’s us anything I do believe it does, also I have not tried it and don’t believe that I am going to… :) there or just to may other way to skin this beast.
I need a beer.......:drink: |
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| rfbrw |
| quote: | Originally posted by jewilson
rfbrw
I am starting to wonder if you read these posting. It obvious that the minuscule, dam small, insignificant, offset between channels is not, very very dough full, meaningless to the importance sound, audio, music and stereo reproduction.
That is where i stand on this. :yell: :hypno2: |
I don't doubt that whatever you are going on about is extremely obvious but it is also obvious that it is not what fumihiko or I were referring to. |
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| jewilson |
| Maybe you should draw a picture. :confused: |
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| rfbrw |
| Why not have another beer instead. |
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| fumihiko |
Originally posted by jbokelman
konnichiwa
offset-DAC, I called Staggered-DAC before yesterday .
I read old MJ magagine(japanese audioDIY magagine)
they called shifted-pallareling DAC.
| quote: | | Offset, parallel, and differential DACs are different techniques used to achieve different goals. They are not interchangeable and they certainly are not comparable. |
different goals?
I think,different techniques used to achieve same goal.
goal is Good Sound and Low Price!
WADAI and Accuphase considered that at $1000 are low price . |
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| jbokelman |
| quote: | Originally posted by jewilson
This thread was about paralleling DAC’s not trying to over sampling in the analog domain there is a difference. |
Offset is just another way of paralleling DACs. It has most of the advantages of plain paralleling: increased output and the averaging errors between DACs. Additionally, it gives the benefits of oversampling. With recent improvements in digital filters and low-cost delta-sigma converters, offset DACs have fallen out of favor.
Differential is yet another way. It gives increased output, the averaging of errors, suppression of common-mode sampling noise, and differential output. It also requires a two’s-complement data stream. |
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| rfbrw |
| quote: | Originally posted by fumihiko
konnichiwa
<snip>
offset-DAC, I called Staggered-DAC before yesterday .
I read old MJ magagine(japanese audioDIY magagine)
they called shifted-pallareling DAC.
<snip
|
What was the date (month/year) of the magazine? |
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| jewilson |
| quote: | | Differential is yet another way. It gives increased output, the averaging of errors, suppression of common-mode sampling noise, and differential output. It also requires a two’s-complement data stream. |
jbokelman
The next dac I build will have differetial dac. Anyway, the application notes I have seen only required you to inverter the data stream to the negative DAC. :)
So does any body have a schematic of one of the offset dac's?
I don't know of any one using the implemenation. |
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| scottnixon |
| MJ had 2 or 3 articles in the 'Sidewinder' section. The only one I could find quickly was a weird one , that took I2S off of SAA7220 and fed 4 PCM56 per channel, through an array of 6 - 74HC164. This is in the March 1993 issue, page 200. I've tried some of the schemes years back (not this particular one as I didn't need the I2S conversion) and it was interesting. These are attempts at discrete versions of what Wadia was likely doing in DSP. French Curve / Digital Spline... what ever the marketing terms were 12 to 14 years ago :) |
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| jbokelman |
| quote: | Originally posted by jewilson
The next dac I build will have differetial dac. Anyway, the application notes I have seen only required you to inverter the data stream to the negative DAC. :) |
That's debatable. I've made my case; you can make your choice.
http://www.diyaudio.com/forums/show...6503#post426503 |
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| jewilson |
jbokelman,
Ok now you have gotten my attention! I need to go over the data but what you said in the other thread make good since.
if we call digital zero 0000,0000 and negative 0000,0001 your right it's not the same at all. Ok, so I need to look at this issue coding and bit value for the negative dac much closer than I have. I thought it was a simple clear cut deal since many companies have done it this way.
So have you implemented dac using 2's comp coding? I have some old Analog Devices books that have some good ifo on the subject. So now I am following what you’re talking about. :) |
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| Bernhard |
| quote: | Originally posted by scottnixon
MJ had 2 or 3 articles in the 'Sidewinder' section. The only one I could find quickly was a weird one , that took I2S off of SAA7220 and fed 4 PCM56 per channel, through an array of 6 - 74HC164. This is in the March 1993 issue, page 200 |
Is that schematic available somehow ? :rolleyes: |
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| rfbrw |
| quote: | Originally posted by Bernhard
Is that schematic available somehow ? :rolleyes:
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I know a library that holds back issues of MJ but its a bit of a trek from Munich (St. Pancras, London) and it isn't open to the general public. I'd suggest having a look at one or two of the Wadia patents or the Teac and Denon schematics but on second thoughts they won't help very much as they all combine DSP oversampling filters or off-the-shelf oversampling filters with programmable logic.
Perhaps someone in the forum has a copy of the schematic? |
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| fumihiko |
| quote: | Originally posted by rfbrw
What was the date (month/year) of the magazine? |
So--Sorry
I'm all refiled MJ magazine and RG Magazine,I can't see What was the month of magazine. |
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| fumihiko |
I found MJ magazine
March ‚P‚X‚X‚R S‚h‚c‚d‚v‚h‚m‚c‚d‚q(readers pages)
trying PCM56 4shifted-pallareleing DAC
but I don't have Scanner:bawling: |
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| rfbrw |
| quote: | Originally posted by Bernhard
Is that schematic available somehow ?
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If I ever get my scanner working, I'll email you a couple. |
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| X.G. |
| quote: | Originally posted by scottnixon
MJ had 2 or 3 articles in the 'Sidewinder' section. The only one I could find quickly was a weird one , that took I2S off of SAA7220 and fed 4 PCM56 per channel, through an array of 6 - 74HC164. This is in the March 1993 issue, page 200. I've tried some of the schemes years back (not this particular one as I didn't need the I2S conversion) and it was interesting. These are attempts at discrete versions of what Wadia was likely doing in DSP. French Curve / Digital Spline... what ever the marketing terms were 12 to 14 years ago :) |
I had ever read this article,but...I have very difficult to understand Japanese.:bawling: :bawling:
IIRC,the DAC is to develop the sound quality of Marantz CD-99 LTD.
IIRC too,one DAC of the DIY match is the same topology in MJ 1996. |
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| guido |
| quote: | Originally posted by scottnixon
MJ had 2 or 3 articles in the 'Sidewinder' section. The only one I could find quickly was a weird one , that took I2S off of SAA7220 and fed 4 PCM56 per channel, through an array of 6 - 74HC164. This is in the March 1993 issue, page 200. I've tried some of the schemes years back (not this particular one as I didn't need the I2S conversion) and it was interesting. These are attempts at discrete versions of what Wadia was likely doing in DSP. French Curve / Digital Spline... what ever the marketing terms were 12 to 14 years ago :) |
EDIT !!!
For who read my reply: thought it was easy to reverse engineer.
But it is not (during a lunchbreak :D ). Might have another look at it, should be possible to reverse-engineer without schematic.
Regards, |
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| guido |
Hi,
My two cent's:
The 6 '164 are cascaded as three 16 bit serial in/serial out registers.
They are then delaying the i2s with each time half a sample.
The DACs are then fed with:
dac1 current sample
dac2 delayed sample from half a sampleperiod ago
dac3 delayed sample from one sampleperiod ago
dac4 delayed sample from 1.5 sampleperiod ago.
Guess you also need glue logic to glue all together and create
the data for the four left and right channel dacs from i2s.
Result ~16 bit oversampling (?)
7220 output is i2s with 16 bit per channel, e.g. 7210 / CS8414 is 32 bit (16 unused).
Regards, |
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| rfbrw |
| quote: | Originally posted by Bernhard
Is that schematic available somehow ? :rolleyes: |
From MJ 3/1993. The digital filter feeding the registers is the SAA7220P/B. Dacs are 4 PCM56 per channel. The registers are 74HC164. |
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| guido |
| quote: | Originally posted by guido
Hi,
My two cent's:
The 6 '164 are cascaded as three 16 bit serial in/serial out registers.
They are then delaying the i2s with each time half a sample.
The DACs are then fed with:
dac1 current sample
dac2 delayed sample from half a sampleperiod ago
dac3 delayed sample from one sampleperiod ago
dac4 delayed sample from 1.5 sampleperiod ago.
Guess you also need glue logic to glue all together and create
the data for the four left and right channel dacs from i2s.
Result ~16 bit oversampling (?)
7220 output is i2s with 16 bit per channel, e.g. 7210 / CS8414 is 32 bit (16 unused).
Regards, |
Ah,
Just lost 2 cents :D, the above is uhm :xeye:
Anyway, thanks for posting. So the delay is a quarter of the sample, not half. Makes sence.. Result is still ~16 bit oversampling (?).
mvg,
Edit: Is LE connected to WS, or do you need to create LE from it with some logic? |
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| Petter |
| quote: | Originally posted by rfbrw
Not quite. The delay is half the sample time for every pair of dacs. It is functionally equivalent to linear interpolation and needs a reasonable number of samples to work well which is why it is usually preceded by an oversampling digital filter. |
Are you indicating that one delays by:
2 dacs: Fs/2
4 dacs: Fs/4
6 dacs: Fs/8 or 6???
8 dacs: Fs/16 or 8???
Can I also assume that if 44.1 is running at 2X oversampling prior to this as an example - one would use 88.2 as Fs' and substitute Fs' for Fs in the above example?
I have been thinking about doing other variants of this to set up an "analog" low pass filter of a highly oversampled input by staggering either by a number of MCLK's. I have also considered adding gain (multiples - positive and negative) an setting up some sort of analog FIR current summing but do not have the expertise in digital filter design to be able to compute optimal setup.
Petter |
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| rfbrw |
| If you use a single LRCLK signal for all 4 dacs then LRCLK would have to run at 4Fs. With individual LRCLK signals, each dac runs at Fs but viewed from the output the combined 4 dacs run at 4Fs due to the staggering of LRCLK. |
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| fumihiko |
| anyone pallareling up delta-sigmaDAC? |
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| catrafter |
What would be the result of paralleling up some PCM 1600Y multi-channel DACS in a receiver? Any sonic benifits?
T |
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| jewilson |
So if we are playing a standard 44.1kHz CD we have these clock rates.
Fs 256= 11.2896 mhz
Fs 384= 16.9340 mhz
Fs 512= 22.5792 mhz
Fs 768= 33.8688 mhz
My questions are what or the methods of generation of the new clock. Then their is the issue of phase locking the old Fs new rate Fs to feed to the shift registers?
Of course I talking about keep the standard digital filter.
guess I am missing somthing here.
To make a real digital filter out of this would require much more work and then you want to be in a DSP. :) |
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| rfbrw |
| quote: | Originally posted by jewilson
<snip>
guess I am missing somthing here.
<snip>
|
Alas, a common event, it would seem.
Interesting figures, BTW. No idea where you got them from.
A digital filter, off-the-shelf or otherwise, precedes the shift registers. With an 8x filter L/R clock would be 352K8 and serial clock would be 11M2896, assuming 32 bit frames per channel and serial clock is continuous. For 4x hardware oversampling, L/R clock is passed through a 32 bit shift register, clocked by the 11M2896 serial clock, with taps at 8,16,24 and 32 serial clock cycles respectively and each tap is connected to only one of 4 parallel dacs. From the point of view of the composite dac made up of the 4 parallel dacs a L/R clock transistion occurs every 8 serial clock cycles i.e. at 4 times L/R clock. |
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| PatPet |
One dumb question:
How would the waveform from each line looks like that in the data lines in an non-OS DAC? I mean are there pre-ringing issues with this register array? |
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| rfbrw |
| Ringing does not apply here. The data is unchanged. |
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| PatPet |
| That means I benefit from something like OS without losing the pros of non-OS with staggering DAC |
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| rfbrw |
| quote: | Originally posted by PatPet
That means I benefit from something like OS without losing the pros of non-OS with staggering DAC |
Afraid not. As with many other things the conditions have to be right in order to get the best performance and in this case the relevant condition is the number of samples. The process makes a basic assumption about the waveform and for that assumption to be valid there has to be a reasonable amount of samples particularly in the higher frequencies. Therefore if you do not precede the process with an OS filter it will still work but expect to loose your higher frequencies. |
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| PatPet |
| quote: | Originally posted by rfbrw
From MJ 3/1993. The digital filter feeding the registers is the SAA7220P/B. Dacs are 4 PCM56 per channel. The registers are 74HC164. |
I'm new to shift register. But I don't understand how the data lines are delayed by half a sample from each other. What I know is the adjacent outputs have a CLK period delay. Could anyone explain more to me?
If I'm going to implement 4X or 6X OS, what is the equivalent block diagram? :confused: |
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| Bernhard |
| quote: | Originally posted by PatPet
If I'm going to implement 4X or 6X OS, what is the equivalent block diagram? |
I think the schematic for a x4 os was posted here.
The question is if it is worse the trouble.
You will have linear interpolation which will worsen linearity because you get additional samples that are not located on the desired waveform.
Distortion will rise with frequency because of less samples.
Logic chips could bring additional jitter. |
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| rfbrw |
| quote: | Originally posted by Bernhard
I think the schematic for a x4 os was posted here.
The question is if it is worse the trouble.
You will have linear interpolation which will worsen linearity because you get additional samples that are not located on the desired waveform.
Distortion will rise with frequency because of less samples.
Logic chips could bring additional jitter. |
The above is only true if you do not know what you are doing. |
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| rfbrw |
| quote: | Originally posted by PatPet
I'm new to shift register. But I don't understand how the data lines are delayed by half a sample from each other. What I know is the adjacent outputs have a CLK period delay. Could anyone explain more to me?
|
An explanation of shift registers.
http://www.eelab.usyd.edu.au/digita...register02.html
| quote: |
If I'm going to implement 4X or 6X OS, what is the equivalent block diagram? :confused: |
Post #71. 4x for data in the same format as the output of the SAA7220. |
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| Bernhard |
| quote: | Originally posted by rfbrw
The above is only true if you do not know what you are doing. |
I don't know what I do. |
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| PatPet |
Adjacent output is delayed by how many samples?
How do you calculate that?
For post 71
Why are the 6 74HC164s cascaded? What do R1-4 L1-4 and LE1-4 represent? |
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| rfbrw |
SAA7220-----CIRCUIT----PCM56 x 4
DAAB------->DATA---->L1-4 & R1-4
CLAB-------->BCK---------->BCK
WSAB--------->LE-------->LE 1-4 |
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| Sebastiaan |
Dear,
Looking at accuphase closer. They not "just" stack or parallel dac chips. In a part they parallel (two from the four available dac's)the current outputs. The other halve they summ the voltage signal after the I-V converters. So they not stack all the DAC's directly
http://www.accuphase.com/model/pdf/dp-78_e.pdf
I remember Kenwood (in a parallel dac design) gives each of the 6 dac chips it's own I-V converter. And summ the voltage signal after the I-V converters. Each I-V converter have it's own feebackloop. Each indicidual I-V converter opamp will try to correct the error seen from the other I-V converter stagea. Errors caused by either the dac chip or the I-V converter. This wil reduce THD. Accuphase try to do both in one design. For a part benefit from the higher signal caused bij paralleling the current outputs from the Dac chips. And the same time let the I-V convertor opamps bij paralleling correct errors.
For example if I-V opamp 1 spit out an error. I-V opamp 2 and 3 will try to correct this and send a correction signal in opposite phase. and so on and so on... Clever!
Best regards,
Bas |
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